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Title:
AREA MOUNTING SEMICONDUCTOR DEVICE, AND DIE BONDING RESIN COMPOSITION AND SEALING RESIN COMPOSITION FOR USE THEREIN
Document Type and Number:
WIPO Patent Application WO/2006/101199
Kind Code:
A1
Abstract:
An area mounting semiconductor device exhibiting high reliability even when lead-free solder is used in surface mounting, and a die bonding resin composition and sealing resin composition for use therein. The area mounting semiconductor device has a semiconductor element or a multilayer element mounted on one surface of a substrate through a die bonding resin composition, with only the surface of the substrate mounting the semiconductor element being substantially sealed with a sealing resin composition. The area mounting semiconductor device is characterized in that the modulus of elasticity of hardened die bonding resin composition is 1-120 MPA at 260°C, the modulus of elasticity of hardened sealing resin composition is 400-1200 MPA at 260°C, and the coefficient of thermal expansion is 20-50 ppm at 260°C.

Inventors:
OSUGA HIRONORI (JP)
YAGISAWA TAKASHI (JP)
YASUDA HIROYUKI (JP)
Application Number:
PCT/JP2006/305981
Publication Date:
September 28, 2006
Filing Date:
March 24, 2006
Export Citation:
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Assignee:
SUMITOMO BAKELITE CO (JP)
OSUGA HIRONORI (JP)
YAGISAWA TAKASHI (JP)
YASUDA HIROYUKI (JP)
International Classes:
H01L21/52; C09K3/10; H01L23/29; H01L23/31
Foreign References:
JP2003060127A2003-02-28
JP2002284961A2002-10-03
JP2002110898A2002-04-12
Attorney, Agent or Firm:
Kishimoto, Tatsuhito c/o Tokyo, Central Patent Firm (3rd Floor Oak Building Kyobashi, 16-10, Kyobashi 1-chom, Chuou-ku Tokyo 31, JP)
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