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Patent Searching and Data


Title:
ARRAY SUBSTRATE AND DISPLAY PANEL
Document Type and Number:
WIPO Patent Application WO/2018/032960
Kind Code:
A1
Abstract:
An array substrate and a display panel, the array substrate comprising shift registers (Gn) corresponding to each gate line. A transistor, in shift registers of various stages, connected with a corresponding-stage gate line (gate n) and next-stage gate line (gate n+1) is a first transistor (M9); a signal line, among a plurality of signal lines connected with the shift registers (Gn), connected with the first transistor (M9), is a first signal line (VSS); the first transistor (M9) and the signal line connected with the first transistor (M9) are arranged in a display area (10). The width of a frame area (20) can be reduced without complicating wiring layout design of the array substrate.

Inventors:
WANG, Zheng (No. 9, Dize Road BDA, Beijing 6, 100176, CN)
Application Number:
CN2017/095198
Publication Date:
February 22, 2018
Filing Date:
July 31, 2017
Export Citation:
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Assignee:
BOE TECHNOLOGY GROUP CO., LTD. (No. 10 Jiuxianqiao Road, Chaoyang District, Beijing 5, 100015, CN)
BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. (No. 118, Jinghaiyilu BDA, Beijing 6, 100176, CN)
International Classes:
G09G3/36; G11C19/28
Foreign References:
CN106098010A2016-11-09
CN102540525A2012-07-04
CN102983132A2013-03-20
CN104820520A2015-08-05
US20120026420A12012-02-02
Attorney, Agent or Firm:
CHINA PATENT AGENT (H.K.) LTD. (22/F, Great Eagle Centre23 Harbour Road, Wanchai, Hong Kong, Kong, CN)
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