Title:
ARRAY SUBSTRATE AND DISPLAY PANEL
Document Type and Number:
WIPO Patent Application WO/2023/168749
Kind Code:
A1
Abstract:
Provided in the present application are an array substrate and a display panel. The display panel comprises an array substrate. An ion implantation barrier layer in the array substrate and at least part of a channel portion of an active layer are arranged in a aligned manner, and the ion implantation barrier layer is used to prevent ions from being implanted into the channel portion, such that the effective length of a channel of an oxide thin-film transistor is reduced; and when the width-to-length ratio of the oxide thin-film transistor remains unchanged, the width of the channel of the oxide thin-film transistor can be reduced, such that the size of the oxide thin-film transistor can be reduced, thereby improving the aperture ratio of the display panel.
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Inventors:
ZHAO JUN (CN)
WU WEI (CN)
ZHAO BIN (CN)
XIAO JUNCHENG (CN)
WU WEI (CN)
ZHAO BIN (CN)
XIAO JUNCHENG (CN)
Application Number:
PCT/CN2022/081973
Publication Date:
September 14, 2023
Filing Date:
March 21, 2022
Export Citation:
Assignee:
GUANGZHOU CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECH CO LTD (CN)
International Classes:
H01L21/265; H01L29/786
Foreign References:
CN107464820A | 2017-12-12 | |||
CN103050410A | 2013-04-17 | |||
CN107204376A | 2017-09-26 | |||
CN112530810A | 2021-03-19 | |||
CN107240610A | 2017-10-10 | |||
US20150236128A1 | 2015-08-20 |
Attorney, Agent or Firm:
PURPLEVINE INTELLECTUAL PROPERTY (SHENZHEN) CO., LTD. (CN)
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