Title:
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2017/054394
Kind Code:
A1
Abstract:
Provided is an array substrate, comprising a plurality of gate lines and a plurality of data wires intersecting with the plurality of gate lines, wherein every two gate lines and corresponding data wires define a pixel unit, each pixel unit comprises a thin film transistor, a gate insulation layer (7), a passivation layer (8) arranged on one side of the gate insulation layer, pixel electrodes (3) and a common electrode (2), a source and drain electrode (5) of the thin film transistor is arranged between the passivation layer and the gate insulation layer, the common electrode is arranged on the other side of the gate insulation layer opposite to the passivation layer, and the pixel electrodes are arranged on the passivation layer. Further provided is a method for manufacturing the array substrate and a display device.
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Inventors:
TIAN YUNYUN (CN)
CHOI HYUNSIC (CN)
UM YOONSUNG (CN)
CHOI HYUNSIC (CN)
UM YOONSUNG (CN)
Application Number:
PCT/CN2016/073874
Publication Date:
April 06, 2017
Filing Date:
February 16, 2016
Export Citation:
Assignee:
BOE TECHNOLOGY GROUP CO LTD (CN)
International Classes:
H01L21/77; H01L27/12
Foreign References:
| CN203883006U | 2014-10-15 | |||
| CN105185791A | 2015-12-23 | |||
| CN204964957U | 2016-01-13 | |||
| CN101097333A | 2008-01-02 |
Other References:
See also references of EP 3358613A4
None
None
Attorney, Agent or Firm:
CHINA PATENT AGENT (H.K.) LTD. (CN)
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