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Patent Searching and Data


Title:
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
Document Type and Number:
WIPO Patent Application WO/2020/192192
Kind Code:
A1
Abstract:
An array substrate and a manufacturing method thereof. The method comprises: forming a first thin film transistor, wherein the first thin film transistor comprises a first semiconductor layer, a first gate, a first drain, and a first source; forming a second thin film transistor, wherein the second thin film transistor comprises a second semiconductor layer, a second gate, a second drain, and a second source; and forming a dielectric layer, wherein the dielectric layer separates the first semiconductor layer from the second semiconductor layer. The method further comprises: performing processing on a film layer so as form, on the same film layer, at least one of the first gate, the first drain and the first source, at least one of the second gate, the second drain and the second source, and the dielectric layer. The invention reduces the number of times of film formation and patterning, thereby simplifying manufacturing processes of array substrates.

Inventors:
GONG KUI (CN)
DONG BILIANG (CN)
DUAN XIANXUE (CN)
ZHANG ZHIHAI (CN)
Application Number:
PCT/CN2019/126285
Publication Date:
October 01, 2020
Filing Date:
December 18, 2019
Export Citation:
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Assignee:
BOE TECHNOLOGY GROUP CO LTD (CN)
HEFEI BOE OPTOELECTRONICS TECH (CN)
International Classes:
H01L27/12; H01L21/77
Foreign References:
CN109887936A2019-06-14
CN107275350A2017-10-20
CN104362098A2015-02-18
US20140183522A12014-07-03
Attorney, Agent or Firm:
LIU, SHEN & ASSOCIATES (CN)
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