Title:
ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2018/054111
Kind Code:
A1
Abstract:
Disclosed are an array substrate and a method for manufacturing same. The array substrate comprises thin-film transistors, and at least has a first region and a second region. The thickness of an active layer of the thin-film transistor in the first region is greater than that of an active layer of the thin-film transistor in the second region; and an overlapping area between a source electrode or drain electrode and the active layer of the thin-film transistor in the first region is greater than that between a source electrode or drain electrode and the active layer of the thin-film transistor in the second region, so that the ratios of the overlapping areas of the source electrodes or drain electrodes and the active layers of the thin-film transistors to the thicknesses of the active layers are the same on the first region and the second region.
Inventors:
SU TONGSHANG (CN)
CHENG JUN (CN)
ZHAO CE (CN)
ZHOU BIN (CN)
WANG DONGFANG (CN)
YUAN GUANGCAI (CN)
CHENG JUN (CN)
ZHAO CE (CN)
ZHOU BIN (CN)
WANG DONGFANG (CN)
YUAN GUANGCAI (CN)
Application Number:
PCT/CN2017/089717
Publication Date:
March 29, 2018
Filing Date:
June 23, 2017
Export Citation:
Assignee:
BOE TECHNOLOGY GROUP CO LTD (CN)
HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO LTD (CN)
HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO LTD (CN)
International Classes:
H01L27/12; H01L21/28; H01L21/44; H01L21/84; H01L27/28; H01L29/417; H01L51/10; H01L51/40
Foreign References:
| CN106356378A | 2017-01-25 | |||
| CN1540602A | 2004-10-27 | |||
| CN101101420A | 2008-01-09 | |||
| CN101325220A | 2008-12-17 | |||
| CN101656270A | 2010-02-24 | |||
| CN105116653A | 2015-12-02 | |||
| GB2326019A | 1998-12-09 |
Attorney, Agent or Firm:
ZHONGZI LAW OFFICE (CN)
Download PDF: