Title:
ARRAY SUBSTRATE ROW DRIVING CIRCUIT AND DISPLAY PANEL
Document Type and Number:
WIPO Patent Application WO/2020/220531
Kind Code:
A1
Abstract:
An array substrate row driving circuit and a display panel, the array substrate row driving circuit comprising: a plurality of single-stage array substrate row driving circuits which are cascaded together and at least one virtual test unit. When viewed in a layout, the number, manner of placement, position and size of thin film transistors in the virtual test units are consistent with those of thin film transistors in the single-stage array substrate row driving circuits. The source, drain and grid of each thin film transistor in the virtual test units are respectively provided with a corresponding via hole and are connected to the corresponding via hole, and none of thin film transistors in the virtual test units are connected to one another. In the array substrate row driving circuit and the display panel, the virtual test units are placed in an array substrate row driving circuit area, thus the electrical properties of corresponding thin film transistors may be rapidly measured by using the virtual test units, thereby facilitating the parsing of the whole circuit.
Inventors:
XI SUPING (CN)
WANG TIANHONG (CN)
WANG TIANHONG (CN)
Application Number:
PCT/CN2019/102478
Publication Date:
November 05, 2020
Filing Date:
August 26, 2019
Export Citation:
Assignee:
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECH CO LTD (CN)
International Classes:
G09G3/00
Foreign References:
| CN109903712A | 2019-06-18 | |||
| CN108922491A | 2018-11-30 | |||
| CN109166507A | 2019-01-08 | |||
| CN103730384A | 2014-04-16 | |||
| CN105632959A | 2016-06-01 | |||
| US20100315401A1 | 2010-12-16 |
Attorney, Agent or Firm:
COMIPS INTELLECTUAL PROPERTY OFFICE (CN)
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