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Title:
AUTOMATIC DETECTION OF HOST BUS PROTOCOL
Document Type and Number:
WIPO Patent Application WO/2002/010901
Kind Code:
A2
Abstract:
A data storage memory has an interface for communications between host computers which communicate over buses with different protocols. The interface detects the protocol of communications from the host computer and changes to match the protocol of the bus. Status registers are read by the host computer to determine the status of the communication between the host and the drive. If repeated reads of the status register are made the interface changes the protocol of the host.

Inventors:
REIMANN MARK
Application Number:
PCT/US2001/041401
Publication Date:
February 07, 2002
Filing Date:
July 25, 2001
Export Citation:
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Assignee:
IOMEGA CORP (US)
International Classes:
G06F3/06; G06F13/38; (IPC1-7): G06F3/06
Foreign References:
FR2787603A12000-06-23
US5613096A1997-03-18
Other References:
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 02, 26 February 1999 (1999-02-26) & JP 10 308790 A (CANON INC), 17 November 1998 (1998-11-17)
Attorney, Agent or Firm:
Kurtz, Richard E. (PA, US)
Download PDF:
Claims:
What is claimed is:
1. In a data storage memory comprising: an interface for communications between host computers which communicate with said storage memory over buses with different protocols, the improvement wherein said interface detects the protocol of communications from said host computer and changes said interface to match the protocol of said bus.
2. The data storage memory recited in claim 1 wherein said interface has a default protocol and another protocol.
3. The data storage memory recited in claim 2 wherein said interface has status registers which are read by said host computer to determine the status of the communication between said host and said drive, said interface being changed from said default protocol to another protocol upon repeated reading of said status registers.
4. The data storage memory recited in claim 2 wherein said interface has status registers which are read by said host computer to determine the status of the communication between said host and said drive, said interface responding to host in said other protocol upon sending of multiple command from said host.
5. The data storage memory recited in claim 2 wherein said default protocol is ATAPI and said other protocol is ATA.
6. The data storage memory recited in claim 1 wherein said memory is a magnetic disk drive.
7. The data storage memory recited in claim 1 wherein said host computer has an ATAPI bus.
8. The data storage memory recited in claim 1 wherein said host computer has an ATA bus.
9. The data storage memory recited in claim 8 wherein said host computer is in a digital camera.
10. The data storage memory recited in claim 8 wherein said host computer is in a cell telephone.
11. The data storage memory recited in claim 8 wherein said host computer in an MP 3 player.
12. The data storage memory recited in claim 8 wherein said host computer is a PDA.
13. The data storage memory recited in claim 8 wherein said host computer is a global positioning system.
14. The data storage memory recited in any one of claims 9 through 13 wherein said host computer has a flash card memory.
Description:
Automatic Detection of Host Bus Protocol Background of the Invention This invention relates to data storage and more particularly to a drive that detects the capability of the host computer and operates with host computers which are connected to the drive over buses having different protocols.

Microprocessors and supporting computer technologies are rapidly increasing in speed and computing power while decreasing in cost and size. These factors have led to the broad application of microprocessors to an array of electronic products, such as hand-held computers, digital cameras, cellular phones and the like. All of these devices have, in effect, become computers with particular application-specific attributes. For this new breed of computer products, enormous flexibility is gained by the ability to exchange data files and store computer software.

U. S. Patent 5,809,520, Edwards et al., describes the use of mini storage drives in various devices. In particular that patent describes a Clik! TM mini drive made by Iomega Corporation in host computers which perform different functions. These host computers are connected to the drive by a bus configured in a particular protocol.

ATA, ATAPI, parallel port bus, generic serial, USP, Firewire, and SCSI are common bus protocols. A common situation is that the drive may be connected to a device which only supports ATA or to a device that only supports ATAPI. For example, digital cameras and other devices which have flash memory card storage usually have an ATA interface, whereas desktop and laptop computers typically have an ATAPI interface, U. S.

Patent 5,928,347 describes flash memory storage.

Solid-state memory in the form of flash memory has recently become the storage of choice in a variety of mobile and handheld devices, notably information equipment and consumer electronics products. Flash memory is ideally suited for mobile computer such as laptop and palmtop computers, PDAs (personal digital assistants) because of its small size, low power consumption, high speed and high reliability features. In addition to providing application programs and data storage on these mobile hosts, the removable memory card provides a convenient way to exchange data and files between different hosts.

It is an object of the present invention to provide an intelligent memory that is able to detect the capabilities of the host and to work with a host computer that supports different protocols.

Summary of the Invention In accordance with the present invention a memory, such as an intelligent data storage drive has an interface for communications between the memory and a host computer over a bus with different protocols. The interface detects the protocol of the communications on the bus and changes the interface to match the protocol of the host computer.

More specifically, the memory of the present invention will operate with a host computer that will only support an ATA protocol as well as a host computer that will support ATAPI. The memory is initialized as an ATAPI device. The host reads of the status register in the drive interface are monitored. The drive assumes that commands are sent by a host which supports ATAPI and the drive functions as an ATAPI device. However, if the host computer continues to read the status registers in the interface, the interface is switched to an ATA mode.

In accordance with a further aspect of the invention, the memory is a magnetic disk drive, such as Clik ! w. The memory may alternatively be a flash card, optical or magnetic optical drive.

The foregoing and other objects, features and advantages of the invention will be better understood from the following more detailed description and appended claims.

Short Description of the Drawings Figures 1A-11 show mini storage drives in host computers with different functions ; Figure 2 shows a disk drive connected to a host computer; Figures 3A and 3B depict the status register of the interface of the disk drive of the present invention; and Figure 4 is a flow chart depicting the operation of the disk drive in accordance with the present invention.

Description of the Preferred Embodiment Figures 1A-1I showaplurality of devices 10-17 which generate signals representing different functions performed by different classes of the devices. For example, the global positioning system 10 can generate signals representing navigational position. Electronic book 11, digital camera 12, personal digital assistant (PDA/Palmtop) 13, portable game 14, cellular phone 15, laptop computer 16, and MP3 player 17, each generate signals representing the function performed by that particular device.

Each of these devices has a digital memory for storing the signals so that diverse functions performed by the different devices are stored. For example, a small magnetic disk drive such as a Clik! drive made by Iomega is the memory. There is a mini drive 20f for the global positioning system 10, a mini drive 20g for the notebook computer 11, a mini drive 20a for the digital camera 12, a mini drive 20b for the game 13, a mini-drive 20c for the PDA 14, a mini drive 20d for the cellular phone 15, a mini drive 20e for the laptop computer 16 and a mini-drive 20h for the MP3 player 17.

A desk top computer 3 5 has a high capacity floppy disk drive, such as the ZIPTM drive 33. In order to provide forward compatibility to the desk top computer 35 a caddy 31 is provided. The caddy 31 adapts the mini cartridge 30 to the ZIP drive 33. Mini-cartridge 30 has a magnetic recording medium on which the signals from the devices are recorded.

The devices shown in Figures 1A-11 communicate with the mini drives 20a-20h in various protocols. For example, Notebook Computer 11, laptop computer 16, and desktop computer 35 typically communicate in the ATAPI protocol. GPS 10, digital camera 12, game 13, PDA/Palmtop, cell phone 15, and MP3 player 17 communicate in the ATA protocol. In general, all host computers having a PCMIA expansion slot for the mini-drives have an ATA bus.

Figure 2 is a schematic diagram of a mini storage drive connected to a host device 90.

Host device 90 may be one of the computer based devices such as shown in Figs. lA-lI.

Host device 90 communicates with drive 200 via bus 91 by sending commands to write or read digital information to or from digital memory 14. Bus 91 may be one of the bus protocols ATA or ATAPI, for example.

Drive 200 is a Clik! TM in this example, but it may be replaced by one the various digital data storage media such as flash card or optical, or magneto-optical drives with fixed or removable memory. Where the memory 14 is removable from drive 200, medium 14 is encased in an outer shell 18 to protect medium 14 from damage.

Drive 200 includes an ASIC 88 that has a controller 88. ASIC 88 provides an interface with host device 90 as well as controlling the overall operation of drive 200. ASIC 88 is preferably a microprocessor-based controller, such as an application specific integrated circuit (ASIC). Drive 200 also includes a read channel 82 for conditioning signals read from medium 14; actuator controller 84 for providing servo control and tracking ; a motor controller 86 for controlling the spin rate of medium 14 via a spindle motor 40, and an actuator assembly for reading the data from medium 14.

The actuator assembly includes read/write heads 46 that are connected to the distal end of an actuator assembly. Read/write heads 46 comprise a slider that carries a read/write element, either formed therein or attached thereto. The actuator assembly also includes a suspension arm 44 and an actuator 49 that cooperate to move the slider 46 over the surface of medium 14 for reading and writing digital information The read/write element of head 46 is electrically coupled to read channel 82 by way of electrical conduct or 92.

Fig. 3A shows ASIC 88 which includes a controller 89 and task file register 89. The ASCI 88, controller 87 and task file register 89 operate in accordance with the specification ATA/ATAPI-5, which is incorporated herein by reference.

Fig. 3B shows the eight bits 310-317 of status register 300 of the interface between host device 90 and drive 200. The interface transfers data between the input/output channel of drive 200 and host computer 90 via bus 91. This data is in the form of bits, which contain a value of either zero or one. Bits 310-317 include error bit 310, data request bit 313, data ready bit 316, and busy bit 317. Bits 311,312,314, and 315 are inapplicable to this application. DRDY bit 316 is cleared to zero by the drive when the drive is turned on or reset.

The DRDY bit will be set to one by the drive when the drive is fully capable of accepting all commands from the host. If the drive controller 88 is switched to ATAPI and the host is an ATA device, the drive will not be fully capable of accepting all commands. Accordingly, if the drive controller is switched to ATAPI and the host is an ATA device, the drive will not set the DRDY bit to one, and the host will continually read the DRDY bit as zero. If the host repeatedly reads the DRDY bit as zero, the drive controller 88 will switch to ATA mode.

When the drive controller switches to ATA, the drive will be fully capable of accepting all commands, and the drive will set the DRDY bit to one.

The foregoing is depicted in the flow chart of Figure 4. As indicated at 300, the controller 88 is initialized to ATAPI. A determination is made at 301 as to whether the host repeatedly reads the status register 200. If not the controller 88 responds to the host as an ATAPI device. This step indicated at 302 in the flow chart.

If the host repeatedly reads the status register 200, the controller 88 switches to the ATA mode as indicated at 303. As indicated at 304 a determination is made as to whether the host now sends a command to the drive. If it does, the controller 88 responds to the host as an ATA device as indicated at 305. If it does not, the drive responds to the host as an ATAPI device as indicated at 306 and an another attempt is made to establish communications.

While a particular embodiment of the invention has been shown and described, various modifications are within the true spirit and scope of the invention. The appended claims are, therefore, intended to cover all such modifications.