Technical Field

[0001] The present invention relates to a balancing circuit for balancing voltages of two capacitors connected in series.

Background

[0002] Multi-level inverters have been successfully implemented in the industry with many advantages, such as low voltage stress on devices, higher switching frequency and high efficiency.

[0003] Figs. 1A and IB show some examples of existing three-level modules. Fig. 1A shows a three-level topology 110 with Neutral-Point-Clamped (NPC) diodes, including two capacitors 1, 2, two diodes 3, 4, four switches 5, 6, 7, 8 and a filter inductor 9. Each of the four switches 5, 6, 7, 8 is connected with a diode in parallel, and may be a semiconductor switch, such as IGBT (Insulated-Gate . Bipolar Transistor), MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), and FET (Field-Effect Transistor).

[0004] Fig. IB shows a three-level topology 150 with NPC bidirectional switch, including two capacitors 1, 2, two switches 151, 152, a bidirectional switch 153, and a filter inductor 9. Similar to Fig. 1 A, each of the two switches 151, 152 is connected with a diode in parallel, and may be a semiconductor switch, such as IGBT, MOSFET, and FET. The serially connected capacitors 1, 2 and the filter inductor 9 of Fig. IB are similar to those of Fig. 1A.

[0005] However, in the multi-level inverter topologies of Fig. 1A and IB, fluctuating voltage at the neutral point becomes a concern. To suppress the voltage fluctuation and keep the voltage fluctuation at the neutral point to an acceptable level, capacitors with large capacitance or electrolytic capacitor are required, whereas the use of electrolytic capacitors leads to low reliability or limited lifetime. Summary

[0006] According to the present invention, a balancing circuit as claimed in claim 1 is provided. An inverter according to the invention is defined in claim 14. The dependent claims define some examples of such a balancing circuit or inverter, respectively.

[0007] Embodiments of the present invention eliminate the need of electrolytic capacitor and improve the reliability of power electronic devices using the balancing circuit.

Brief Description of the Drawings

[0008] In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the invention. In the following description, various embodiments are described with reference to the following drawings, in which:

Fig. 1 A to Fig. IB show examples of existing multi-level modules.

Fig. 2A to Fig. 2B show an exemplary embodiment of a balancing circuit according to the- invention, which may be included in a power electronic device, like the multi-level modules according to Fig. 1 A or Fig. IB, for example.

Fig. 3 shows a single-phase inverter according to an exemplary embodiment.

Fig. 4 shows an exemplary embodiment of a modulation scheme for the switches of the single-phase inverter according to Fig. 3.

Fig. 5 shows capacitor voltages, output voltage and load current of the single-phase inverter according to Fig. 3 when the balancing circuit is not operated.

Fig. 6A to Fig. 6B show exemplary embodiments of operation modes of the balancing circuit in the single-phase inverter according to Fig. 3.

Fig. 7 shows capacitor voltages, output voltage and load current of the single-phase inverter according to Fig. 3 when the balancing circuit is operated. Fig. 8 shows exemplary embodiments of the operation of the balancing circuit, including switching sequence of switches, capacitor voltage, voltage and current of LC resonant circuit of the balancing circuit in the single-phase inverter according to Fig. 3.

Fig. 9A to Fig. 9B show exemplary embodiments of single-phase inverters according to the invention.

Fig. 10A to Fig. 10B show exemplary embodiments of three-phase inverters according to the invention.

Fig. 1 1A to Fig. 11B show exemplary embodiments of photovoltaic inverters using current injection topology according to the invention.

Fig. 12A to Fig. 12B show exemplary embodiments of three-phase rectifiers using current injection topology according to the invention.

Fig. 13A to Fig. 13B show exemplary embodiments of instantaneous reactive power compensators according to the invention.

Fig. 14A to Fig. 14C show exemplary embodiments of single-phase inverters according to the invention.

Fig. 15A to Fig. 15C show exemplary embodiments of three-phase inverters according to the invention.

Fig. 16 shows an exemplary embodiment of a method for balancing voltages of two capacitors connected in series through a balancing circuit.

Description

[0009] Figs. 2A and 2B show exemplary embodiments of a balancing circuit 200 according to the invention. [0010] Fig. 2A shows a NPC (neutral-point-clamped) circuit 210, wherein the balancing circuit 200 is included to balance voltages of the capacitors 1, 2 in the multi-level module 110 of Fig. 1 A with NPC (neutral-point-clamped) diodes 3, 4.

[0011] As shown in Fig. 2A, the multi-level module 110 includes a first capacitor 1 and a second capacitor 2 connected in series between a first terminal 101 and a second terminal 102, with a neutral point connection 103 between the first capacitor 1 and the second capacitor 2. The multi-level module 110 further includes a subcircuit 120 which may be used to generate one phase of an AC voltage, for example. The subcircuit 120 includes a plurality of power switches, each being connected with a diode in parallel. In an exemplary embodiment shown in Fig. 2A, the subcircuit 120 includes four power switches 5, 6, 7 and 8 sequentially connected in series between the first terminal 101 and the second terminal 102, and further includes two neutral-point-clamped diodes 3, 4 connected with the neutral point connection 103, respectively. The subcircuit 120 further includes an inductor 9, through which the generated AC voltage is output.

[0012] The balancing circuit 200 includes a resonant circuit 201, and a switching arrangement 202 connected to the capacitors 1, 2 and to the resonant circuit 201. The switching arrangement 202 is configured to, in a first mode of operation, discharge one of the capacitors (e.g. the first capacitor 1) by means of the resonant circuit 201 and, in a second mode of operation, charge the other of the capacitors (e.g. the second capacitor 2) by means of the resonant circuit 201.

[0013] In an embodiment, the switching arrangement 202 includes a plurality of switches, wherein each mode of operation has a switching configuration to switch on one or more of the plurality of switches. In an exemplary embodiment shown in Fig. 2A, the switching arrangement 202 may include a first switch 10, a second switch 11, a third switch 12 and a fourth switch 13 sequentially connected between the first terminal 101 and the second terminal

102, wherein each of the switches 10, 11, 12, 13 is connected with a diode in parallel. A common connection 203 between the second switch 11 and the third switch 12 may be connected with the neutral point connection 103 of the capacitors 1, 2. It is understood that the switching arrangement may include other number of switches which may be connected or configured differently from the example of Fig. 2A to enable the switching arrangement to operate in the first mode and the second mode in other embodiments. The switching configuration corresponding to each mode of operation of the switching arrangement 202 will be described with reference to Figs. 6A and 6B below.

[0014] In an exemplary embodiment shown in Fig. 2A, the resonant circuit 201 includes a resonant inductor 14 and a resonant capacitor 15 connected in series, one end of the resonant circuit 201 being connected between the first switch 10 and the second switch 11, the other end of the resonant circuit 201 being connected between the third switch 12 and the fourth switch 13. The resonant capacitor 15 may be charged in the first mode and may be discharged in the second mode, as described with reference to Figs. 6A and 6B below.

[0015] The balancing circuit 200 is provided to mitigate voltage fluctuation at the neutral point 103 of the two capacitors 1, 2, which is, for example, included in the circuit topology 210 with NPC diodes, and the operation of the balancing circuit 200 will be described in more detail below.

[0016] Fig. 2B shows a NPC circuit 250, wherein the balancing circuit 200 described in Fig. 2A above is similarly included to balance voltages of the capacitors 1, 2 in the multi-level module 150 of Fig. IB with a NPC bidirectional switch 153.

[0017] Similar to the multi-level module 110 of Fig. 2A, the multi-level module 150 includes the capacitors 1, 2 connected in series between the first terminal 101 and the second terminal 102, with the neutral point connection 103 between the capacitors 1, 2. In the embodiment of Fig. 2B, the multi-level module 150 further includes a subcircuit 160 which may be used to generate one phase of an AC voltage, for example. The subcircuit 160 includes a plurality of power switches, each being connected with a diode in parallel. In an exemplary embodiment shown in Fig. 2B, the subcircuit 160 includes two power switches 151, 152 connected in series between the first terminal 101 and the second terminal 10, and further includes a neutral-point-clamped (NPC) bidirectional switch 153 connected with the neutral point connection 103. The subcircuit 160 further includes an inductor 9, through which the generated AC voltage is output.

[0018] Fig. 3 shows an exemplary embodiment of a single-phase inverter 300 with three- level output operating at 5KW, for example. The capacitors 1 , 2 can be chosen to have small capacitance, e.g. about 50 Ρ, since the inclusion of the balancing circuit 200 eliminates the requirement of large capacitance on the capacitors 1, 2. Accordingly, the embodiments of the invention eliminates the need to use electrolytic capacitors and makes it possible to utilize, film capacitor which are more reliable. The embodiments of the invention further helps to reduce the size of the capacitors.

[0019] The single-phase inverter 300 for converting a DC voltage into an AC voltage includes the NPC circuit 210 described in Fig. 2A above, which receives the DC voltage from a DC voltage supply 301 (e.g. of 700V) through an inductor 303 (e.g. of 10μΗ). The NPC circuit 210 includes the balancing circuit 200, the first capacitor 1 (e.g. of 50μΡ) and the second capacitor 2 (e.g. of 50μΡ) connected in series, and the subcircuit 120 for generating one phase of the AC voltage. In an example, the inductor 14 of about Ι μΗ and the capacitor 15 of about 20μΡ are selected for the resonant circuit 201 of the balancing circuit 200.

[0020] In an embodiment, the subcircuit 120 includes a plurality of power switches, each being connected with a diode in parallel. In an exemplary embodiment shown in Fig. 3, the subcircuit 120 includes four power switches S5, S6, S7 and S8 sequentially connected in series between the first terminal 101 and the second terminal 102. The subcircuit 120 may further include two neutral-point-clamped (NPC) diode 3, 4, wherein the. NPC diode 3 is connected between the neutral point connection 103 and a common connection between the power switches S5 and S6, and the NPC diode 4 is connected between the neutral point connection 103 and a common connection between the power switches S7 and S8. The subcircuit 120 further includes an AC node 305 for supplying a pulsed voltage, which is supplied to a load (e.g. having a resistance of 10Ω) through the output inductor 9 (e.g. of 2mH).

[0021] Fig. 4 shows an exemplary embodiment of a modulation scheme 400 for the power switches S5-S8 of the single-phase inverter 300 according to Fig. 3. In this example, the modulation index is set to 0.95 and the carrier frequency is set to 4kHz. According to the modulation scheme 400, one or more of the switches S5-S8 are controlled to be open or closed, so as to generate the pulsed AC voltage at the AC node 305.

[0022] In an exemplary embodiment of Fig. 4, two carrier signals 401, 403 (4kHz triangular waveforms) and one reference signal 405 (50Hz or 60Hz sinusoidal waveform) are shown. The switch S5's ON-OFF signal may be determined based on the comparison between the carrier signal 401 and the reference signal 405. For example, when the reference signal 405 is higher than the carrier signal 401, S5 is ON (1), else S5 is OFF (0). The switch S8's ON- OFF signal may be determined based on the comparison between the carrier signal 403 and the reference signal 405. For example, when the reference signal 405 is higher than the carrier signal 403, S8 is OFF (0), else S8 is ON (0). The ON-OFF signals for the switches S6 and S7 may be the same, and may be determined according to the logic function: S6 = S7 = NOT (S5 OR S8).

[0023] The modulation scheme 400 described above is an exemplary embodiment on how to control the switches S5-S8. It is understood that other modulation scheme including different modulation signals may be used to control ON or OFF of the switches S5-S8.

[0024] Fig. 5 shows capacitor voltages, output voltage and load current of the single-phase inverter 300 according to Fig. 3 when the balancing circuit 200 is not operated. In Fig. 5, the capacitor voltages Vci, Vc ₂ across the two capacitors 1, 2, the inverter output voltage Vout and the load current i] _oad of the load 307 are illustrated, supposing that the balancing circuit 200 is not operated. In that case, since AC current flows through the capacitors 1 , 2 which have small capacitance, the voltages across the capacitors 1 , 2 fluctuate with great amplitude, resulting in distorted output voltage Vout and nonrsinusoidal load current i _loa d as shown in Fig. 5. This may also break the switching devices as the voltage applied thereon may exceed their break-down limits. By operating the balancing circuit 200 according to the embodiments of the invention, the voltage fluctuation is suppressed as will be described below.

[0025] Fig. 6A to 6B shows exemplary embodiments of operation modes of the balancing circuit 200 when it is applied in the circuits of Figs. 2A, 2B and 3. The switching arrangement 202 of the balancing circuit 200 is configured to alternate between a first mode of operation and a second mode of operation. In the first mode, the switching arrangement 202 is configured to discharge one of the capacitors 1, 2 by means of the resonant circuit 201 and, in the second mode, the switching arrangement 202 is configured to charge the other of the capacitors 1 , 2 by means of the resonant circuit 201.

[0026] In an exemplary embodiment, the voltage across the capacitor 1 (CI) is higher than the voltage across the capacitor 2 (C2). In the first mode shown in Fig. 6A, a switching configuration is operated to switch on the switches SI, S3 and switch off the switches S2, S4, so as to form a conducting path between the capacitor 1 and the resonant circuit 201 through the switches SI, S3. Accordingly, the resonant current ILC discharges the capacitor 1 and charges the resonant capacitor 15 (C _ies ). In the second mode shown in Fig. 6B, a switching configuration is operated to switch on the switches S2, S4 and switch off the switches SI, S3, so as to form a conducting path between the capacitor 2 and the resonant circuit 201 through the switches S2, S4. Accordingly, the resonant current ILC changes its direction to charge the capacitor 2 and discharge the resonant capacitor 15 (C _res ).

[0027] The operation modes of the balancing circuit 200 described above are analogously valid for the embodiment when the voltage across the capacitor 2 is higher than the voltage across the capacitor 1, such that the capacitor 2 may be discharged by means of the resonant circuit 201 in a first mode (having a conducting path shown in Fig. 6B) and the capacitor 1 may be charged in a second mode (having a conducting path shown in Fig. 6A). By way of example, in the first mode, a switching configuration is operated to switch on the switches S2, S4 and switch off the switches SI, S3, so as to form a conducting path (shown in Fig. 6B) between the capacitor 2 and the resonant circuit 201 through the switches S2, S4. Accordingly, the capacitor 2 is discharged and the resonant capacitor 15 (C _res ) is charged. In the second mode, a switching configuration is operated to switch on the switches SI, S3 and switch off the switches S2, S4, so as to form a conducting path (shown in Fig. 6A) between the capacitor 1 and the resonant circuit 201 through the switches SI, S3. Accordingly, the capacitor 1 is charged and the resonant capacitor 15 (C _res ) is discharged.

[0028] By alternating the switching arrangement 202 of the balancing circuit 200 between the first mode and the second mode, the capacitor 1 sends electrical charges to the capacitor 2 via the resonant capacitor 15, or receives electrical charges from the capacitor 2 via the resonant capacitor 15. Accordingly, the voltages across the capacitor 1 and the capacitor 2 can be kept at the same level or nearly the same level.

[0029] The switching arrangement 202 may be configured to alternate between the first mode and the second mode at a predetermined frequency. In an embodiment, the resonant circuit 201 may be configured to have a resonant frequency matched or nearly matched with the predetermined frequency of the switching arrangement 202. The resonant capacitor 15 may be configured such that it blocks any possible DC current flowing into the resonant circuit 201.

[0030] Fig. 7 shows capacitor voltages, output voltage and load current of the single-phase inverter 300 according to Fig. 3 when the balancing circuit 200 is operated (e.g. at a switching frequency of 40kHz). As shown in Fig. 7, the capacitor voltages Vci, Vc ₂ across the two capacitors 1, 2 of the intermediate circuit are kept nearly constant at 350V despite the small capacitance of the capacitors 1, 2. The load current i] _oad also becomes sinusoidal.

[0031] Fig. 8 shows exemplary embodiments of the operation of the balancing circuit 200, in which zoomed waveforms of switching sequence of the switches S1-S4, capacitor voltages (Vc _1; Vc ₂ ), voltage (VLC) and current (IL _C ) of the resonant circuit 201 of the balancing circuit 200 according to Fig. 3 are shown. In an example, the predetermined switching frequency of the switches S1-S4 is set to 40kHz. As shown in Fig. 8, the capacitor CI has a higher voltage compared with the capacitor C2. With the operation of the balancing circuit 200, electrical charge is sent-from the capacitor CI to the capacitor C2 via the resonant current i _L c- As a result, the voltage Vc _\ of the capacitor CI does not increase further and is kept near 350V. Accordingly, the balancing circuit 200 according to the embodiments of the invention helps to reduce the capacitance required by the capacitors CI, C2, and enables the use of film capacitors to increase reliability of the circuit.

[0032] The balancing circuit 200 described in various embodiments above may be applied in various power electronic devices, examples of which include but are not limited to an inverter, a photovoltaic inverter, a rectifier and a reactive power compensator. Various applications of the balancing circuit are illustrated with reference to the figures below.

[0033] Fig. 9 A shows a single-phase inverter 910 with NPC diodes according to an embodiment of the invention. The single-phase inverter 910 includes the NPC circuit 210 of Fig. 2 A above, which receives a DC voltage from a DC voltage supply 901 and transmits the generated AC voltage to an AC voltage output 903.

[0034] Fig. 9B shows a single-phase inverter 950 with a NPC bidirectional switch according to an embodiment of the invention. Similarly, the single-phase inverter 950 includes the NPC circuit 250 of Fig. 2B above, which receives a DC voltage from a DC voltage supply 901 and transmits the generated AC voltage to an AC voltage output 903.

[0035] Fig. 10A shows a three-phase inverter 1010 with NPC diodes according to an embodiment of the invention. Similar to the single-phase inverter 910, the three-phase inverter 1010 includes the NPC circuit 210 of Fig. 2 A above, which receives a DC voltage from a DC voltage supply 1001 and generate one phase of an AC voltage. In this embodiment, the three- phase inverter 1010 further includes two additional subcircuits 120 described in Fig. 2 A to generate two additional phases of AC voltage and transmits the generated three-phase AC voltage to a three-phase AC voltage output 1003.

[0036] Fig. 10B shows a three-phase inverter 1050 with a NPC bidirectional switch according to an embodiment of the invention. Similar to the single-phase inverter 950, the three-phase inverter 1050 includes the NPC circuit 250 of Fig. 2B above, which receives a DC voltage from the DC voltage supply 1001 and generate one phase of an AC voltage. In this embodiment, the three-phase inverter 1050 further includes two additional subcircuits 160 described in Fig. 2B to generate two additional phases of AC voltage and transmits _, the generated three-phase AC voltage to the three-phase AC voltage output 1003.

[0037] The balancing circuit 200 according to the invention or any embodiments thereof described herein can be used in multi-level inverters as described above, as well as multi-level current injection devices as described below. The balancing circuit according to the invention aids the current injection technology, allowing application of low- voltage devices (e.g. GaN devices) to 400V AC grid.

[0038] Fig. 11A shows an exemplary embodiment of a photovoltaic inverter 11 10 according to the invention, using current injection topology. The photovoltaic inverter 1 110 receives a DC voltage from a photovoltaic generator 1101 through a DC/DC converter 1107, and includes a plurality of active switches 1105 to generate a three-phase AC voltage for supplying to a three-phase AC voltage output 1103, e.g. the power grid. The grid current i generated by the photovoltaic inverter 1110 may be distorted. In the embodiment of Fig. 11 A, the photovoltaic inverter 1110 may further include the NPC circuit 210 of Fig. 2A^ which may be used as a current injection unit to correct the distorted grid current i to a desired sinusoidal waveform by injecting a missing current to add to the distorted grid current i, wherein sum of the distorted grid current and the injected missing current may equal to the desired sinusoidal current waveform. [0039] Fig. 11B shows an exemplary embodiment of a photovoltaic inverter 1150 according to the invention, using current injection topology. Similar to the photovoltaic inverter 1110 of Fig. 11 A, the photovoltaic inverter 1150 receives the DC voltage from the photovoltaic generator 1101 through the DC/DC converter 1107, and includes the plurality of active switches 1 105 to generate the three-phase AC voltage for supplying to the three-phase AC voltage output 1103. In the embodiment of Fig. 11B, the photovoltaic inverter 1 150 may further include the NPC circuit 250 of Fig. 2B, which is used as a current injection unit to correct the distorted grid current i to a desired sinusoidal waveform by injecting a missing current to add to the distorted grid current i.

[0040] Fig. 12A shows an exemplary embodiment of a three-phase rectifier 1210 using current injection topology. The three-phase rectifier 1210 includes a plurality of diodes 1205, which receive an AC voltage from a three-phase AC voltage supply 1201 and generate a DC voltage for supplying to a DC load 1203. The diode rectifier 1210 with the diodes 1205 may produce distortion on the grid current of the power grid, e.g. the AC voltage supply 1201. In this embodiment, the three-phase rectifier 1210 further includes the NPC circuit 210 of Fig. 2 A; which may be used as a current injection unit to correct the distorted grid current to a desired sinusoidal waveform by injecting a missing current to add to the distorted grid current i, wherein sum of the distorted grid current and the injected missing current may equal to the desired sinusoidal current waveform.

[0041] Fig. 12B shows an exemplary embodiment of a three-phase rectifier 1250 using current injection topology. Similar to the three-phase rectifier 1210 of Fig. 12 A, the three- phase rectifier 1250 includes the plurality of diodes 1205, which receive the AC voltage from the three-phase AC voltage supply 1201 and generate the DC voltage for supplying to the DC load 1203. In the embodiment of Fig. 12B, the three-phase rectifier 1250 includes the NPC circuit 250 of Fig. 2B with a NPC bidirectional switch, which is used as a current injection unit to correct the distorted grid current i to a desired sinusoidal waveform. [0042] Fig. 13A shows an exemplary embodiment of an instantaneous reactive power compensator 1310 according to the invention, which includes the NPC circuit 210 of Fig. 2 A and two additional subcircuits 120 described in Fig. 2A, and further includes a three-phase voltage system 1301 and a non-linear load 1303 connected therewith.

[0043] Fig. 13B shows an exemplary embodiment of an instantaneous reactive power compensator 1350 according to the invention, which includes the NPC circuit 250 of Fig. 2B and two additional subcircuits 160 described in Fig. 2B, and further includes the three-phase voltage system 1301 and the non-linear load 1303 connected therewith.

[0044] Fig. 14A to 14C show exemplary embodiments of single-phase inverters according to the invention.

[0045] Fig. 14A shows a single-phase three-level inverter 1410 with NPC diodes according to an embodiment of the invention. Similar to the single-phase inverter 910 of Fig. 9 A, the single-phase inverter 1410 includes the NPC circuit 210 of Fig. 2 A, which receives a DC voltage from a DC voltage supply 1401 and transmits the generated AC voltage to an AC voltage output 1403. In the embodiment of Fig. 14A, the DC input 1401 is grounded, and the ground of the DC input 1401 is connected to the neutral point connection 103.

[0046] Fig. 14B shows a single-phase three-level inverter 1450 with a NPC bidirectional switch according to an embodiment of the invention. Similar to the single-phase inverter 950 of Fig. 9B, the single-phase inverter 1450 includes the NPC circuit 250 of Fig. 2B, which receives the DC voltage from the DC voltage supply 1401 and transmits the generated AC voltage to the AC voltage output 1403. In the embodiment of Fig. 14B, the DC input 1401 is grounded, and the ground of the DC input 1401 is connected to the neutral point connection 103.

[0047] Fig. 14C shows a single-phase two-level inverter 1490 (biopolar pulse width modulation) according to an embodiment of the invention. The single-phase two-level inverter

1490 includes the balancing circuit 200 of Fig. 2B, two capacitors 1, 2, and two switches 1491, 1492, each connected between the first terminal 101 and the second terminal 102 and receives the DC voltage from the DC voltage supply 1401. The generated AC voltage is output to the AC voltage output 1403 through the inductor 1493. In the embodiment of Fig. 14C, the DC input 1401 is grounded, and the ground of the DC input 1401 is connected to the neutral point connection 103.

[0048] Fig. 15A shows a three-phase three-level inverter 1510 with NPC diodes according to an embodiment of the invention. Similar to the single-phase three-level inverter 1410, the three-phase three-level inverter 1510 includes the NPC circuit 210 of Fig. 2A, which receives a DC voltage from a DC voltage supply 1501 and generate one phase of an AC voltage. In this embodiment, the three-phase three-level inverter 1510 further includes two additional subcircuits 120 described in Fig. 2 A to generate two additional phases of the AC voltage and transmits the generated three-phase AC voltage to a three-phase AC voltage output 1503. In this embodiment, the DC input 1501 is grounded, and the ground of the DC input 1501 is connected to the neutral point connection 103.

[0049] Fig. 15B shows a three-phase three-level inverter 1550 with a NPC bidirectional switch according to an embodiment of the invention. Similar to the single-phase three-level inverter 1450, the three-phase three-level inverter 1550 includes the NPC circuit 250 of Fig. 2B, which receives a DC voltage from the DC voltage supply 1501 and generate one phase of an AC voltage. In this embodiment, the three-phase three-level inverter 1550 further includes two additional subcircuits 160 described in Fig. 2B to generate two additional phases of the AC voltage and transmits the generated three-phase AC voltage to the three-phase AC voltage output 1503. In this embodiment, the DC input 1501 is grounded, and the ground of the DC input 1501 is connected to the neutral point connection 103.

[0050] Fig. 15C shows a three-phase two-level inverter 1590 (biopolar pulse width modulation) according to an embodiment of the invention. The three-phase two-level inverter

1590 includes the balancing circuit 200 of Fig. 2B, two capacitors 1, 2, and two switches 1491, 1492, each connected between the first terminal 101 and the second terminal 102 and receives the DC voltage from the DC voltage supply 1501. The generated one phase of the AC voltage is output to the AC voltage output 1503 through the inductor 1493. In this embodiment, the three-phase two-level inverter 1590 further includes two additional groups of switches 1491, 1492 and inductor 1493 to generate two additional phases of the AC voltage. The generated three-phase AC voltage is output to the three-phase AC voltage output 1503. In the embodiment of Fig. 15C, the DC input 1501 is grounded, and the ground of the DC input 1501 is connected to the neutral point connection 103.

[0051] The balancing circuit 200 according to the invention or any embodiments thereof described herein may be used in DC/ AC converters, such as motor drivers, photovoltaic inverters, power factor correction (PFC) modules, and static synchronous compensators (STATCOM). It is understood that the balancing circuit 200 according to the invention or any embodiments thereof described herein can also be applied to various power conversion devices as illustrated in some examples above.

[0052] Fig. 16 shows an exemplary embodiment of a method 1600 for balancing voltages of two capacitors connected in series through a balancing circuit. The balancing circuit may be the balancing circuit 200 described according to the various embodiments above.

[0053] At 1602, one of the two capacitors are discharged by means of a resonant circuit of the balancing circuit in a first mode of operation of a switching arrangement of the balancing circuit. The balancing circuit includes the resonant circuit and the switching arrangement connected to the capacitors and to the resonant circuit

[0054] At 1604, the other of the two capacitors are charged by means of the resonant circuit in a second mode of operation of the switching arrangement.

[0055] The capacitor which is discharged in the first mode has a higher voltage than the one which is charged in the second mode. [0056] Various embodiments described above with regard to the balancing circuit 200 and its application in various power electronic devices analogously hold true for the method of balancing voltages of two capacitors connected in series through the balancing circuit.

[0057] While the invention has been particularly shown and described with reference to specific embodiments, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. The scope of the invention is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced.