In single-ended circuits, also named unbalanced circuits, one conductor is used for carrying a signal and the ground plane is used for the return path of the signal. The conductor and the ground plane form a complete signal path. The voltage on the ground plane is then the reference for the signal. Such an unbalanced signal is also called common mode signal. In bal anced circuits, two conductors are used, one carrying the signal and the other one carrying the return signal. Such a balanced signal is also called differential mode signal.

Baiuns (balanced/unbalanced transformers) are transformers capable of converting signals between a balanced circuit at the balanced signal port side of the balun and an unbalanced circuit at the single-ended signal port side of the balun and vice versa.

It is an object of the invention to improve the signal quality provided by such a balun. The object of the invention is solved by a balun according to claim 1.

The balun comprises a balanced signal port with a first connection and a second connection. The balun further comprises a single-ended signal port with a third connection and a fourth connection, where the fourth connec tion is connected to ground. There is a first capacitor between the first connection and a first end of a first resistor and a second capacitor be tween the second connection and the first end of the first resistor. A sec ond end of the first resistor is connected to ground.

A good value for the first resistor may be between 10 W and 200 W, in particular between 20 W and 100 W. A good choice for the rated power of the first resistor may be a value be tween 0,1% and 5% of the nominal output power of the balun.

A good choice for the rated voltage of the first resistor may be a value be tween 100 V and 1000 V.

The first and preferably also the second capacitor may have values in the range of 1 pF to 800 pF.

The first and preferably also the second capacitor may be configured for a frequency between 10 khlz and 200 MFIz. The first and preferably also the second capacitor may be configured for a maximum voltage larger than 200 V.

The first resistor may serve to reduce common mode current at the bal anced signal port of the balun. It may dissipate unwanted even harmonics from possible resonances of circuits connected to this balanced signal port of the balun. The choice of the size of the first resistor is then a design choice between reducing the common mode current at the balanced signal port and minimizing the heat dissipated in the first resistor.

In an embodiment of the invention the balun may comprise a primary winding connected to the balanced signal port and a secondary winding connected to the single-ended signal port. The primary and the secondary winding may be realized in a planar manner with strip conductors on a planar circuit board. The balun may allow galvanic isolation in between in put and output connection. This may allow to connect one of the output connections to protective earth and to isolate it from DC voltages present on the input side of the circuit.

The advantage of this embodiment of the balun is that it is particularly suitable for the desired frequency range, e. g. Medium Frequencies and Radio Frequencies. With Medium Frequencies (MF) here are meant fre- quencies in the range of 9 khlz to 900 khlz and with Radio Frequencies here are meant frequencies in the range above 900 khlz up to 180 MFIz. It may allow for a smaller size of the balun, as compared to baluns which rely on the length of the transmission lines to be as long as lambda/4 of the wavelength of the conveyed signal. It has been found that there are parasitic capacitances in between the two signal ports of the balun. Due to different phase relationships of the bal anced signal and the unbalanced signal the impedance of the circuit in between the first connection of the balanced port towards ground may be different from the impedance of the circuit in between the second connec tion of the balanced port towards ground. This may lead to a different cur rent flow over these parasitic capacitances. In an embodiment of the invention, the first capacitor and the second ca pacitor of the balun may be of different capacitance value. This may allow compensating for the parasitic capacitances of the balun. The choice of the size of the first capacitor and the second capacitor may allow tuning the impedances as seen from the first and second connection, e. g. the circuit connected to the balanced port of the balun. The difference be tween the different capacitance values may be at least 10 pF, in particular at least 50 pF.

In an embodiment, the balun may include a third capacitor. The third ca pacitor may connect the second end of the first resistor to ground. This may improve the performance of the balun, as the DC voltage coming from the balanced signal port of the balun may be reduced or even cut off. This will improve the performance of the balun as its saturation with DC voltage may be avoided.

In another embodiment, the balun may include a fourth capacitor, which may connect the first capacitor and the second capacitor to ground, wherein the fourth capacitor may be connected in parallel to the first re sistor. The performance and signal quality of the balun may be improved in this embodiment as harmonics from the balanced signal port of the balun may be reduced or even cut off. The third and preferably also the fourth capacitor may have values in the range of 1 pF to 800 pF. The third and preferably also the fourth capacitor may be configured for a frequency between 10 kHz and 200 MHz.

The third and preferably also the fourth capacitor may be configured for a maximum voltage larger than 200 V. In an embodiment of the balun, the single-ended signal port may be de signed to carry a load. The load, in particular a plasma load, may be con nected to the third connection. In this configuration, the single-ended sig nal port may serve as output port of the balun and the balanced signal port may serve as input port of the balun. In another embodiment, the fourth connection of the balun may be con nected to ground in a low-inductive manner. This may also improve the performance of the balun.

A particularly low-inductive connection may be realized by one or more of the following measures: · particularly wide striplines (wider than 5 mm)

• a plurality of through-connections (more than two) between the fourth connection and a ground plane that may be arranged in a row or in an area

• particularly short striplines, for example with the ratio of length to width of the stripline being smaller than 100, more particularly smaller than 10 and preferably less than 3.

An amplifier may include a balun as described above. In a preferred em bodiment, the balun may be connected to the output port of the amplify ing stage of the amplifier and may serve as output balun. This may realize the transformation of a balanced signal at the output of the amplifying stage to an unbalanced signal at the output of the balun, as might be re quired by the load of the amplifier. This might be the case for a plasma load at the output of the amplifier in particular. In a preferred configuration, the amplifying stage may comprise a first transistor and a second transistor for achieving the amplification of the signal. The balun might then serve as the output balun of the amplifier, where the first transistor may be connected to the first connection of the balun and the second transistor may be connected to the second connec- tion of the balun. In an embodiment of the invention, the amplifying stage may be realized as a push-pull configuration of the first transistor and the second transistor.

In an embodiment of the invention, where the balun may be an output balun of an amplifier, the first resistor may dissipate unwanted even har- monies from internal resonances that may occur in the circuit of the am plifying stage. It may attenuate local resonances, in particular harmonics. Overshoots in drain voltage may be minimized, so that drain voltage may go up to around 650 V for matched conditions. Matched conditions may be achieved when the impedance of the load is matched to the impedance of the output port. This impedance may preferably be in the range of 20 W to 100 W, especially 50 W +/- 10 W.

Preferably, the amplifier may be an amplifier for the Medium Frequency (MF) range between 10 khlz to 2 MFIz, in particular 10 khlz to 1 MFIz, pref erably 100 khlz to 2 MFIz. In another preferred embodiment of the inven- tion, the amplifier may be an amplifier for the radio frequency range from 2 MFIz up to 200 MFIz. The amplifier might be configured to realize a high power amplifier, in particular a switch mode amplifier, more particularly a class E amplifier or a Class D amplifier In one embodiment the amplifier might be configured to work in a class F or invers Class F (Class F ^_1 ) mode.

The basic circuits and functionality of Class D, E, F and F ^_1 amplifiers are described e.g. in EP 1601 098 B1 in particular in Fig 1 and 2A - 2F and corresponding paragraphs [006] to [0014].

In order that the features and advantages of the present invention may be further appreciated embodiments will now be described, by way of exam ple only, with reference to the accompanying schematic drawings, of which:

Fig. 1 represents a schematic view of a balun;

Fig. 2 represents a schematic view of an amplifier including a balun;

Fig. 3 represents schematic view of a possible structure realizing a

balun. Fig. 1 shows a balun 100 with a balanced port 110 comprising a first con nection 130 and a second connection 140. The balanced port 110 is con nected to a first winding 10 of the balun 100. Connected to the second winding 20 of the balun 100 is the unbalanced port 120 comprising a third connection 150 and a fourth connection 160. The fourth connection 160 is connected to ground 30. In the case where the balanced port 110 is the input port of the balun 100 and the unbalanced port 120 is the output port of the balun 100, the first winding 10 could for example be called the pri mary winding of the balun and the second winding 20 could for example be called the secondary winding of the balun 100. The balun 100 may also be operated in the inverse direction, i. e. the balanced port 110 being the output port and the unbalanced port 120 being the input port.

Shown in Fig.1 are the parasitic capacitances C _par a in between the first winding 10 and the second winding 20. Also shown are a first capacitor 170 and a second capacitor 180 to allow for compensation of the parasitic capacitances C _pa ra . Due to different phase relationships of the balanced signal and the unbalanced signal the impedance of the circuit in between the first connection 130 of the balanced port 110 towards ground 30 is different from the impedance of the circuit in between the second connec- tion 140 of the balanced port 110 towards ground 30. This leads to a dif ferent current flow over these parasitic capacitances C _para · Therefore, the first capacitor 170 and the second capacitor 180 of the balun 100 may be chosen to be of different size. This allows compensating for the parasitic capacitances C _para of the balun 100. The choice of the size of the first ca- pacitor 170 and the second capacitor 180 allows to tune the impedances as seen from the first connection 130 and second connection 140, e. g. the circuit connected to the balanced port 110 of the balun 100.

The first capacitor 170 is connected to the first connection 130 on one side and to a first end 210 of a first resistor 190 on the other side. The second capacitor 180 is connected to the second connection 140 on one side and the first end of the first resistor 190 on the other side. The second end 220 of the first resistor 190 is connected to ground 30. The advantageous effect of the first resistor 190 is that any unwanted common mode current flowing from both connections 130, 140 of the balanced port 110 can be limited via the first resistor 190. This is particularly advantageous in case there is a risk of resonance of common mode current in the circuit. This might be the case of the balun 100 being an output stage of an amplifier 250 (Fig. 2), where the first resistor may then dissipate unwanted even harmonics from internal resonances in the amplification stage of the am plifier 250.

In the embodiment shown in Fig. 1, a third capacitor 200 is placed in be tween the second end 220 of the first resistor 190 and ground 30. The third capacitor 200 can be designed to cut direct current voltage coming from the balanced port 110. In a further embodiment of the invention a fourth capacitor (not shown) can be connected in parallel to the first resis tor 190. The aim of this fourth capacitor is to cut harmonics voltage com ing from the balanced port 110. This embodiment can be realized with or without the third capacitor 200.

Figure 2 shows a high-frequency amplifier 250 with an amplification stage 260 that has two output connections 270, 280. The output connections 270, 280 are connected to the input connections 130, 140 of a balanced port 110 of a balun 100. The balun 100 has an output port 120 with connections 150, 160. Output connection 160 is connected to ground 30. A load not shown here, in par ticular a plasma load, can be connected to output connection 150.

The amplification stage 260 has switching elements SI, S2, which in this case are designed as transistors, in particular as LDMOS transistors. The switching elements SI, S2 are controlled via a signal transformer 210. The balun 100 is thus connected to a balanced signal on the input side and to an unbalanced signal on the output side.

The input connections 130, 140 of the balun, which has a primary winding 10 and a secondary winding 20, are connected to ground 30 via capacitors 170, 180. The capacitance of the first capacitor 170 is preferably not equal to the ca pacitance of the second capacitor 180. The first and second capacitors 170, 180 allow the impedances represented by the balun 100 for the switching elements SI, S2 to be tuned. Usually the first and second ca- pacitors 170, 180 are assumed symmetrical, since both switching ele ments SI, S2 should see the same impedance. However, different capaci tances of capacitors 170, 180 may be foreseen. This may improve the performance of the balun 100. This due to the fact that the effects that cause parasitic capacitances can be at least partially compensated or elim- inated by the first and second capacitors 170, 180. The parasitic capaci tances occur, for example, between the input and output connections 130, 140 and 150, 160. They are marked as C _par a in Figure 1.

Capacitors 170, 180 can at least partly be designed as discrete capacitors 170', 180' (Fig.3). Alternatively or additionally, it is also conceivable to form the first and second capacitors 170, 180 at least partially by means of striplines on a printed circuit board (PCB) which are spaced from a ground plane 310, which can for example be a metallic ground plane. This is particularly useful with a planar design of the balun 100, as shown schematically in Fig.3. First resistor 190 can be seen near the first and second capacitors 170, 180, connected with on of its connections to the capacitors 170, 180 and with the other end to ground directly or via a third capacitor (not shown in Fig.3). Also an optional fourth capacitor (not shown in Fig.3) may be electrically connected in parallel to the first resis tor 190. The stripline 20' of the secondary winding 20 of the balun has a different number of turns/windings than the primary winding 10. The stripline 10' of the primary winding 10 has a smaller width at least in one area than in other areas. The size of the capacitors 170, 180 can be adjusted by this measure. Capacitors 170, 180 are thus at least partially realized by the striplines 10', 20', through which the primary winding 10 and the secondary winding 20 are constructed.

In particular, the capacitance of the first and second capacitors 170, 180 can result from the width of the striplines and the distance between the striplines and a ground plane 310. The ground plane 310 may be used as a cooling plate and is advantageously cooled by a fluid, for example water.

The capacitance of the capacitors 170, 180 can also be influenced by a suitable choice of the insulation material of the printed circuit board

(PCB), in particular by the dielectric constant of the material. Capacitors 170, 180 are arranged in the immediate vicinity of secondary winding 20 and primary winding 10. This means that the side length or diameter of the area of the secondary winding 20 and primary winding 10 is greater than the distance of the secondary winding 20 and primary winding 10 from the terminals 130, 140, 150, 160 to the capacitors 170, 180.