REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of priority of U.S. Provisional Application Number 62/773,404 filed November 30, 2018, entitled“BANDWIDTH CAPTURE EXTENSION FOR DOCSIS AND FULL DUPLEX CABLE MODEMS”, the contents of which are herein incorporated by reference in their entirety.

FIELD

[0002] The present disclosure relates to communication technology, and more specifically to bandwidth capture extension for cable modems.

BACKGROUND

[0003] Cable modems (CMs) are generally used to connect or bridge a local network with a larger network, such as the Internet. The CM is a network bridge that can provide communication over a medium, such as hybrid fibre-coaxial (HFC) and radio frequency over glass (RFoG).

[0004] Data Over Cable Service Interface Specifications (DOCSIS) is a standard series used to provide Internet to cable subscribers. A DOCSIS 3.1 or DOCSIS 4.0 cable modem (CM) is a client-side end point in a point-to-multipoint cable network which provides IP connectivity to one or more customer premises equipment (CPE) attached, e.g., via the CM having a service connection to broadband Internet over a medium such as coaxial cable, fiber or HFC.

[0005] CMs utilize bandwidth to transfer and receive data and control

information, especially with respect to DOCSIS. The greater the utilization of this bandwidth, the greater the data rate and other properties of communication can be provided. Techniques to facilitate bandwidth usage for cable modems (CM) are needed. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Fig. 1 is a diagram illustrating a cable modem architecture for capturing additional bandwidth in accordance with one or more embodiments.

[0007] Fig. 2 is a diagram illustrating a full duplex (FDM) cable modem

architecture in accordance with one or more embodiments.

[0008] Fig. 3 is a diagram illustrating an architecture 300 having processing modules or circuits for a cable modem architecture in accordance with one or more embodiments.

[0009] Fig. 4 is a flow diagram illustrating a method 400 of demodulation in accordance with one or more embodiments.

[0010] Fig. 5 is a flow diagram illustrating a method 500 of capturing bandwidth for a cable modem in accordance with one or more embodiments.

[0011] Fig. 6 is a flow diagram illustrating a method 600 of capturing bandwidth for a cable modem in accordance with one or more embodiments.

DESCRIPTION

[0012] The present disclosure will now be described with reference to the attached drawing figures, wherein like reference numerals are used to refer to like elements throughout, and wherein the illustrated structures and devices are not necessarily drawn to scale. As utilized herein, terms“component,”“system,”“interface,” and the like are intended to refer to a computer-related entity, hardware, software (e.g., in execution), and/or firmware. For example, a component can be a processor (e.g., a microprocessor, a controller, or other processing device), a process running on a processor, a controller, an object, an executable, a program, a storage device, a computer, a tablet PC and/or a user equipment (UE) (e.g., mobile / wireless phone, etc.) with a processing device. By way of illustration, an application running on a server and the server can also be a component. One or more components can reside within a process, and a component can be localized on one computer and/or distributed between two or more computers. A set of elements or a set of other components can be described herein, in which the term “set” can be interpreted as“one or more.” [0013] Further, these components can execute from various computer readable storage media having various data structures stored thereon such as with a module, for example. The components can communicate via local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network, such as, the Internet, a local area network, a wide area network, or similar network with other systems via the signal).

[0014] As another example, a component can be an apparatus with specific functionality provided by mechanical parts operated by electric or electronic circuitry, in which the electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors. The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, a component can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute software and/or firmware that confer(s), at least in part, the functionality of the electronic components.

[0015] Use of the word exemplary is intended to present concepts in a concrete fashion. As used in this application, the term“or” is intended to mean an inclusive“or” rather than an exclusive“or”. That is, unless specified otherwise, or clear from context, “X employs A or B” is intended to mean any of the natural inclusive permutations. That is, if X employs A; X employs B; or X employs both A and B, then“X employs A or B” is satisfied under any of the foregoing instances. In addition, the articles“a” and“an” as used in this application and the appended claims should generally be construed to mean“one or more” unless specified otherwise or clear from context to be directed to a singular form. Furthermore, to the extent that the terms "including", "includes", "having", "has", "with", or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term

"comprising."

[0016] In consideration of described deficiencies or needs of CM architectures one or more embodiments are disclosed that extend a capture bandwidth of an analog front end (AFE) to greater than about 1 .2 GHz (e.g., 1218 MHz), or up to at least about 1 .8 GHz (e.g., 1812 MHz) without altering an interface connected between the AFE and the silicon on chip (SoC). One or more embodiments include one or more modifications to the AFE to enhance a captured bandwidth, but maintain the interface that is configured for the 1 .2 GHz band only.

[0017] For example, a SoC can be configured to generate a baseband signal from a remodulated signal. An interface located between the SoC and the AFE can be configured to provide the remodulated signal. The AFE can receive an RF signal having a first spectrum (e.g., up to 1 .8 GHz or greater thanl .2 GHz), identify a plurality of channels in the RF signal, and remodulate one or more channels of the plurality of channels based on a remodulation threshold (e.g., about 1 .2 GHz, or the like). The AFE can generate the remodulated signal having the remodulated channels, un-changed channels, or combination thereof. The remodulated signal can have a second spectrum that is less than or equal to the first spectrum of frequency, for example.

[0018] The remodulation threshold, for example, can be about 1 .2 Giga Hertz (GHz), another frequency, or be within a frequency GHz range (e.g., 1 .218 MHz or below). The first spectrum, for example, can be up to about 1 .8 GHz, or another frequency / frequency range than the remodulation threshold. Thus, the AFE can re-locate by remodulation one or more lower channels of the plurality of channels below the remodulation threshold into a main downstream (DS) path. Such a re location can operate to squeeze the digitized output of the AFE so that signal samples are closer together or more proximate to one another.

[0019] In other aspects, the AFE can re-locate the one or more remodulated channels into a feedback path to communicate the remodulated signal to the SoC, while using main signal pathways of the interface also for un-changed signals or remodulated signals also being communicated concurrently or at the same time.

[0020] The AFE or other component of the cable modem (CM) can also be configured to generate frequency information for the one or more remodulated channels. The frequency information includes can include a frequency offset, a timing offset, or other synchronization data (location data) to indicate changes related to the remodulated signal, such as an original center frequency for the one or more remodulated channels or the like for shaping of the signal at decoding, for example. [0021] Additional aspects and details of the disclosure are further described below with reference to figures.

[0022] FIG. 1 is a diagram illustrating cable modem architecture 100 for capturing additional bandwidth in accordance with one or more embodiments and communicating them based on a re-modulation or a different location than the original. The architecture 100 is provided for illustrative purposes and it is appreciated that suitable variations are contemplated.

[0023] The architecture 100 is shown as a connectivity block diagram and includes an analog front end (AFE) 102 and a silicon on chip (SoC) 104. The architecture 100 can be used with various versions of the Data Over Cable Service Interface Specification (DOCSIS) including, but not limited to, DOCSIS 3.0, 3.1 , 4.0 or otherwise. Full Duplex CMs, or the like as the interface 106. The architecture 100 can be used or integrated in, or as a CM, CMTS, or the like. The architecture 100 can be or included with an apparatus or other device components as well and not limited alone to the components illustrated in the architecture 100. In various embodiments, the interface 106 can be configured for a lower spectrum than the input received at the AFE 102 or than the AFE 102 is configured to process with an analog to digital conversion.

[0024] Cable modems can utilize the HFC and RFoG networks to deliver high bandwidth broadband internet access. The cable modems provide relatively low cost internet access at relatively high speeds, for example with orthogonal frequency division multiplexing (OFDM) with coded OFDM modulation.

[0025] A full duplex (FDX) or half duplex (HDX) Cable Modem (CM) architecture or system includes the AFE 102 and the SoC 104. The AFE 102 can be implemented as a separate integrated circuit (IC) from the SoC 104. This AFE 102 and the SoC 104 communicate using an interface 106 between them.

[0026] Cable modem implementations, such as a FDX CM, can be configured to support captured signal bandwidth up to 1218 MHz. For example, DOCSIS 3.1 or DOCSIS 4.0 includes signal bandwidth up to 1218 MHz. Further, the interface between the AFE 102 and the SoC 104 carries digitized samples of this band without option of extension. The AFE 102 however can be configured to increase the captured bandwidth by increasing an analog to digital converter (ADC) bandwidth, performing block analog down conversion and using an additional ADC or analog to digital conversion, extending an ADC frequency range, under sampling, or another suitable technique. Then a digital frequency translation can be performed in the AFE 102, such that downstream orthogonal frequency division multiplexing (OFDM) and single carrier - quadrature amplitude modulation (SC- QAM) channels on a digitized interface band are arranged to fixed locations or re located to different locations than channels with a different frequency. In one example embodiment, five OFDM channels and 32 SC-QAM channels can fit into the 1218 MHz band of the interface 106 based on a re-location or re-modulation of the inputs. As such, the AFE 102 with interface 106 to the SoC 104 system is configured to enable an extension of bandwidth captured and processed for DOCSIS and full duplex cable modems.

[0027] The SoC 104 can comprise SoC software (SW) with or without other components illustrated in this example, and be configured to handle or perform frequency translation and association with original frequencies. The SoC 104 can be configured, for example, to perform Clock Frequency adjustments based on a frequency translation. This can enable the AFE 102 to capture 1800 MHz (e.g., 1812 MHz) or more of bandwidth without modifying the SoC 104 or the interface 106 between the AFE 102 and the SoC 104, and enable the interface 106 to be kept at / remain configured for about a 1200 MHz (e.g., 1218 MHz band, or the other less frequency) to transfer data or input signals originally received on a higher frequency band.

[0028] The DOCSIS is an international telecommunications standard that permits or facilitates use of existing cable television (CATV) systems based on an infrastructure, such as the HFC and RFoG to provide high bandwidth broadband Internet access. The infrastructure can further include or utilize coaxial cable.

[0029] CMs can utilize half duplex communication or full duplex communication using upstream or downstream channels or links. The CMs can be coupled to a cable modem termination system (CMTS) to facilitate operation.

[0030] The AFE 102 is configured to receive a radio frequency (RF) input signal from an infrastructure (component) 108 and generate a digitized RF interface signal. A CM interface 106 carries the digitized RF interface signal to the SoC 104. As shown below, the AFE 102 remodulates or frequency converts the RF input signal to the digitized RF interface signal. The digitized RF interface signal can also be referred to as a remodulated signal or remodulated channel that has been modulated from a higher frequency spectrum to a lower frequency that the interface 106 is configured or rated for in downstream in full or half duplex communication.

[0031] The AFE 102 is also configured to generate an RF output signal to the infrastructure based on a digitized RF output signal from the SoC 104 via the CM interface 106.

[0032] The CM interface 106 can comprise one or more serial lanes used to stream (transfer) data between the SoC 104 and the AFE 102. The SoC 104 can be a cable modem chipset, firmware, and the like. In another example, the SoC 104 is a cable modem chipset. In another example, the SoC is a DOCSIS compatible cable modem chipset.

[0033] As illustrated, in RX direction the AFE 102 can be the transmitting side and the SoC 104 can be the receiving side. The resource blocks (RBs) of each spectrum section carrying data can be about 192 MHz or otherwise, for example, with one or more OFDMs. As illustrated, different formats can be accommodated for legacy bands in the upstream (US) or downstream direction (DS). Likewise, in the TX direction the AFE 102 is the receiving side and the SoC 104 is the transmitting side.

[0034] The AFE 102 is configured to convert a frequency or frequencies of at least a portion of the RF input signal to a destination frequency (or based on a remodulation threshold / frequency) by using digital frequency translation, with the frequencies being referred to as a bandwidth or spectrum. The destination frequency is for the digitized RF interface signal provided to the SoC 104 by the interface 106. This conversion is also referred to as re-modulation of the RF input signal, or can be a re-location of the channels along the spectrum. The destination frequency can be reduced from the spectrum of the RF input signal. In one example, the RF signal has a spectrum of about 1 .8 GHz whereas the reduced spectrum is at about 1 .2 GHz. As such, the AFE 102 can operate at a 1 .8 MHz or 1812 GHz without changing the SoC 104, the AFE-to-SoC interface 106. This can be based on a particular remodulation threshold (destination frequency) so that only those signals not satisfying the remodulation threshold are re-located to be below or within satisfaction of the threshold to conform to the interface 106 structure.

[0035] The AFE 102 can be configured to capture the spectrum of the infrastructure 108 using any one of several techniques. For example, the AFE 102 can operate by extending an ADC of the AFE 102 to a higher frequency range, performing analog down conversion and digitization by an auxiliary ADC, utilize under sampling, or other suitable methods of down conversion and digitization for remodulation of particular channels of the RF input for communication via the interface 106.

[0036] The RF input signal 1 10 is illustrated as having example channels such as, an upstream channel (US), downstream channel (DS), a DS SC-QAM channel (e.g., DS SC-QAM x32), and the like. The AFE 102 samples and passes channels less than a remodulation threshold, which in this example embodiment can be about 1 .2 GHz. Thus, the AFE 102 passes these channels without remodulation (unchanged) to the SoC 104 as or in the form of“unchannelized” (meaning the channels are in pass band and not in base band) 1 .2 GHz of downstream spectrum which encompasses the DS channels here. When the DS spectrum of the RF input signal is more than or greater than the remodulation threshold (e.g., about 1 .2 GHz, or other threshold frequency), the higher frequency channels or selected channels from among the RF input are remixed, remodulated, or moved to below the remodulation threshold (1 .2 GHz). The unchanged channels are below the remodulation threshold or within the reduced spectrum. The

remodulated channels are moved to also fall within the reduced spectrum so that all signal portions of the RF input are passed to the SoC 104 despite being higher than the interface 106 is configured for.

[0037] In one example embodiment, the AFE 102 can be configured to only re locate or re-modulate downstream channels and not upstream ones sent over the same interface 106. The interface 106 can also concurrently or at the same time provide remodulated DS channels with unchannelized DS channels in the unchannelized spectrum. The AFE 102 can perform the re-locating of the re modulated downstream channels by squeezing the higher RF inputs at or below the 1 .2 GHZ, as shown in the interface main DS path 1 12 or feedback path 1 14. This can be done without any hardware change or upgrade to the interface or the SoC 104, which can remain at about a 1 .2 GHz interface or 1.2 GHz processing.

[0038] It is appreciated that DOCSIS requirements limit a number of DS channels a cable modem should receive to a certain number, for which the aggregated bandwidth is less than 1.2 GHz. Spectrum of the RF input signal above 1 .2 GHz is remixed to channels within the 1 .2 GHz band or range (0 to 1 .2 GHz).

[0039] In an aspect, the AFE 102 can be configured to channelize or remodulate DS channels that are above the remodulation threshold (e.g., 1 .2 GHz or other threshold frequency based on the interface 106) to frequencies about, at or below 1 .2 GHz. The remodulated DS channels are remodulated so that they do not overall interfere with other DS channels. Thus, the AFE 102 can be configured to remodulate frequency channels to another frequency

[0040] These remodulated DS channels can be re-located and moved closer together on the spectrum for transmission with additional information about them sent via a component of the CM 100. As such the AFE 102 can also be configured to pass information such as re-location / frequency information on final frequency locations of each channel within the remodulated signal to the SoC 104, on the feedback path 1 14, the main path 1 12 or other communication path to the SoC 104 or processing component of the SoC. This information can include one or more of: a frequency offset, a timing offset, which can be based on an original center frequency for the one or more remodulated channels. This information can also indicate what (e.g., unchannelized or remodulated signal / channel(s)) is being fed over the feedback path 1 14 or the main path 1 12 as well as whether one or both are being used for downstream communication. In an embodiment, downstream communication can be used only for re-modulation or re-location of RF input portions and not the upstream. Because the interface 106 is configured to operate at a lower frequency range than the AFE 102, re-location of the channels is not as necessary in US as in the DS direction.

[0041] The SoC 104 can also be configured to use the final frequency locations to analyze and determine timing offsets for demodulated channels, which can also be based on or used to derive original location information. [0042] Thus, the architecture 100 allows capture of bandwidth or spectrum above or greater than the spectrum used by the interface 106 or the SoC 104, so that the interface 106 and the SoC 104 can remain relatively unmodified in operation along with legacy operations and the AFE 102 operate at a high frequency range of operation. This additional bandwidth captured can also be referred to as a bandwidth capture extension.

[0043] Fig. 2 is a diagram illustrating a full duplex (FDM) cable modem architecture 200 in accordance with one or more embodiments. The architecture or arrangement 200 performs remodulation of an RF input signal to a remodulated digitized signal with embodiments described herein and provides further detail to Fig. 1 as illustrated. The arrangement 200 can be used as or with a cable modem, such as a DOCSIS modem.

[0044] The arrangement 200 includes the AFE 102 and the SoC 104. Additional description of the AFE 102 and the SoC 104 are provided with regard to Fig. 1.

The AFE 102 includes one or more receivers (RX) and one or more transmitters (TX) or transceivers 212, a resampling circuit 216, a remodulation circuit 218, a serializer/deserializer circuit (serdes) 220 and a controller (uC) 214.

[0045] The receiver(s) RX of one or more transceivers 212 can each include input(s) to the AFE 102 followed by LNA (Low Noise Amplifier) and Analog to Digital Converter (ADC). The transmitter(s) TX of one or more transceivers 212 can include a converter (Digital to Analogue Converter- DAC) and a gain module or amplifier.

[0046] The controller (uC) 214 includes one or more processors with memory and is configured to execute one or more instructions from memory to perform operations of the AFE 102. The controller (uC) can control or cause other elements of the AFE 102 to operate.

[0047] The RX(s) 212 can be configured to receive the RF input signal.

Couplers and filter 210 are configured to obtain the RF input signal from the infrastructure 108, such as a coaxial cable, component or other circuitry. In one example configuration, the couplers and filters 210 components can include filter 202 connected to a first TX output and an amplifier 21 1 , which is connected to a filter 207 and a first adder (or comparator). The second TX output is connected to filter 203, which is connected to another second adder. A first RX can be connected to filter 205 at an input thereto, which is connected to the another second adder and the filter 201 . The filter 201 is also connected to the first adder and to another input of the first RX. The second RX is connected at an input to filter 206, which is also connected to a different third adder and the first adder. The bottom most TX can be connected to the filter 204 and to the different third adder as a part of at least one feedback path 208, for example.

[0048] The resampling circuit 216 samples or resamples the RF input signal. The RF input signal can have a plurality of channels where one or more of the RF signals can satisfy a remodulation threshold (1 .2 GHz for examples) by being at or below the threshold. Additionally or alternatively, one or more channels can also be above the remodulation threshold, and thus not satisfy the threshold, for example.

[0049] The remodulation circuit 216 is configured to remodulate one or more of the channels of the RF input signal to bands below the remodulation threshold to generate remodulated signal(s) based on the embodiments described herein. For example, this remodulation circuit 216 can operate to re-locate portions or channels of the RF input to a different location along the spectrum based on the interface 106. In the DS, the samples can be moved closer to one another with the channels of higher frequency (above the remodulation threshold) moved below the threshold so that the interface 106 can be configured to provide inputs beyond the capability of the interface 106 to the SoC 104 as remodulated.

[0050] The serdes 220 is configured to serialize the remodulated signal and provide the remodulated signal to the CM interface 106. The CM interface 106 carries the remodulated signal to the SoC 104, where a serdes 224 of the SoC 224 deserializes the remodulated signal.

[0051] The SoC 104 can include the serializer-deserializer (serdes) 224, a digital signal processor (DSP) 222 and a DOCSIS modem and echo canceller (EC) engine 226, for example. These components can operate to reshape the signal received over the interface 104 based on synchronization information or other information, for example.

[0052] Timing clock offset affecting channels are the same for full bandwidth capture architecture used in DOCSIS 3.1 , 4.0 and FDX CMs. Each channel has a frequency offset proportional to a timing offset and the center frequency. The frequency recovery loop, which may rely on the knowledge of the absolute RF frequency value of the transmitted signal, is updated with this information through SW.

[0053] It is appreciated that additional analogue and mixed signal processing modules or circuits can be used for sampling the received RF signal, which are not shown in Figs. 1 and 2. For example, in DOCSIS 3.1 , 4.0, FDX, there is full bandwidth capture meaning that a downstream spectrum is digitized in one go or start leading to all channels in the spectrum subjected to or having the same timing errors.

[0054] Fig. 3 is a diagram illustrating an architecture 300 having processing modules or circuits for a cable modem architecture in accordance with one or more embodiments. The architecture or arrangement 300 can also be referred to as a synchronization apparatus or circuit that operates as a component of, or as a part of micro 214, DSP 222, or separately as software, hardware or a combination of hardware and software.

[0055] A digital front end (DFE) 312 can be used for processing of full bandwidth digital samples of DS channels or signal into individual DOCSIS channels. In one example, it is assumed that there are no sample rate or frequency offset corrections done in the AFE 102 or the DFE 312.

[0056] A resample / phase rotate module 314 is utilized for correcting sample rate offset(s) and frequency offset(s) on the RF input signal. Timing phases used for resampling can be derived by a numerically controlled oscillator (NCO) driven with a sample rate offset. The Phase for Complex phasor used to correct frequency offset is derived by an NCO driven with a frequency offset.

[0057] A carrier frequency and Timing recovery component (module) 316 keeps track of frequency and time offset of the channel. This component 316 forms or configures the loop filters of Carrier Recovery loop (CRL) 332 and Timing

Recovery Loop (TRL) 330. These loop filters could have proportional and integral branches to work out Frequency and Timing offset(s) based on frequency and timing error coming from a Frequency Domain Processing (FDP) module 318.

[0058] A TRL NCO 330 uses the timing offset to drive the controlled oscillator thereat, which keeps track of sampling phase for output samples and determines when output samples are to be generated by the Resampler 314 (generate sample_valid). The Resampler 314 generates timing offset corrected samples and outputs them with accompanying sample valid. A CRL NCO 332 uses a frequency offset estimate and drives a controlled oscillator to work out a multiplicative phasor to correct the frequency offset from the output of the Resampler 314. Sample rate and frequency offset corrected samples are provided to fast Fourier Transform (FFT) component 322.

[0059] An OFDM symbol Timing module 320 keeps track of OFDM symbol boundaries. This is done, for example, by first working out OFDM symbol boundaries using suitable techniques, such as cyclic prefix correlation. Also fine trigger adjustments can be used to trigger point(s) in OFDM Symbol Timing, which may come from hardware / software based processing of a channel impulse response (where the channel impulse response can be calculated from a channel estimate such as at FDP 318). In one example, adjustment trigger adjustments are based on SW processing of channel frequency response. Keeping track of symbol boundaries is done by counting signal samples using the sample-valid coming from Resample module 314, which are at the correct rate after sample rate correction at the Resampler 314. The trigger point is advanced from symbol to symbol by counting the correct number of samples, N + N _G , in the OFDM symbol, where N is the number of samples in OFDM useful symbol duration and N _G is the number of samples in cyclic prefix.

[0060] The FFT circuit 322 calculates the discrete Fourier transform (DFT) for a time domain OFDM signal taking the signal to frequency domain. In frequency domain, OFDM sub-carriers can be processed by frequency domain processing (FDP) component 318.

[0061] The FDP module 318 processes the frequency domain OFDM symbols to work out time and frequency error (residual after current correction in

Resampler/Phase rotator module). This can be done using phase information carried in continuous pilots in the OFDM signal, in which a suitable algorithm or set or processing operations can be employed here. Time and Frequency error coming from the FDP 318 is passed on to CRL/TRL loop filters 316 to update the Time and Frequency offset estimates.

[0062] A CM control component 324 (as 214 / 222) can manage functions and integrity of the synchronization system. When the channel is running as normal in DS, the control component 324 instructs Carrier/Time recovery loops 316 to work as normal. If the channel is frozen (switched to US) so that remodulation is not a priority, then the CRL/TRL loops are frozen, and frozen time and frequency offset values from CRL/TRL loop filters 316 can be fed to NCOs 330, 332.

[0063] In a full bandwidth capture receiver there can also be a similar timing offset in the channels as part of the synchronization information. Alternatively, or additionally, the frequency offset can be proportional to the timing offset and the center frequency of the channel.

[0064] The processing components (e.g., 324, 214 or 222) can consider an analytic representation of signal at a cable modem input for a channel, s(t)e ^2njfct , (eqn. 1 ), where s(t) is the baseband signal and f _c is the carrier (RF) frequency.

[0065] The sample period can be denoted by samples at receiver T' and Node

T where a sample rate offset can be represented as: AT =

[0066] The sampled signal at the cable modem can be represented as, qn. 2).

[0067] A down conversation or a down convert to baseband for demodulation (this happens in DFE) can be represented as follows: s(nT') =

(eqn. 3).

[0068] Re-sampling of the signal at the Resample component 314 converts the signal into Node sample period T. This can be done by first converting the signal to continuous time by setting n = t/T' , and then resampling by setting t = nT, and then the down conversion represented as: s

(eqn. 4).

[0069] Hence, the frequency offset due to timing offset can be represented by, Af = f _c AT (eqn. 5).

[0070] The Frequency offset normalized by the sample rate, can be represented by, Af = f _c AT (eqn. 6) where a normalized carrier frequency with respect to sample rate is given by % = f _c T.

[0071] The Normalized frequency offset at the cable modem can be

represented as: Af = AfT.

[0072] Hence, the frequency offset for the channel can be set based on the timing offset, and the timing offset for the channel can be set or based on the frequency offset for the channel. [0073] FIG. 4 illustrates a process 400, in which for the architecture 100, 200 and 300, digital down conversion of individual channels as given in equation (3) can be done in two steps as follows: Step 1 at 402, the AFE 102 places one or more channels at a location somewhere within 1218 MHz or 1 .2 GHz spectrum by applying the frequency offset of f _cl. One or more of these channels can be part of the RF input that is above the remodulation frequency threshold, for example. This threshold is based on the configuration of the interface 106, as discussed herein.

[0074] At 404, the DFE 312 can apply another frequency offset f _c2 = f _{c ~} f _{c i} ^t0 take it to baseband for demodulation.

[0075] Therefore, demodulation at the SoC, for example, uses f _cl and f _c to work out the frequency shift to convert the channel to zero IF. Once the AFE 102 and DFE 312 together apply the full RF frequency, f _c, down conversion to the channel, the signal being communicated, can look similar to the signal resulting from applying the RF frequency correction together in at one time as in eqn. 3.

[0076] Fig. 5 is an example flow diagram illustrating a method 500 of capturing bandwidth for a cable modem in accordance with one or more embodiments. The method 500 is provided for illustrative purposes and it is appreciated that suitable variations are contemplated.

[0077] The method 500 can be performed using the above architectures 100, 200 and 300 and variations thereof. Further, the method 500 can be performed using one or more processors that execute instructions from a memory.

[0078] The method begins at block 502 where an RF signal is obtained from an infrastructure by an AFE 102. The RF signal is at a first spectrum, also referred to as an expanded spectrum. In one example, the first spectrum can be about 1 .8 GHz.

[0079] A circuit or the AFE 102 identifies channels of the RF signal at block 504 that fall outside a second spectrum, also referred to as a reduced spectrum. In one example, the second spectrum can be about 1 .2 GHz.

[0080] The circuit or the AFE 102 moves or remodulates the identified channels to a path or frequency range within the second spectrum at block 506.

[0081] Channels of the RF signal within the second spectrum are passed as unchanged at block 508. [0082] The circuit or the AFE 102 generates a digitized serialized signal can be in the downstream having the unchanged channels at block 510. A serializer can be used to serialize the signal. The circuit or the AFE can also generate timing/frequency information for the moved channels, such as original center frequency.

[0083] A synchronization circuit generates offsets, as well as other

synchronization information and the like for the moved or remodulated channels at block 512. In one example, the arrangement 300 is used to generate the offsets, synchronization information or the like.

[0084] A baseband signal is generated from the serialized signal using the generated offsets and the like at block 514.

[0085] The method 500 is presented in an order for illustrative purposes.

However, it is appreciated that the blocks can be performed in other suitable orders. Further, additional blocks can be performed or one or more of the blocks can be omitted. Additionally, suitable variations of the method 500 are

contemplated.

[0086] Referring to FIG. 6, illustrated is another example process flow 600 for capturing bandwidth extension for full duplex cable modems.

[0087] At 602, the method initiates with receiving RF signals from an infrastructure, other component or device, where the RF signals comprise frequencies in a first spectrum of frequencies.

[0088] At 604, the process flow includes analyzing the RF signals to identify one or more channels outside a second spectrum that is a subset of the first spectrum.

[0089] At 606, the process flow includes re-locating the identified one or more channels to different locations to form remodulated channels in a downstream direction within the second spectrum by a remodulation circuit.

[0090] At 608, the process flow includes generating a digitized signal including the remodulated channels to provide the digitized signal over an interface that is configured based on the second spectrum. The first spectrum can be above 1 .2 Giga Hertz and the second spectrum is up to about 1 .2 Giga Hertz, for example.

[0091] In other embodiments, the process flow 600 can also include generating at least one of: frequency offsets or timing offsets for the remodulated channels based on one or more original center frequencies of the one or more identified channels. A baseband signal can then be shaped or generated using the

generated frequency offsets or timing offsets.

[0092] While the invention has been illustrated and described with respect to one or more implementations, alterations or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular regard to the various functions performed by the above

described components or structures (assemblies, devices, circuits, systems, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the

disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention.

[0093] Examples can include subject matter such as a method, means for performing acts or blocks of the method, at least one machine-readable medium including instructions that, when performed by a machine cause the machine to perform acts of the method or of an apparatus or system for dynamically generating a clock signal for a data processing system according to embodiments and examples described herein.

[0094] Examples can include subject matter such as a method, means for performing acts or blocks of the method, at least one machine-readable medium including instructions that, when performed by a machine cause the machine to perform acts of the method or of an apparatus or system for concurrent communication using multiple communication technologies according to embodiments and examples described herein.

[0095] A first example is an apparatus for a cable modem (CM) architecture comprising: a silicon on chip (SoC) configured to generate a baseband signal from a remodulated signal; an interface configured to provide the remodulated signal to the SoC for generating the baseband signal; and an analog front end (AFE) configured to receive an RF signal having a first spectrum, identify a plurality of channels in the RF signal, remodulate one or more channels of the plurality of channels based on a remodulation threshold and generate the remodulated signal having the one or more remodulated channels and un-changed channels. The remodulated signal has a second spectrum and the second spectrum is less than the first spectrum.

[0096] A second example can include the first example, wherein the second spectrum is less than or equal to the remodulation threshold.

[0097] A third example can include the first or second example, wherein the remodulation threshold is 1 .2 Giga Hertz (GHz).

[0098] A fourth example can include any one of the first through third examples, wherein the first spectrum is above 1 .2 Giga Hertz and up to 1 .8 Giga Hertz (GHz).

[0099] A fifth example can include any one of the first through fourth examples, wherein the AFE is configured to locate one or more lower channels of the plurality of channels below the remodulation threshold into a main downstream path to the SoC, and to locate the one or more remodulated channels into a feedback path to the SoC.

[00100] A sixth example can include any one of the first through fifth examples, wherein the interface is configured to receive digital signals in a downstream direction that only satisfy the remodulation threshold, and the AFE is configured to process RF signals that both satisfy the remodulation threshold and are greater in frequency than the remodulation threshold for the SoC to receive via the interface.

[00101] A seventh example can include any one of the first through sixth examples, further comprising a synchronization component configured to determine frequency offsets for the remodulated channels.

[00102] An eighth example can include any one of the first through seventh examples, wherein the AFE is configured to generate frequency information for the one or more remodulated channels.

[00103] A ninth example can include any one of the first through eighth examples, wherein the frequency information includes a frequency offset and a timing offset that enables a demodulator of the SoC to demodulate the one or more remodulated signals according to different locations than original frequencies.

[00104] A tenth example can include any one of the first through ninth examples, wherein the frequency information is based on an original center frequency for the one or more remodulated channels.

[00105] An eleventh example can be an analog front end (AFE) apparatus for a cable modem. The apparatus can comprise: a receiver configured to receive a radio frequency (RF) signal, wherein the RF signal has a first spectrum greater than a second spectrum; a resampling circuit configured to resample the RF signal based on the first spectrum and the second spectrum; a remodulation circuit configured to pass one or more channels located within the second spectrum as unchanged channels and re locate one or more channels located outside the second spectrum to remodulated channels within the second spectrum based on a remodulation threshold; and an interface terminal configured to couple the remodulated channels to an interface that is configured based on the remodulation threshold.

[00106] A twelfth example can include the eleventh example, further comprising a serializer configured to serialize the unchanged channels and the remodulated channels as one or more digitized signals to provide the one or more digitized signals via the interface terminal to a silicon on chip (SoC).

[00107] A thirteenth example can include any one of the eleventh through twelfth examples wherein the SoC is DOCSIS compatible and the interface is configured up to 1218 MHz.

[00108] A fourteenth example can include any one of the eleventh through the thirteenth examples, wherein the remodulation circuit is configured to pass an original center frequency of the remodulated channels.

[00109] A fifteenth example can include any one of the eleventh through the fourteenth examples, wherein the first spectrum includes a frequency range of above 1 .2 GHz to 1 .8 Giga Hertz (GHz) and the second spectrum includes a frequency range of 0 to about 1 .2 Giga Hertz (GHz).

[00110] A sixteenth example can include any one of the eleventh through the fifteenth examples, comprising: a front end configured to process a radio frequency (RF) signal having the first spectrum or full bandwidth into one or more downstream channels; a resample circuit configured to correct or adjust sample rate offsets, time offsets and frequency offsets of the RF signal; a carrier recovery module component configured to track the adjusted time offsets and the adjusted frequency offsets; an orthogonal frequency division multiplexing (OFDM) symbol timing circuit configured to track symbol boundaries for the RF signal; a fast Fourier transform (FFT) circuit configured to calculate a discrete Fourier transform (DFT) for the RF signal; a frequency domain processing circuit configured to perform frequency domain processing of the RF signal using the DFT, to determine at least one of: time errors or frequency errors and generate a channel estimate; a recovery loop circuit configured to generate the sample rate offsets, the time offsets and the frequency offsets based on the at least one of: the time errors or the frequency errors; and a control circuit configured to manage synchronization when in a downstream mode.

[00111] A seventeenth example is a method of operating a cable modem, the method comprising: receiving radio frequency (RF) signals from an infrastructure, where the RF signals comprise frequencies in a first spectrum of frequencies; analyzing the RF signals to identify one or more channels outside a second spectrum that is a subset of the first spectrum; re-locating the identified one or more channels to different locations to form remodulated channels in a downstream direction within the second spectrum by a remodulation circuit; and generating a digitized signal including the remodulated channels to provide the digitized signal over an interface that is configured based on the second spectrum.

[00112] An eighteenth example includes the seventeenth example, further comprising generating at least one of: frequency offsets or timing offsets for the remodulated channels based on one or more original center frequencies of the one or more identified channels.

[00113] A nineteenth example includes any one of the seventeenth through eighteenth examples, further comprising generating a baseband signal using the at least one of: the frequency offsets or the timing offsets.

[00114] A twentieth example includes any one of the seventeenth through nineteenth examples, wherein the first spectrum is above 1 .2 Giga Hertz and the second spectrum is up to about 1 .2 Giga Hertz.

[00115] A twenty-first example is an apparatus for a cable modem (CM) architecture comprising a silicon on chip (SoC), an analog front end (AFE) and an interface. The SoC is configured to generate a baseband signal from a remodulated signal. The interface is configured to provide the remodulated signal to the SoC. The AFFE is configured to receive an RF signal having a first spectrum, identify a plurality of channels in the RF signal, remodulate one or more of the channels based on a remodulation threshold and generate the remodulated signal having the remodulated channels and unchanged channels. The remodulated signal has a second spectrum that is less or smaller than the first spectrum. [00116] A twenty-second example includes the twenty-first example, where the second spectrum is less than the remodulation threshold.

[00117] A twenty-third example includes the twenty-first example or the twenty- second example, including or omitting optional elements, where the SoC is for a DOCSIS compatible cable modem.

[00118] Various illustrative logics, logical blocks, modules, and circuits described in connection with aspects disclosed herein can be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other

programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform functions described herein. A general-purpose processor can be a microprocessor, but, in the alternative, processor can be any conventional processor, controller, microcontroller, or state machine. The various illustrative logics, logical blocks, modules, and circuits described in connection with aspects disclosed herein can be implemented or performed with a general purpose processor executing instructions stored in computer readable medium.

[00119] The above description of illustrated embodiments of the subject disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the disclosed embodiments to the precise forms disclosed. While specific embodiments and examples are described herein for illustrative purposes, various modifications are possible that are considered within the scope of such embodiments and examples, as those skilled in the relevant art can recognize.

[00120] In this regard, while the disclosed subject matter has been described in connection with various embodiments and corresponding Figures, where applicable, it is to be understood that other similar embodiments can be used or modifications and additions can be made to the described embodiments for performing the same, similar, alternative, or substitute function of the disclosed subject matter without deviating therefrom. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, but rather should be construed in breadth and scope in accordance with the appended claims below.

[00121] In particular regard to the various functions performed by the above described components (assemblies, devices, circuits, systems, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary

implementations of the disclosure. In addition, while a particular feature may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. The use of the phrase“one or more of A, B, or C” is intended to include all combinations of A, B, and C, for example A, A and B, A and B and C, B, and so on.