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Title:
BIAS CIRCUIT AND AMPLIFIER
Document Type and Number:
WIPO Patent Application WO/2021/181492
Kind Code:
A1
Abstract:
A bias circuit (10) that comprises: a switching element (11) that has a first terminal (11a) and a second terminal (11b), the first terminal (11a) being electrically connected to a gate terminal (1a) of an amplification element (1) that is a transistor that amplifies a signal to be amplified that has been fed to the gate terminal (1a); and a trap compensation element (12) that has a third terminal (12a) and a fourth terminal (12b), the third terminal (12a) being connected to the second terminal (11b). The bias circuit (10) also comprises a control circuit (13) that applies a bias voltage to the gate terminal (1a) and, when the signal to be amplified is a transmission signal, performs control that opens the switching element (11) and control that suspends conduction between the third terminal (12a) and the fourth terminal (12b) of the trap compensation element (12) or, when the signal to be amplified is a reception signal, performs control that closes the switching element (11) and control that allows conduction between the third terminal (12a) and the fourth terminal (12b). The bias circuit (10) also comprises a voltage application circuit (14) that, when the signal to be amplified is a transmission signal, applies a first voltage to the fourth terminal (12b) or, when the signal to be amplified is a reception signal, applies a second voltage that is a negative voltage to the fourth terminal (12b).

Inventors:
YAMAGUCHI YUTARO (JP)
HANGAI MASATAKE (JP)
SHINJO SHINTARO (JP)
Application Number:
PCT/JP2020/010137
Publication Date:
September 16, 2021
Filing Date:
March 10, 2020
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H03F1/00; H03F3/24
Domestic Patent References:
WO2012111451A12012-08-23
Other References:
ANDREI, CRISTINA ET AL.: "Robust Stacked GaN-Based Low-Noise Amplifier MMIC for Receiver Applications", 2015 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM, PP, pages 1 - 4, XP033181218
Attorney, Agent or Firm:
TAZAWA, Hideaki et al. (JP)
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