BIAS CIRCUIT AND CURRENT OUTPUT CIRCUIT

Title:

BIAS CIRCUIT AND CURRENT OUTPUT CIRCUIT

Document Type and Number:

WIPO Patent Application WO/2020/203814

Kind Code:

A1

Abstract:

A bias circuit for outputting a first potential to the gate of a load-side transistor among two cascade-connected transistors during normal operation of a constant-current circuit, wherein a potential lower than the first potential is output to the gate of the load-side transistor when the gate potential of the load-side transistor is higher than the first potential, and a potential higher than the first potential is output to the gate of the load-side transistor when the gate potential of the load-side transistor is lower than the first potential.

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Inventors:

OONARO TSUTOMU (JP)

Application Number:

PCT/JP2020/014127

Publication Date:

October 08, 2020

Filing Date:

March 27, 2020

Export Citation:

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Assignee:

MURATA MANUFACTURING CO (JP)

International Classes:

G05F3/26; H03F1/22; H03F3/345

Foreign References:

US20050104574A1	2005-05-19
JPS63318806A	1988-12-27
JPS6159903A	1986-03-27
US5959446A	1999-09-28

Attorney, Agent or Firm:

SAKAI INTERNATIONAL PATENT OFFICE (JP)

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