FIELD OF THE INVENTION This invention relates to electronic voltage control circuits.

BACKGROUND OF THE INVENTION Electronic dimmer circuits are typically based on a silicon controlled rectifier or triac which allows switching of the a. c. supply voltage at a controllable firing angle in the a. c. cycle. By such means, the triac conducts current from the moment that the triac is triggered until the a. c. supply current cycle passes through zero, thereby allowing only a fraction of the a. c. supply voltage to pass. The principle on which such dimmers operate is that by adjusting the firing angle, a fraction of the a. c. supply voltage is fed to the load so that the r. m. s. voltage across the load is reduced. This, in turn, reduces the power consumption of the load.

A drawback with such an approach is that when only a fractional voltage is fed to the load (i. e. the firing angle is greater than 0°), the load voltage is no longer sinusoidal and this both introduces undesirable harmonics and reduces the power factor. In particular, the power factor is a measure of the quantity of useful power taken from the supply. If the power factor is less than unity, this means that the supply network feeds reactive power to the load and this causes undesirable phase imbalances for which the customer is heavily penalized.

A further drawback with conventional dimmer circuits is that, since the output voltage is derived by effectively channeling part of the input voltage through a switch, the output voltage waveform inevitably follows the input voltage waveform in shape. In practice, this means that any imperfections or noise in the input voltage waveform are reflected in the output voltage waveform.

SUMMARY OF THE INVENTION It is an object of the invention to provide a bipolar chopper wherein the r. m. s. a. c. voltage across a load may be controlled without derogating from the shape of the supply voltage, and at the same time cleaning any noise.

It is a further object of the invention to provide such a bipolar chopper for reducing the average voltage across a load.

According to the invention there is provided a method for obtaining a desired shape of an output voltage from an a. c. input voltage supply, said method comprising the steps of : (a) continuously sampling the a. c. input voltage so as to produce a plurality of voltage samples during each cycle of the a. c. input voltage supply, (b) selecting a fraction of each said voltage sample commensurate with a desired fractional power consumption thereof, and (c) low-passing filtering said fraction of each said voltage sample.

In accordance with the invention, a bipolar chopper for obtaining a desired fraction of an a. c. input voltage from an a. c. voltage supply, comprises: a sampling unit for sampling the a. c. input voltage so as to produce a plurality of voltage samples during each cycle of the a. c. voltage supply, a processor coupled to the sampling unit for selecting a fraction of each said voltage sample commensurate with a desired fractional power consumption thereof, and

a filter for low-pass filtering said fraction of said plurality of voltage samples.

Seeing that the output voltage is of substantially ideal sinusoidal shape, near unity power factor exceeding 0.99 is achieved when the input voltage is derived from an a. c. electrical supply having sinusoidal waveform.

According to a first embodiment of the invention, voltage reduction is achieved by a desired fraction by sampling the input voltage at high frequency and passing a desired fraction of each sample to a load. For example, the average voltage across the load may be reduced by a factor of n, by feeding l/ntA'of the voltage samples to the load.

According to a second embodiment of the invention, the output voltage may be selected to have an accurate predetermined waveform substantially free of any noise by first sampling the input voltage at high frequency. For each voltage sample, a departure of the instantaneous voltage of the respective voltage sample from the desired voltage magnitude allows a commensurate fraction of the voltage sample to be output. This produces a clean sinusoidal waveform for the output voltage and preserves near unity power factor. The desired voltage magnitude of each sample may be determined from a knowledge of the voltage waveform V (t) of the output voltage and the instantaneous time I of the current voltage sample. By such means, a substantially pure sinusoidal output voltage may be produced regardless of the shape of the input voltage.

BRIEF DESCRIPTION OF THE DRAWINGS In order to understand the invention and to see how it may be carried out in practice, a preferred embodiment will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which: Fig. 1 is a block diagram of a voltage reducer according to the invention;

Fig. 2 shows schematically a driver circuit for fast switching of the PWM signals to the low pass filter in the voltage reducer shown in Fig. 1; Fig. 3 shows graphically voltage waveforms of the a. c. input voltage; Figs. 4a and 4b show graphically voltage waveforms of the reduced output voltage at a fraction equal to 50% of the input voltage; Figs. 4a and 4b show graphically voltage waveforms of the reduced output voltage at a fraction equal to 50% of the input voltage; Figs. 5a and 5b show graphically voltage waveforms of the reduced output voltage at a fraction equal to 80% of the input voltage; Figs. 6a and 6b show graphically voltage waveforms of the reduced output voltage at a fraction equal to 20% of the input voltage.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT Fig. 1 shows a block diagram of a voltage reducer depicted generally as 10 for obtaining a desired fraction of an a. c. input voltage 11 derived from an a. c. voltage supply (not shown). The voltage reducer 10 comprises a central processing unit (CPU) 12 to which there is coupled a voltage sensor 13 for sensing the a. c. input voltage 11. Likewise, a zero cross detector 14 is coupled to the voltage sensor 13 and to the CPU 12 for producing a trigger signal when the a. c. input voltage climbs upward through zero. The voltage sensor 13 in combination with the zero cross detector 14 constitute a sampling unit 15 for sampling the a. c. input voltage so as to produce a plurality of voltage samples during each cycle of the a. c. voltage supply. The time between successive samples allows computation of the supply frequency which, in turn, allows determination of the sampling points. A user interface 16 includes a keypad 17 and a display 18 and allows a user to set an output voltage 19 to a desired fraction of the input voltage 11. The CPU 12 is responsively coupled to the user interface 16 for selecting the same fraction of the plurality of voltage samples commensurate with the desired fractional power consumption thereof set by the user.

At an output of the CPU 12 are pulse-width modulated (PWM) signals whose widths are proportional to the respective requested portion of the input voltage, sampled by the CPU 12. Specifically, the PWM signals have constant height indicative of logic HIGH or LOW but have different widths corresponding to the amplitude of the respective output voltage requested.

The PWM pulses are fed to a power unit 21, which alternately switches a pair of bipolar a. c. switches at the sampling frequency. This is explained in detail below with reference to Figs. 4,5 and 6 of the drawings.

A DMX 512 input 22 is coupled to the CPU 12 and allows the unit to be connected as one of up to 512 remote devices via an RS485 network. Each device in the network has a unique address allowing a specific device to be accessed by sending a control byte corresponding to the address of the desired device. By this means, a digital control byte having a value from 0 to 255 and being representative of the desired voltage reduction, may be sent through the RS485 network to the device. Thus, if the input voltage is 240V a. c. and the control byte is equal to 127, then the CPU 12 will control the a. c. output voltage 19 so as to be equal to 120V a. c.

An analog voltage unit 23 coupled to the CPU 12 allows a d. c. voltage to be fed to the CPU 12 representative of the desired voltage reduction. For example, the d. c. voltage may extend from 0 to 10 V d. c. corresponding to zero to full voltage a. c. Thus, if the input voltage is 240 V a. c. and the d. c. voltage level of the analog voltage unit 23 is 5V d. c., then the CPU 12 will control the a. c. output voltage 19 so as to be equal to 120 V a. c.

A current limiter 24 limits the current consumption according to the preset maximum requested by the user. The sampling unit 15 samples both the input voltage and the current consumed by the load, and checks that each sampled power slice is within its predetermined rating. The current limiter 24 is hardware programmed to sense each high frequency sample and makes allowance for the fact that typically on startup, current 11usi I may considerably exceed the nominal current rating.

Fig. 2 shows a detail of the power unit 21 which comprises a pair of <BR> <BR> <BR> bipolar a. c. MOSFET switches 37 and 38, having a common junction 39, for switching the a. c. power between the load and the neutral feeder, in accordance with the PWM signal. The desired switching is effected by a PWM control unit 43 which is synchronized to the a. c. input voltage 11 and includes a pair of precisely synchronized anti-phase outputs 44 and 45 having logic levels which invert continuously at the sampling frequency for opening <BR> <BR> <BR> and closing the bipolar a. c. MOSFET switches 37 and 38 so that the desired fraction of the a. c. input voltage is fed, via the junction 39 of the bipolar a. c.

MOSFET switches 37 and 38, to the low pass filter 40.

In practice, the a. c. input voltage 11 is derived from a main a. c. supply having a nominally sinusoidal waveform and the sampling frequency is as high as 100KHz giving a very large number of samples.

Fig. 3 shows graphically the waveform of the a. c. input voltage 11 having positive and negative half cycles 30 and 31, respectively.

Fig. 4a shows graphically the corresponding output voltage 50 <BR> <BR> <BR> produced at the junction 39 between the two bipolar a. c. MOSFET switches 37 and 38 in the power unit 21 and having an r. m. s. value equal to 50% of the input voltage 11. The continuous curve 51 represents the voltage waveform after filtering by the low pass filter 40.

Fig. 4b shows graphically the output voltage 50 shown in Fig. 4a at much expanded time scale. It may be seen that only 50% of each voltage sample is fed through the two bipolar a. c. MOSFET switches 37 and 38 to the low pass filter 40.

Figs. 5a and 5b show graphically the corresponding output voltage 50 at normal and expanded time scales when the output voltage is required to be equal to 80% of the input voltage. It will be noticed clearly from Fig. 5b that the proportion of each voltage sample which is fed through the two bipolar <BR> <BR> <BR> a. c. MOSFET switches 37 and 38 to the low pass filter 40 is much greater than the proportion which is not passed through the switches.

Figs. 6a and 6b show graphically the corresponding output voltage 50 at normal and expanded time scales when the output voltage is required to be equal to 20% of the input voltage. It will be noticed clearly from Fig. 6b that, in this case, the proportion of each voltage sample which is fed through the <BR> <BR> <BR> two bipolar a. c. MOSFET switches 37 and 38 to the low pass filter 40 is much less than the proportion which is not passed through the switches.

Whilst the invention has been described with particular regard to the fractional reduction of an a. c. supply voltage having a sinusoidal waveform, it will be appreciated that the principles of the invention may also be applied to voltages having other waveforms.

It will also be appreciated that whilst a particular embodiment relating to digital processing has been described, the PWM control and associated circuitry are not essential features of the invention. Thus, any other circuit for passing a desired number of pulse samples to the low pass filter will also suffice.

Likewise, it will be appreciated that the components shown functionally in the block diagram of the voltage reducer 10, apart from the power unit 21, may be constituted by a suitable Digital Signal Processor (DSP).