Title:
A BIT SERIAL PROCESSING ELEMENT FOR A SIMD ARRAY PROCESSOR
Document Type and Number:
WIPO Patent Application WO/2005/109221
Kind Code:
A3
Abstract:
In an image processing system, computations on pixel data may be performed by
an array of bit-serial processing element (PEs). A bit-serial PE (100) is implemented
with minimal logic in order to provide the is highest possible density of PEs constituting
the array. Improvements to the PE architecture are achieved to enable operations
to execute in fewer clock cycles. However, care is taken to minimize the additional
logic required for improvements. The bit-serial nature of the PE (100) is also
maintained in order to promote the highest possible density of PEs in an array.
PE improvements described herein include enhancements to improve performance
for sum of absolute difference (SAD) operations, division, multiplication
and transformation (e.g., FFT) shuffle steps.
Inventors:
MEEKER WOODROW L (US)
Application Number:
PCT/US2005/015143
Publication Date:
May 18, 2007
Filing Date:
May 03, 2005
Export Citation:
Assignee:
SILICON OPTIX (US)
MEEKER WOODROW L (US)
MEEKER WOODROW L (US)
International Classes:
G06F7/50; G06F7/52; G06F15/00; G06F15/02; G06F15/80
Foreign References:
| US5654911A | 1997-08-05 | |||
| US6073150A | 2000-06-06 | |||
| US6476634B1 | 2002-11-05 | |||
| US6275920B1 | 2001-08-14 | |||
| US6691143B2 | 2004-02-10 | |||
| US6369610B1 | 2002-04-09 | |||
| US6598061B1 | 2003-07-22 | |||
| US6185667B1 | 2001-02-06 |
Attorney, Agent or Firm:
NAPOLITANO, Carl, M. (Dyer Doppelt, Milbrath & Gilchrist, P.A., 255 South Orange Ave., Suite 1401, P.O. Box 379, Orlando FL, US)
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