Title:
BONDED SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING BONDED SEMICONDUCTOR WAFER
Document Type and Number:
WIPO Patent Application WO/2016/143252
Kind Code:
A1
Abstract:
The present invention provides a bonded semiconductor wafer having a monocrystal silicon layer on a major surface, the bonded semiconductor wafer characterized in that: the bonded semiconductor wafer includes a base wafer comprising a silicon monocrystal, and has on top of the base wafer a first dielectric layer, a polycrystal silicon layer, a second dielectric layer, and a monocrystal silicon layer in that order, with a bonding plane provided between the polycrystal silicon layer and the second dielectric layer; and in that a carrier trap layer is formed between the base wafer and the first dielectric layer. Thus, in a trap-rich type SOI substrate, a decrease in the resistivity of the base wafer due to the influence of charges in a buried oxide (BOX) layer or impurities can be avoided, whereby a bonded semiconductor wafer in which distortion of a high-frequency fundamental signal and stray signals from one circuit to another circuit are reduced, and which has excellent mass-producibility is provided.
Inventors:
ISHIKAWA OSAMU (JP)
KATO MASAHIRO (JP)
KATO MASAHIRO (JP)
Application Number:
PCT/JP2016/000594
Publication Date:
September 15, 2016
Filing Date:
February 05, 2016
Export Citation:
Assignee:
SHINETSU HANDOTAI KK (JP)
International Classes:
H01L21/322; H01L21/02; H01L27/12
Foreign References:
| JP2011524650A | 2011-09-01 | |||
| JPH10189404A | 1998-07-21 | |||
| JP2007507093A | 2007-03-22 | |||
| JP2014509087A | 2014-04-10 |
Attorney, Agent or Firm:
YOSHIMIYA, Mikio et al. (JP)
Good Miya Mikio (JP)
Good Miya Mikio (JP)
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