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Title:
BUCK MATRIX-TYPE RECTIFIER WITH BOOST SWITCH, AND OPERATION THEREOF DURING ONE-PHASE LOSS
Document Type and Number:
WIPO Patent Application WO/2019/213673
Kind Code:
A1
Abstract:
A power supply circuit includes at least two input terminals that receive an input voltage, a transformer including a primary side electrically connected to the input voltage, a rectifier electrically connected to a secondary side of the transformer, and a boost switch electrically connected in parallel with the rectifier and a pair of output voltage terminals that include a first output voltage terminal and a second output voltage terminal. The input voltage is electrically connected to an AC source, and each of the at least two input terminals receives a different phase of the AC source.

Inventors:
AFSHARIAN, Jahangir (4th Avenue EastUnit, Markham ON L3R 0J3, 0J3, CA)
GONG, Bing (4th Avenue EastUnit, Markham ON L3R 0J3, 0J3, CA)
XU, Dewei (4th Avenue EastUnit, Markham ON L3R 0J3, 0J3, CA)
Application Number:
US2019/070004
Publication Date:
November 07, 2019
Filing Date:
April 30, 2019
Export Citation:
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Assignee:
MURATA MANUFACTURING CO., LTD. (10-1 Higashikotari 1-chome, Nagaokakyo-shi, Kyoto, 617-8555, JP)
MURATA POWER SOLUTIONS (11 Cabot Boulevard, Mansfield, MA, 02048, US)
International Classes:
H02M7/219; H02M1/00; H02M3/156
Attorney, Agent or Firm:
MEDLEY, Peter (1800 Alexander Bell Drive, Suite 200Reston, VA, 20191-5465, US)
Download PDF:
Claims:
WHAT IS CLAIMED IS:

1. A power supply circuit comprising:

at least two input terminals that receive an input voltage;

a transformer including a primary side electrically connected to the input voltage;

a rectifier electrically connected to a secondary side of the transformer; and

a boost switch electrically connected in parallel with the rectifier and a pair of output voltage terminals that include a first output voltage terminal and a second output voltage terminal; wherein

the input voltage is electrically connected to an AC source, and each of the at least two input terminals receives a different phase of the AC source.

2. The power supply circuit according to claim 1, further comprising ORing diodes or Field Effect Transistors (FETs) that include a first terminal electrically connected to a first terminal of the boost switch and a second terminal electrically connected to the first output voltage terminal.

3. The power supply circuit according to claim 2, further comprising an output filter electrically connected to an output of the rectifier.

4. The power supply circuit according to claim 3, wherein the output filter includes an output inductor and an output capacitor.

5. The power supply circuit according to claim 4, wherein:

the output inductor is electrically connected between the output of the rectifier and the first terminal of the boost switch; and

the output capacitor is electrically connected between a node electrically connecting the second terminal of the ORing diodes or FETs and the first output voltage terminal and a node electrically connecting the second output voltage terminal and a second terminal of the boost switch.

6. The power supply circuit according to claim 1, wherein each of the different phases of the AC source are combined into a single phase on the primary side of the transformer.

7. The power supply circuit according to claim 6, wherein the different phases of the AC source are combined into the single phase by a matrix rectifier.

8. The power supply circuit according to claim 1, further comprising an input filter electrically connected between each of the at least two input terminals and the transformer.

IB

Description:
BUCK MATRIX-TYPE RECTIFIER WITH BOOST SWITCH, AND OPERATION THEREOF DURING ONE-PHASE LOSS

BACKGROUND OF THE INVENTION

1. Field of the Invention

[0001] The present invention relates to isolated matrix rectifiers. More specifically, the present invention relates to an isolated buck matrix rectifier with a boost switch and to the operation of the rectifier during the loss of one input voltage phase.

2. Description of the Related Art

[0002] Fig. 1 is a circuit diagram of an isolated buck matrix rectifier according to a related art. The matrix rectifier shown in Fig. 1 includes a 3-phase-to-l-phase matrix converter that is electrically connected to a rectifier. With respect to Fig. 1, a "line side" or "primary side" refers to the portion of the circuit on the left-hand side of a transformer Tr that is electrically connected to the input line voltages v a , V b , and v c and the input line currents i a , i b , and i c for each of the three phases A, B, and C, and a "load side" or a "secondary side" refers to the portion of the circuit on the right-hand side of the transformer Tr that is electrically connected to the output voltage V 0 , which may be electrically connected to a load (not shown).

[0003] On the line side of the circuit in Fig. 1, a three-phase alternating current (AC) input, including input line voltages v a , V b , and v c , is filtered by an input-side filter defined by input inductors L f and input capacitors C f and then combined into a single-phase AC current by the 3- phase-to-l-phase matrix converter. The 3-phase-to-l-phase matrix converter includes two pairs of complementary transistors, respectively Sn-Si 6 and S21-S26, for each of the three phases A, B, and C and provides the single-phase AC voltage V P and the single-phase AC current ip on the primary side (line side) of the transformer Tr. A leakage inductance of the transformer Tr and/or an external inductor is indicated by Li k - On the load side of the circuit, the single-phase AC voltage vs and the single-phase AC current on the secondary side (load side) of the transformer Tr are rectified by the rectifier, which includes diodes Di, D2, D 3 , and D 4 , to provide a DC voltage V d and a DC current ii_. An output inductor L 0 and an output capacitor C 0 define a load-side filter, and the load-side filter filters the DC voltage V d and the DC current ii . to provide the output voltage V 0 and an output current l 0 .

[0004] However, with the matrix rectifier shown in Fig. 1, the output voltage V 0 drops when the output voltage of the bridge rectifier (DC voltage V d ) is lower than the output voltage V o , because the matrix rectifier shown in Fig. 1 does not have any boost capability.

[0005] In matrix rectifiers, it is difficult to maintain a steady output voltage and to deliver continuous power when one phase is lost, disconnected, or short circuited due to the lack of an intermediate storage energy and a second stage DC/DC converter for output voltage regulation. Therefore, problems associated with matrix rectifiers that operate when one phase is lost, disconnected, or shorted include a large output drop. For example, matrix rectifiers are unlikely to sustain an output voltage within 5% of a nominal output voltage when one phase is lost, disconnected, or shorted. To address this problem, output capacitors with relatively high values have been used to attempt to sustain the output voltage when one phase is lost, disconnected, or shorted, but including large output capacitors significantly reduces the overall power density of the matrix rectifier circuitry and prevents the matrix rectifier from having a compact size. In addition, matrix rectifiers are subjected to high stress when delivering only 2/3 of their rated output power while one phase is lost, disconnected, or shorted.

SUMMARY OF THE INVENTION

[0006] To overcome the problems described above, preferred embodiments of the present invention provide an isolated buck matrix rectifier with a boost switch.

[0007] A power supply circuit according to a preferred embodiment of the present invention includes at least two input terminals that receive an input voltage, a transformer including a primary side electrically connected to the input voltage, a rectifier electrically connected to a secondary side of the transformer, and a boost switch electrically connected in parallel with the rectifier and a pair of output voltage terminals that include a first output voltage terminal and a second output voltage terminal. The input voltage is electrically connected to a three-phase AC source, and each of the at least two input terminals receives a different phase of the AC source. [0008] Preferably, the power supply circuit further includes ORing diodes or Field Effect Transistors (FETs) that include a first terminal electrically connected to a first terminal of the boost switch and a second terminal electrically connected to the first output voltage terminal.

[0009] Preferably, the power supply circuit further includes an output filter electrically connected to an output of the rectifier.

[0010] Preferably, the output filter includes an output inductor and an output capacitor.

[0011] Preferably, the output inductor is electrically connected between the output of the rectifier and the first terminal of the boost switch, and the output capacitor is electrically connected between a node electrically connecting the second terminal of the ORing diodes or FETs and the first output voltage terminal and a node electrically connecting the second output voltage terminal and a second terminal of the boost switch.

[0012] Preferably, each of the different phases of the AC source are combined into a single phase on the primary side of the transformer. The different phases of the AC source are preferably combined into the single phase by a matrix rectifier.

[0013] Preferably, the power supply circuit further includes an input filter electrically connected between each of the at least two input terminals and the transformer.

[0014] Isolated buck matrix rectifiers each with a boost switch according to the preferred embodiments of the present invention are able to significantly reduce or prevent a drop in the output voltage compared with a nominal output voltage and to significantly reduce an output capacitance. Further, isolated buck matrix rectifiers each with a boost switch according to the preferred embodiments of the present invention are able to provide a high power density in a compact size, while also significantly reducing a current stress on the included circuit components.

[0015] The above and other features, elements, steps, configurations, characteristics and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments of the present invention with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Fig. 1 is a circuit diagram of an isolated buck matrix rectifier according to a related art.

[0017] Fig. 2 is a circuit diagram of an isolated buck matrix rectifier with a boost switch according to a preferred embodiment of the present invention.

[0018] Fig. BA is a circuit diagram of a three-phase converter of the isolated buck matrix rectifier shown in Fig. 2 redrawn as a zero voltage switching (ZVS) full-bridge DC-DC converter. Fig. 3B is a circuit diagram of the three-phase converter shown in Fig. 3A when one of the phases is not present.

[0019] Figs. 4(a)— 4(d) are graphs showing waveforms of voltage and current

characteristics over time of a three-phase rectifier with a boost switch during one-phase-loss operation according to a preferred embodiment of the present invention.

[0020] Figs. 5A and 5B are graphs comparing an output voltage drop in one-phase-loss operation with a boost switch according to a preferred embodiment of the present invention to an output voltage drop in one-phase-loss operation without a boost switch.

[0021] Figs. 6(a)-6(e) are graphs showing simulated waveforms of voltage and current characteristics over time of a three-phase rectifier with a boost switch when one phase is shorted and then recovered, according to a preferred embodiment of the present invention.

[0022] Figs. 7(a)-7(d) are graphs showing experimental waveforms of a voltage converter including a three-phase rectifier with a boost switch both during three-phase operation and during two-phase operation, according to a preferred embodiment of the present invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

[0023] Preferred embodiments of the present invention will now be described in detail with reference to Figs. 2 to 7(d). Note that the following description is in all aspects illustrative and not restrictive and should not be construed to restrict the applications or uses of preferred embodiments of the present invention in any manner.

[0024] Fig. 2 is a circuit diagram of an isolated buck matrix rectifier with a boost switch according to a preferred embodiment of the present invention. In contrast to the isolated buck matrix rectifier shown in Fig. 1, the isolated buck matrix rectifier shown in Fig. 2 includes a boost switch.

[0025] The isolated buck matrix rectifier shown in Fig. 2 includes a 3-phase-to-l-phase matrix converter that is electrically connected to a rectifier. With respect to Fig. 2, a "line side" or "primary side" refers to the portion of the circuit on the left-hand side of a transformer Tr that is electrically connected to the input line voltages v a , V b , and v c and the input line currents i a , i b , and i c for each of the three phases A, B, and C, and a "load side" or "secondary side" refers to the portion of the circuit on the right-hand side of the transformer T r that is electrically connected to the output voltage V 0 , which may be electrically connected to a load (not shown).

[0026] On the line side of the circuit in Fig. 2, a three-phase alternating current (AC) input, including input line voltages v a , V b , and v c , is filtered by an input-side filter defined by input inductors L f and input capacitors C f and then combined into a single-phase AC current by the 3- phase-to-l-phase matrix converter. The 3-phase-to-l-phase matrix converter includes two pairs of complementary transistors, respectively Sn-Si 6 and S21-S26, for each of the three phases A, B, and C and provides the single-phase AC voltage VP and the single-phase AC current ip on the primary side (line side) of the transformer Tr. A leakage inductance of the transformer Tr and/or an external inductor is indicated by Li k - On the load side of the circuit, the single-phase AC voltage vs and the single-phase AC current on the secondary side (load side) of the transformer Tr are rectified by the rectifier, which includes diodes Di, D2, D 3 , and D 4 , to provide a DC voltage V d and a DC current ii_. An output inductor L 0 and an output capacitor C 0 define a load-side filter, and the load-side filter filters the DC voltage V d and the DC current ii . to provide the output voltage V 0 and an output current l 0 .

[0027] As shown in Fig. 2, a boost switch Sboost and ORing device(s) are provided between the output inductor L 0 and the output capacitor C 0 to define a boost stage. The boost switch Sboost can be a metal-oxide-semiconductor field-effect transistor (MOSFET) or the like, and the ORing devices can be diodes, field-effect transistors (FETs), or the like. In Fig. 2, the ORing devices are shown as a single diode between the output inductor L 0 and the output voltage V 0 , but it should be understood that instead of the diode, one or more FETs in parallel can be used. [0028] The ORing devices are conventionally used in redundant power supply systems or in systems with multiple power supplies to prevent reverse current. For example, if first and second AC-DC converters are connected in parallel, then ORing devices at the output of each of the first and second converters allow current from the first and second converters to flow to the load, while preventing current from the second or first converter from entering the other of the first or second converter. In Fig. 2, the ORing devices, in addition to providing the ORing functions described above, function as a boost diode with synchronous rectification when the DC voltage V d of the bridge rectifier is lower than the output voltage V 0 .

[0029] Conventionally, the ORing devices are located after the output capacitors, and boost converters generally require both boost switches and boost diodes. However, in Fig. 2, the output capacitor C 0 is located after the ORing devices. By connecting the output capacitor Co after the ORing devices as shown in Fig. 2, the ORing devices can operate as boost diodes. Thus, because no additional diodes are required to be included in the isolated buck matrix rectifier in order to provide boost diodes for the boost switch Sboost, overall losses and a size of the isolated buck matrix rectifier circuitry are able to be reduced.

[0030] When the DC voltage V d of the bridge rectifier is lower than the output voltage V 0 , instead of stopping operation, the matrix rectifier of Fig. 2 continues to operate at maximum duty cycle, and the boost switch S boost begins switching with a controllable duty cycle to regulate the output voltage.

[0031] As shown in Fig. 2, the isolated buck matrix rectifier additionally includes a voltage controller 200 that compares the output voltage V 0 with a predetermined reference voltage V ref and outputs a reference current signal kef that is limited by a predetermined clamp current Idamp. The isolated buck matrix rectifier shown in Fig. 2 also includes a buck converter current controller 210 that compares the output inductor current k with the reference current signal k ef and outputs a buck control signal m a , also referred to as a modulation index.

[0032] A boost converter current controller 220 of the isolated buck matrix rectifier shown in Fig. 2 compares the output inductor current k with the reference current signal kef and outputs a boost control signal Dboost to a Pulse Width Modulator (PWM) generator 230 that outputs a boost switch gate signal to control a duty cycle of the boost switch Sboost. When the input line voltages v a , V b , and v c are high enough, the buck converter current controller 210, by itself, can regulate the output voltage Vo, where the duty cycle of the boost switch D boost is zero. When the buck control signal m a reaches its maximum value and the output voltage V 0 begins to lose regulation, then the boost switch Sboost is activated to help regulate the output voltage Vo by controlling the duty cycle of the boost switch Sboost.

[00SS] Therefore, a value and size of the output capacitor C 0 is able to be relatively small if a drop in the output voltage V 0 is maintained at or about an output voltage drop of the isolated buck matrix rectifier shown in Fig. 1. Accordingly, a higher overall power density and more compact size are provided by the isolated buck matrix rectifier with a boost switch as shown in Fig. 2.

[00S4] Fig. SA is a circuit diagram of a three-phase converter of the isolated buck matrix rectifier shown in Fig. 2 redrawn as a zero voltage switching (ZVS) full-bridge DC-DC converter. Fig. SB is a circuit diagram of the three-phase converter shown in Fig. 3A when one of the phases is not present.

[0035] When one phase of a three-phase converter is lost, disconnected, or shorted, a bridge electrically connected to this phase stops switching because no power is delivered from this phase. As shown in Fig. 3B, when phase C is lost, disconnected, or shorted, the switches of this phase (bridge y in Fig. 3A, indicated by a dashed line in Fig. 3B) are not gating (switching), and the phase circuits of phase A and phase B (e.g., bridges x and z in Fig. 3A continue normal operation (i.e., operating as a phase-shift full-bridge converter).

[0036] Figs. 4(a)-4(d) are graphs showing waveforms of voltage and current characteristics over time of a three-phase rectifier with a boost switch during one-phase-loss operation according to a preferred embodiment of the present invention.

[0037] Figs. 4(a)-4(d) show the principal waveforms within one input-line cycle of the AC input supply during which the input line voltage vc is zero. The switching period of the pulse- width modulation (PWM) is greatly exaggerated in Figs. 4(a)-4(d). The PWM switching frequency is much higher than the line frequency of the AC input supply, and one input-line cycle may contain tens or hundreds of PWM periods depending on the switching frequency. Therefore, the PWM waveform of V P cannot be clearly shown if the switching period is not greatly exaggerated in the figure.

[0038] Fig. 4(a) shows an example of phase relationships Q over time of the three input line voltages v a , V b , and v c , while v c is considered unavailable and at zero volts. As shown, V m is a vector representing maximum amplitude of the AC voltages.

[0039] Fig. 4(b) shows the voltage VAB that is the difference in the input line voltages VA and V B and the single-phase AC voltage V P over time.

[0040] As shown in Fig. 4(c), during the shaded interval when |v , where VAB is the difference in the input line voltages VA and VB, is lower than the output voltage V 0 , the boost switch S boost regulates the output voltage V 0 , and the primary side of the matrix converter operates at a maximum duty cycle. Therefore, with the boost switch, the interval of the voltage turn-off time T 0ff is greatly reduced compared with the case of pure buck operation, which provides a significantly lower voltage drop in the output voltage V 0 .

[0041] However, when |v ' AB | is lower than the minimum value required by the boost stage to regulate the output voltage V 0 (as determined by the maximum output inductor current and expressed in equation (2) below), the output voltage V 0 starts losing regulation because the output inductor current k is clamped at the upper limit, ki amp , by the voltage controller 200, and the duty cycle of the boost switch Sboost reaches its maximum.

[0042] Fig. 4(d) shows a graph of the output inductor current over time in relation to Iv'^l . As shown in Fig. 4(d), the output inductor current k rises rapidly until it reaches the maximum value of i clamp when |v ' AB | decreases. If |v ' AB | further decreases, then very limited energy is delivered to the secondary side of the transformer Tr due to the small value of |v ' AB | and the significantly reduced effective duty cycle of the DC voltage V d of the bridge rectifier, because the duty cycle loss is proportional to ^ and increases rapidly as |v ' AB | decreases. Therefore,

M

both the primary-side switches (Sn, S21, S12, S22, S13, S23, Si 4 , S 24 , S15, S25, Si6, and S26) and the secondary-side boost switch Sboost stop switching to reduce losses when |v ' AS | is lower than the minimum value required by the boost stage to regulate the output voltage V 0 (as determined by the maximum output inductor current and expressed in equation (2) below). The limit of maximum output inductor current l C iam P , expressed in equation (1) below, can be applied to both buck and boost mode control since the same inductor is involved in both buck and boost mode operation:

equation (1),

where k is the over-current racial and i raed is the rated inductor current in nominal conditions.

[0043] When |v ' AB | is high, duty cycle loss is relatively small and can be neglected in order to simplify the following analysis. Accordingly, assuming the duty cycle loss of the buck converter is relatively small, the minimum value of |v ' AB | required to regulate the output voltage

2

V o at l =—J alei (i.e., 2/3 of nominal power) can be derived by equation (2) as follows: equation (2),

where m a is the modulation index of the converter during normal operation, V m is the peak value of the phase voltage, and n is transformer turns ratio.

[0044] The interval of the voltage turn-off time T 0ff in boost mode operation can be derived by equation (3) as follows: equation (3),

where f gnd is a grid frequency of the input line voltages v a , V b , and v c .

[0045] Neglecting the energy delivered from the primary side to the secondary side during the voltage turn-off time T 0ff , because very limited energy can be delivered from the primary side to the secondary side during T 0ff , the voltage drop AV 0 during T 0ff can be derived by equation (4) as follows: equation (4).

[0046] Figs. 5A and 5B are graphs comparing an output voltage drop in one-phase-loss operation with a boost switch according to a preferred embodiment of the present invention to an output voltage drop in one-phase-loss operation without a boost switch. [0047] Figs. 5A and 5B compare the output voltage drop AVo versus the value of capacitor C o for the matrix rectifier circuit shown in Fig. 2 with and without boost switch operation. Both cases are plotted at the nominal conditions VLL = 480 V and VLL = 400 V where m a = 0.75 and m a = 0.9 respectively. Both Figs. 5A and 5B are at the same conditions of l 0 = 2/3 l ra ted and k = 1.4.

[0048] Compared with buck operation, the output voltage drop AVo with the boost switch S boost is significantly lower. According to another preferred embodiment of the present invention, the output capacitance is significantly reduced with boost mode operation if the output voltage drop is kept the same or substantially the same as that of without boost operation. The m a and grid frequency f gnd also play very important roles in determining the output voltage drop AVo . Either a higher m a or a lower grid frequency f gr id increases the output voltage drop AVo according to equation (4).

[0049] Because the boost capability is achieved by only adding a boost switch Sboost, a reduction of the power density of the matrix rectifier is very small. In addition, the boost switch Sboost only operates during a relatively small time frame indicated by the shaded intervals in Figs. 4(c) and 4(d), when |v ' AB | is lower than the output voltage V 0 . Therefore, the high current through the boost switch Sboost does not impart a high thermal stress on the boost switch Sboost.

[0050] Figs. 6(a)-6(e) are graphs showing simulated waveforms of voltage and current characteristics over time of a three-phase rectifier with a boost switch when one phase is shorted and then recovered, according to a preferred embodiment of the present invention. Figs. 7(a)-7(d) are graphs showing experimental waveforms of a three-phase rectifier with a boost switch both during three-phase operation and during two-phase operation, according to a preferred embodiment of the present invention.

[0051] Simulation and experimental results of preferred embodiments of the present invention are shown in Figs. 6(a)-6(e) and Figs. 7(a)-7(d). The operating conditions for both the simulation and experiment are as follows: the input line-to-line voltage V LL = 480 V (at m a = 0.75), the line frequency f grid = 60 Hz, the output inductor over current ratio k =1.4, and the output storage energy C 0 = 1.4 mF. In Figs. 6(a)-6(e), at time ti, "phase C" is shorted, and at time t 2 , "phase C" is recovered. When DC voltage V d is higher than the output voltage V 0 , the converter operates in buck mode. When the DC voltage V d is lower than output voltage V 0 , the boost switch is enabled, and the converter operates in buck + boost mode. The maximum inductor current l ciamP is clamped at 18.5 A by the controller during one-phase-loss operation.

At steady state, the average inductor current l L-aVg is around 8.77 A to deliver two-thirds of the rated power. During time period T 0 ff, when the DC voltage V d is very low, the converter stops operating because very limited power can be transferred to the load, even with maximum inductor current I damp . Smooth transitions between the buck + boost mode and the buck mode can be observed from the output inductor current in Fig. 6(e). The experimental results in Figs. 7(a)-7(d) verify the simulation results in Figs. 6(a)-6(e).

[0052] As shown in Figs. 7(a)-7(d), the output voltage ripple AV 0 is about 11 V, which is well within 4% of the nominal output voltage 380 V. The waveform of V dsjooost shows that the boost switch is only enabled when the output voltage of the DC voltage V d of the bridge rectifier is lower than the output voltage V 0 , which significantly reduces thermal stresses applied to the circuit components.

[0053] The above-described features and advantages of the preferred embodiments of the present invention are able to be applied to a number of different applications, including, but not limited to, battery chargers, electric vehicle chargers high-voltage data center applications, telecommunications applications, aerospace applications, and the like.

[0054] While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.