Title:
BUS ARBITRATION DEVICE, BUS ARBITRATION SYSTEM, AND IMAGING DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/008522
Kind Code:
A1
Abstract:
Provided is a bus arbitration device for arbitrating, in a plurality of data buses in which at least one memory and a plurality of processing blocks sharing the memory are connected to each other, access by the respective processing blocks to any one of the memory. The bus arbitration device comprises: a first bus arbitration unit that arbitrates an access request to a first memory emitted from the processing block in a first data bus that is a data bus to which the first memory is connected; a second bus arbitration unit that arbitrates an access request to a second memory emitted from the processing block in a second data bus that is a data bus to which the second memory is connected; and a priority control unit that controls priority when each of the first bus arbitration unit and the second bus arbitration unit receives the access requests including the access request to the first memory and the access request to the second memory.
Inventors:
CHIDA KAZUE (JP)
HOMMA SHINSUKE (JP)
UENO AKIRA (JP)
HOMMA SHINSUKE (JP)
UENO AKIRA (JP)
Application Number:
PCT/JP2018/025196
Publication Date:
January 09, 2020
Filing Date:
July 03, 2018
Export Citation:
Assignee:
OLYMPUS CORP (JP)
International Classes:
G06F13/362; G06F13/368
Foreign References:
| JP2013025674A | 2013-02-04 | |||
| JP2007334693A | 2007-12-27 |
Attorney, Agent or Firm:
TANAI Sumio et al. (JP)
Download PDF:
Previous Patent: LINEAR INDUCTION MOTOR AND ELEVATOR
Next Patent: POWER CONVERSION DEVICE AND EXHAUST STRUCTURE
Next Patent: POWER CONVERSION DEVICE AND EXHAUST STRUCTURE