BUS CONTROL DEVICE AND CONTROL DEVICE FOR OUTPUTTING INSTRUCTIONS TO THE BUS CONTROL DEVICE

WIPO Patent Application WO/2011/148583

A1

Disclosed is a bus control device for efficiently suppressing resource conflict when switching the route so as to shorten route switch delay, thereby improving average usage efficiency of the bus. The bus control device is provided between a bus master and a networked communication bus, and controls the transmission route of packets flowing through the communication bus. The bus control device is provided with a route table management unit for managing a plurality of transmission routes and the transmission status of each of the plurality of transmission routes; a parameter generation unit for generating a parameter conforming to a predetermined probability distribution or a parameter conforming to a predefined rule; a determination unit for determining a transmission route on the basis of the transmission status of each of the plurality of transmission routes and the parameter; and a relay unit for performing relay processing of the packets flowing upon the communication bus.

ISHII TOMOKI
YAMAGUCHI TAKAO
YOSHIDA ATSUSHI

PCT/JP2011/002681

December 01, 2011

May 13, 2011

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PANASONIC CORP (JP)
ISHII TOMOKI
YAMAGUCHI TAKAO
YOSHIDA ATSUSHI

G06F13/36; H01L21/822; H01L27/04; H04L12/56

WO2009150849A1

2009-12-17

JP2010056818A	2010-03-11
JP2002247087A	2002-08-30
JP2007325032A	2007-12-13
JPH0936893A	1997-02-07
JP2007074074A	2007-03-22

SHINGO WAKITA ET AL.: "Delay Reduction Algorithm by Balancing Distribution of Traffic for Odd-Even Turn Model in NoC", IEICE TECHNICAL REPORT, vol. 108, no. 478, 11 March 2009 (2009-03-11), pages 153 - 158

OKUDA, SEIJI (JP)
Seiji Okuda (JP)

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