Title:
BYTE ALIGNMENT DEVICE, AND BYTE ALIGNMENT METHOD
Document Type and Number:
WIPO Patent Application WO/2013/061840
Kind Code:
A1
Abstract:
The purpose of the present invention is to provide a technique for subjecting a bit stream to byte alignment. An adjustment coefficient sequence which is a high-frequency component among the quantized block coefficient sequences is replaced with a predetermined reference coefficient sequence. Subsequently, the amount by which the bits need to be increased for byte alignment is calculated on the basis of the encoding amount of the bit stream obtained by subjecting the block coefficient sequence in which the adjustment coefficient sequence is replaced with the reference coefficient sequence to variable-length coding. Then, the appropriate adjustment coefficient sequence that should be replaced with the reference coefficient sequence is searched for on the basis of the amount by which the bits need to be increased. Finally, the found adjustment coefficient sequence is inserted into the high-frequency component corresponding to the reference coefficient sequence.
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Inventors:
KASAI HIROYUKI (JP)
UCHIHARA NAOFUMI (JP)
UEHARA YUKIO (JP)
UCHIHARA NAOFUMI (JP)
UEHARA YUKIO (JP)
Application Number:
PCT/JP2012/076815
Publication Date:
May 02, 2013
Filing Date:
October 17, 2012
Export Citation:
Assignee:
GNZO INC (JP)
International Classes:
H03M7/40; H04N19/132; H04N19/146; H04N19/184; H04N19/60; H04N19/70; H04N19/91
Domestic Patent References:
| WO2009093647A1 | 2009-07-30 |
Foreign References:
| JPH07160473A | 1995-06-23 | |||
| JPH07222164A | 1995-08-18 |
Other References:
See also references of EP 2773110A4
Attorney, Agent or Firm:
NARUSE, SHIGEO (JP)
Shigeo Naruse (JP)
Shigeo Naruse (JP)
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Claims: