CAPACITANCE LOAD DRIVE CIRCUIT AND DISPLAY DEVICE USING THE SAME

Title:

CAPACITANCE LOAD DRIVE CIRCUIT AND DISPLAY DEVICE USING THE SAME

Document Type and Number:

WIPO Patent Application WO/2010/018706

Kind Code:

A1

Abstract:

A buffer circuit (1) drives a capacitance load (9) in accordance with voltage Vin. During a setup period, switches (11, 13-15) are in the ON state. During a drive period, a switch (12) is in the ON state. A voltage comparison unit (2) compares the voltage Vin of the setup period to the voltage Vo of the drive period and outputs a comparison result voltage. A push-pull output unit (4) includes a TFT (25) for charge and a TFT (26) for discharge. A drive control unit (3) controls the TFT (25, 26) to be in the OFF state during the setup period. During the drive period, the drive control unit (3) selectively turn ON the TFT (25, 26) in accordance with the comparison result voltage. If Vout < Vin, the comparison result voltage increases, the TFT (24) turns ON, voltage of a node (N6) decreases, the TFT (25) turns ON, and the voltage Vout increases. Thus, it is possible to provide a small-size capacitance load drive circuit having a low power consumption and robust against process irregularities.

Inventors:

BROWN CHRISTOPHER
OGAWA YASUYUKI

Application Number:

PCT/JP2009/060025

Publication Date:

February 18, 2010

Filing Date:

June 02, 2009

Export Citation:

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Assignee:

SHARP KK (JP)
BROWN CHRISTOPHER
OGAWA YASUYUKI

International Classes:

H03K17/687; G02F1/133; G09G3/20

Foreign References:

JPH11259052A	1999-09-24
JP2004166039A	2004-06-10
JP2006279512A	2006-10-12

Other References: