Title:
CAPACITANCE SENSOR SUBSTRATE AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/079838
Kind Code:
A1
Abstract:
This capacitance sensor substrate comprises: a substrate having a first surface and a second surface; a dielectric layer which includes carbon and which is disposed above the second surface; a thin-film transistor which is disposed above the second surface and which comprises a gate electrode, a source electrode, a drain electrode, a channel layer formed from an oxide semiconductor layer, and a gate insulation layer; a first conducting layer which comprises a metal layer, is disposed above the second surface, and forms at least a capacitor pattern and the gate electrode; and a second conducting layer which comprises a metal layer and is disposed above the second surface. The gate electrode is electrically joined to the capacitor pattern. In a plan view, the dielectric layer overlaps with the capacitor pattern, and in the thickness direction of the substrate, the dielectric layer is positioned nearer to a touch sensing input surface than the capacitor pattern.
Inventors:
MINATO KOUICHI (JP)
FUKUYOSHI KENZO (JP)
FUKUYOSHI KENZO (JP)
Application Number:
PCT/JP2018/039045
Publication Date:
April 23, 2020
Filing Date:
October 19, 2018
Export Citation:
Assignee:
TOPPAN PRINTING CO LTD (JP)
International Classes:
G06F3/044; G06F3/041
Domestic Patent References:
| WO2018051487A1 | 2018-03-22 |
Foreign References:
| US20180239940A1 | 2018-08-23 | |||
| US20170147123A1 | 2017-05-25 | |||
| US20130043545A1 | 2013-02-21 |
Attorney, Agent or Firm:
MATSUNUMA Yasushi et al. (JP)
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