Title:
CAPACITOR ARRAY
Document Type and Number:
WIPO Patent Application WO/2023/234172
Kind Code:
A1
Abstract:
A capacitor array 1 comprises a capacitor layer 10 including a plurality of capacitor elements 30 planarly arranged in a plane direction perpendicular to the thickness direction Z by being divided by a plurality of through grooves 15. Each capacitor element 30 includes a first electrode layer (for example, an anode plate 31), a second electrode layer (for example, a cathode layer 36), and a dielectric layer 35, the first electrode layer and the second electrode layer facing each other in the thickness direction Z with the dielectric layer 35 interposed therebetween. The through grooves 15 include a first through groove 15A along the first direction X, and a second through groove 15B along the second direction Y that intersects the first direction X. When an intersection area I between the first through groove 15A and the second through groove 15B is viewed from the thickness direction Z, an intersection of a first virtual groove 115A obtained by extending the first through groove 15A to the intersection area I and a second virtual groove 115B obtained by extending the second through groove 15B to the intersection area I is located inside the intersection area I.
Inventors:
YOSHIKAWA MASANORI (JP)
KIKUCHI HIROSHI (JP)
KIKUCHI HIROSHI (JP)
Application Number:
PCT/JP2023/019514
Publication Date:
December 07, 2023
Filing Date:
May 25, 2023
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G9/048
Foreign References:
| JP2020167361A | 2020-10-08 | |||
| JP2021077749A | 2021-05-20 | |||
| US20150382471A1 | 2015-12-31 |
Attorney, Agent or Firm:
WISEPLUS IP FIRM (JP)
Download PDF: