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Title:
CAPACITOR IN MONOLITHIC INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2020/236044
Kind Code:
A1
Abstract:
The present invention relates to system and arrangements for a MIM capacitor in a monolithic integrated circuit and method for manufacturing the same. The monolithic integrated circuit comprising a substrate (101), an active layer (102) coupled to the substrate, the active layer having a first side adjacent to the substrate and a second side. The circuit further comprising a plurality of active and/or passive components disposed on the second side of the active layer, a metal-insulator-metal, MIM, structure (110) formed on the active layer. The MIM structure comprising a plurality of non-conducting pillars (103) formed on the active layer, a first metal layer (104) formed on the active layer and the non- conducting pillars, a dielectric insulator layer (105) on top of the first metal layer, and a second metal layer (106) formed on top of the dielectric layer. Wherein the metal layers each having a respective electrical connection port (107,108), and wherein the metal-insulator-metal structure forms a single capacitor (100).

Inventors:
THORSELL MATTIAS (SE)
Application Number:
PCT/SE2019/050453
Publication Date:
November 26, 2020
Filing Date:
May 17, 2019
Export Citation:
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Assignee:
SAAB AB (SE)
International Classes:
H01G4/005; H01G4/33; H01L21/70; H01L23/522; H01L27/06
Domestic Patent References:
WO2012177934A22012-12-27
Foreign References:
US20160322456A12016-11-03
US20140225222A12014-08-14
US7271434B22007-09-18
EP3428955A12019-01-16
US20070082495A12007-04-12
EP0564848A11993-10-13
EP2255376A12010-12-01
US20100230806A12010-09-16
Other References:
S. MARSH, PRACTICAL MMIC DESIGN, 2006, Norwood (MA), USA, ISBN: 978-1-59693-036-0
S.-W. CHANG ET AL.: "Fabrication of silicon nanopillar-based nanocapacitor arrays", APPLIED PHYSICS LETTERS, vol. 96, 2010, pages 153108, XP012130833, DOI: 10.1063/1.3374889
Attorney, Agent or Firm:
ZACCO SWEDEN AB (SE)
Download PDF:
Claims:
Claims

1 . A monolithic integrated circuit (200) comprising:

- a substrate (101 );

- an active layer (102) coupled to the substrate, the active layer

having a first side adjacent to the substrate and a second side;

- a plurality of active and/or passive components (100, 201 , 202,

203, 204) disposed on the second side of the active layer;

- a metal-insulator-metal, MIM, structure (1 10) formed on the active layer, the structure comprising:

- a plurality of non-conducting pillars (103) formed on the active layer;

- a first metal layer (104) formed on the active layer and the non-conducting pillars;

- a dielectric insulator layer (105) on top of the first metal layer;

- a second metal layer (106) formed on top of the dielectric layer; and

wherein the metal layers each having a respective electrical connection port (107, 108); and

wherein the metal-insulator-metal structure form a single capacitor (100).

2. The circuit according to claim 1 , wherein the capacitor specifications are determined by the number of pillars, the physical dimensions of the pillars, and thickness of layers formed on the pillars.

3. The circuit according to claim 2, wherein the capacitor specifications

comprise capacitance and break-down voltage. 4. The circuit according to any preceding claims, wherein each pillar width is in the range of 5 - 100 micrometers. 5. The circuit according to any preceding claims, wherein the non-conductive pillars comprise one of benzocyclobutene, BCB, epoxy based photo-resist, or polyimide. 6. The circuit according to any preceding claims, wherein the thickness of the pillars is in the range 10 - 100 micrometers.

7. The circuit according to any preceding claims, wherein the capacitors are formed with a breakdown voltage in the range 100 - 1000 V.

8. The circuit according to ay preceding claims, wherein the capacitors

capacitance per mm2 are formed in the range of 2 - 20 nF.

9. The circuit according to any preceding claims, wherein the non-conductive pillars are formed by photolithography, etching or surface micromachining.

10. The circuit according to any preceding claims, wherein the plurality of pillars are in the range of 10 - 1000 pillars. 1 1 .The circuit according to any preceding claims, wherein the dielectric

insulator layer is formed in SiN or SiC>2.

12. The circuit according to any preceding claims, wherein the pillars are

formed with an inter-distance of 5 - 50 micrometres between adjacent pillars.

13. A system comprising a monolithic integrated circuit (200) according to any of claims 1 to 12 and a processor (411) configured to control the monolithic integrated circuit to transmit and/or receive signals.

14. The system according to claim 13, wherein the system is a radio

frequency amplifier.

15. The system according to claim 13, wherein the system is a radar system. 16. The system according to any of the preceding claims, wherein the monolithic integrated circuit is a monolithic microwave integrated circuit, MMIC. 17. A fabrication method for producing a circuit according to any of claims 1 to

12, comprising the steps of

- providing a substrate;

- depositing an active layer;

- providing active and/or passive components on the active layer; - providing a plurality of non-conducting pillars on the active layer;

- depositing a first metal layer on the active layer and the nonconducting pillars;

- depositing a dielectric insulator layer on the first layer;

- depositing a second metal layer on the dielectric insulator layer;

wherein the metal layers are formed so as to provide a respective connection port on the first and second metal layers.

18. The fabrication method according to claim 17, wherein the non-conducting pillars are formed by:

- depositing benzocyclobutene, BCB, on the active layer;

- providing a pattern of resist on the BCB layer; and

- machining the resist and BCB material to form pillars.

19. The method according to claim 18, wherein the machining is performed by photolithography, etching, or surface micromachining.

20. The fabrication method according to any of claims 17 to 19, wherein the plurality of pillars are formed in a pattern with an inter-distance of 5 - 50 micrometres between adjacent pillars.

Description:
Capacitor in Monolithic Integrated Circuit

Technical field The present invention relates to system and arrangements for a MIM capacitor in a monolithic integrated circuit and method for manufacturing the same.

Background Monolithic integrated circuits in high power and/or high frequency applications are used in various applications such as in for instance radar applications and power amplifier applications but also in telecom applications. Radio frequency and mixed-signal integrated circuits use capacitors for decoupling, filtering, and other functions. Metal-insulator-metal (MIM) capacitors have been widely used for radio-frequency applications due to their low parasitic capacitance and low resistivity. These capacitors have good power density and high capacitances. Generally, energy density is proportional to capacitance density and the square of breakdown voltage. Within radar and telecom applications highly integrated circuit solutions are used in so called monolithic microwave integrated circuits, MMIC.

However, the use of high capacitance and high voltage breakdown MIM capacitors in for instance MMIC applications requires bulky solutions and makes it difficult to provide a back-end of line solution, i.e. fitting and/or interconnecting individual devices such transistors, capacitors, resistors and so on a circuit wafer pre-arranged with contacts, insulating layers and so on, for providing these types of high efficiency capacitor devices.

Summary

It is an object to obviate at least some of the above disadvantages and provide improved circuits and methods of manufacture for monolithic integrated circuits with high efficiency capacitors. This is provided in a number of embodiments, such as a monolithic integrated circuit comprising a substrate, an active layer coupled to the substrate, the active layer having a first side adjacent to the substrate and a second side. The circuit further comprising a plurality of active and/or passive components disposed on the second side of the active layer, a metal-insulator-metal, MIM, structure formed on the active layer The MIM structure comprising a plurality of nonconducting pillars formed on the active layer, a first metal layer formed on the active layer and the non-conducting pillars, a dielectric insulator layer on top of the first metal layer, and a second metal layer formed on top of the dielectric layer. Wherein the metal layers each having a respective electrical connection port, and wherein the metal-insulator-metal structure form a single capacitor.

The use of the non-conducting pillars to provide support for the MIM layers provide a large surface area and thus highly increased capacitor specification values. The capacitor specifications are determined by the number of pillars and the physical dimensions of the pillars and the thickness of the different layers; the specifications comprise for instance capacitance and break-down voltage.

Suitable dimensions of the pillar may be for instance pillar width is in the range of 5 - 100 micrometres and the thickness of the pillars may be in the range 10 - 100 micrometres.

Preferably, the non-conductive pillars comprise one of benzocyclobutene, BCB, epoxy based photo-resist, or polyimide. BCB has an advantage of being easily deposited onto the active layer and have suitable mechanical properties.

With suitable dimensions and number of pillars the capacitors may be formed with a breakdown voltage in the range 100 - 1000 V a capacitors capacitance per mm2 in the range of 2 - 20 nF. The number of pillars may be in the range of 10 - 1000 pillars for each capacitor. The pillars may be formed with an interdistance of 5 - 50 micrometres between adjacent pillars. The non-conductive pillars may be formed by photolithography, etching or surface micromachining. The dielectric insulator layer may be formed in SiN or Si02. Another embodiment is provided, a system comprising a monolithic integrated circuit as described above and a processor configured to control the monolithic integrated circuit to transmit and/or receive signals. The system may be used for instance as a power amplifier or a radar system. Yet another embodiment is provided a fabrication method for producing a circuit as described above. The fabrication method comprises the steps of providing a substrate, depositing an active layer, providing active and/or passive components on the active layer, providing a plurality of non-conducting pillars on the active layer, depositing a first metal layer on the active layer and the non-conducting pillars, depositing a dielectric insulator layer on the first layer, and depositing a second metal layer on the dielectric insulator layer.

The non-conducting pillars may be formed by depositing benzocyclobutene,

BCB, on the active layer, providing a pattern of resist on the BCB layer, and machining the resist and BCB material to form pillars. The machining may be performed by photolithography, etching or surface micromachining.

The proposed solution makes it possible to achieve high capacitance and high breakdown voltage capacitors in monolithic integrated circuits with the

advantages of being in a cost effective way. Furthermore, advantageously, these solutions provide this at low circuit footprint area and may also be provided in a back-end of line process.

Brief description of the drawings

In the following the invention will be described in a non-limiting way and in more detail with reference to exemplary embodiments illustrated in the enclosed drawings, in which: Fig. 1 is a schematic block diagram illustrating an example integrated circuit in a cross-section side view;

Fig. 2 is a schematic block diagram illustrating an example integrated circuit cross-section top view;

Fig. 3 is a schematic block diagram illustrating a method of manufacture.

Fig. 4 is a schematic block diagram illustrating a system with a monolithic integrated circuit.

Detailed description

In Fig. 1 reference numeral 100 generally denotes a metal-insulator-metal structure comprising a plurality of pillars 1 10. The structure is provided on a monolithic integrated circuit 200 comprising a substrate layer 101 and an active layer 102 formed on the substrate. The substrate may be for instance Silicon Carbide (SiC) or Silicon (Si) but also other substrate materials may be used. The active layer is formed with a combination of conducting materials, semi- conducting materials and non-conductive materials. On the active layer a plurality of active and/or passive electrical components are formed or placed, such as amplifiers, resistors, capacitors, inductors and so on. On the active layer also a metal-insulator-metal (MIM) structure is arranged which provide a capacitor function. The MIM structure comprise 3 layers: metal, insulator, and metal layers formed in that mutual order; however, in order to increase surface yield the MIM layers are provided on top of a plurality of non-conductive pillars 103 also part of the structure as illustrated Fig. 1 in a cross-sectional side view. This increases the surface area of the MIM layer which control several functional parameters of the MIM structure capacitor function, such as capacitance and break-down voltage. The capacitance can be increased versus area on the circuit board as well as increase the breakdown voltage. The metal layers may be of any suitable conducting material, for instance copper, gold, silver, or aluminium. The insulator material of the MIM structure may be for instance Silicon Nitride (SiN) or Silicon dioxide (SiCte); however, other dielectric materials may be used. The metal layers are formed in such a way in the structure as to provide an electrical connection to each metal layer, i.e. the first metal layer 104 has a first connector area 107 and the second metal layer 106 has a second connector area 108. These connector areas are used for connecting the capacitor to other components on the integrated circuit. It should be noted that the other components may be provided beside the MIM structure on the same active layer or in a different active layer on a multi-layered design.

Preferably the non-conductive pillars are manufactured in benzocyclobutene (BCB) due to advantageous characteristics; however, other materials may be used such as other dielectric polymers, e.g. polyimide, epoxy based photo-resist, e.g. SU-8, or other materials providing a stable support for the MIM layers and suitability in manufacturing process. Typically, the BCB is spun onto a substrate to desired thickness, then a mask is developed on the BCB layer, and material not needed is etched away. The planarity of BCB allows vias to be formed using bumps fabricated prior to BCB application. This approach eliminates the need for laser drilling, plasma etching, and plated holes. This technique allows the integration of hybrid components using an inexpensive micromachined silicon motherboard and benzocyclobutene (BCB) films. If highly accurate planarity and thickness control is needed chemical-mechanical polishing (CMP) methods may be used when providing the BCB layer.

The capacitor in form of the MIM structure 100 is preferably used in monolithic integrated circuits for different applications such as radar or power amplifier applications. Fig. 2 illustrate schematically an integrated circuit 200 with the MIM structure 100 with its pillars 1 10 and connector ports 107, 108. These connectors are connected to one or several components 201 , 202 of the integrated circuit. Further components 203, 204 may be provided on the integrated circuit for building up the functionality of the circuit. The components building up the circuitry may be for example amplifiers, transistors, resistors, capacitors, and inductors; however, these are only examples and the components are not limited to these exemplified depending on functionality. One advantage of the present solution with the use of pillars is that the integrated circuit may be manufactured in several separate steps if needed, i.e. first the integrated circuit with active layer and the active/passive components may be produced and at a later stage and at some other facility the MIM structure may be provided, i.e. a back-end of line manufacturing process. The use of these MIM pillar structures are fully compatible with GaN/GaAs MMIC technologies. It should be noted that in between the different layers mentioned above other layers of non-conducting or semi-conducting materials may be provided depending on the fabrication method and how the MIM capacitor will be used in different applications. For instance, the circuit may be sealed with appropriate ceramic sealing material and provided as an integrated chip for different applications.

The steps of manufacturing the metal-insulator-metal structure on an active layer is schematically illustrated in Fig. 3. In a first step 301 a substrate together with an active layer with some active and/or passive components are provided. The forming of the active layer on the substrate may be performed in another process or in a continuous process with the formation of the metal-insulator-metal structure with the non-conducting pillars.

In a next step 302, a plurality of non-conductive pillars, e.g. of a dielectric polymer, are formed on the active layer to build up MIM capacitor structure 100. Preferably, the non-conductive pillars on the active layer are formed by deposition and/or micromachining with a suitable process depending on the material of the non-conductive pillars. With micromachining is meant material removal at the micro or nanometer level to form structures. This can be done using a negative or positive resist and then removal of suitable material. The machining may be performed for instance by photolithography, etching or surface micromachining.

The non-conductive pillars are preferably manufactured with benzocyclobutene (BCB) due to advantageous characteristics; however, other materials may be used such as other dielectric polymers, e.g. polyimide, epoxy based photo-resist, e.g. SU-8, or other materials providing a stable support for the MIM layers and suitability in manufacturing process. Using BCB as a pillar structure, these are preferably formed by spinning BCB material onto the active layer, providing a suitable mask for forming pillars or islands, and then removing unwanted BCB to form pillars. BCB is advantageous since it is easy to deposit onto the circuit and subsequently machined and furthermore, have suitable mechanical properties such as low thermal expansion, stable, and non-conductive.

The plurality of pillars are preferably formed in a pattern with for example an inter-distance of 5 - 50 micrometres between adjacent pillars. As seen in Fig. 2, the pillars may be formed in a square matrix structure; however, other patterns may be used depending on the circuit dimensions, layout, or other preferences.

Further, in step 303, a first conductive metal layer is deposited on the active layer and the non-conducting pillars covering the area of the overall capacitor structure 100. The metal layer may be formed for instance by copper, gold, silver, or aluminium with a thickness in the range of 0.1 - 20 micrometres and more preferably in the range 0.1 - 3 micrometres. However, it should be noted that other conductive materials may be used depending on application.

In step 304, a dielectric insulating material is deposited on the first metal layer. The dielectric insulating material is formed with a thickness in the range of 0.1 - 20 micrometres and more preferably 0.1 - 1 micrometre. The break-down voltage of the capacitor is in part determined by the thickness of the dielectric insulating layer.

On top of the dielectric insulating material a second conductive metal layer is deposited in step 305. The thickness of the second metal layer may be formed in the range of 0.1 - 20 micrometres, and more preferably 0.1 - 3 micrometres.

This second metal layer may be of the same material as the first metal layer or a different material depending on the wanted properties of the now formed metal- insulator-metal capacitor on top of the non-conductive pillars 103.

The first and second conductive layers are formed as to provide connector areas 107, 108 for each layer. By varying the thicknesses of the different metal/conductive layers, the materials used, and the total surface area formed in these metal-insulator-metal capacitors different capacitive properties may be developed. In general, the number of pillars, height, and thickness of layers govern the capacitance of the capacitor and the thickness of the dielectric insulator between the metal layers govern the break-down voltage of the capacitor.

It should be noted that in between the different layers mentioned above other layers of non-conducting or semi-conducting materials may be provided depending on the fabrication method and how the MIM capacitor will be used in different applications.

The capacitor structure may find applicability within different areas, which now will be discussed.

Fig. 4 illustrate schematically a radar device with a radar control circuitry 400 comprising a processor 41 1 , an optional storage medium 412 for storing instruction sets and/or data used in controlling the radar, and for communicating with an external device. The processor may be any suitable type such as a microprocessor, digital signal processor, ASIC (Application Specific Integrated Circuit), FPGA (Field Programmable Gate Array), or similar. The storage medium may be of non-volatile and/or volatile type , for instance RAM, EEPROM, flash disk and so on. The processor may be connected to a communication port 415 for communicating with an external device. The communication port may be of any suitable type such as Ethernet, I2C bus, RS232, CAN bus, wireless communication technology such as IEEE 802.1 1 based or cellular based technologies, or other communication protocols depending on application. The processor may comprise a number of functional modules 420, 430, 440 for different functionality; for instance a transceiver control module 420, a communication module 430, and an analysis and control module 440. The transceiver control module 420 controls the transmission and receiving of signals, the communication module 430 may handle internal and/or external communication data via the communication port. The analysis and control module 440 may be arranged to control the overall operation of the device. Further, the control circuitry 400 comprise a transceiver 450 with active and/or passive electronic components as discussed in relation to Fig. 2 and also the MIM structure 100. The transceiver 450 in turn is connected to at least one antenna 470 via at least one transmission line 460. The antenna is arranged to transmit and receive radar signals controlled by the control circuitry 400. This type of radar application may be used in different radar applications such as automotive radar, flight radar, tracking radar, military radar, surveillance radar, and so on. The control circuitry 400 may be arranged to control the behaviour of the antenna as transmitter or receiver alternatively; however, it should be noted that the radar device may be designed with at least two antennas: one for transmitting and one for receiving radar signals.

In another example of usage, the metal-insulator-metal capacitor formed together with the pillars are used in different amplifier electronic circuits to build up an efficient amplifier, for example in RF applications for providing an efficient and small footprint RF amplifier, furthermore, this type of solution is advantageous in highly integrated power electronics, e.g. in Power System-on-chip solutions in solutions where a small footprint is needed. RF power amplifiers may be used in for instance telecom applications such as in a base station or in other types of wireless communications applications.

Also, in microwave communications solutions, the use of these capacitor structures may find applicability. Microwave communications devices are often used within telecom infrastructure setups and provide back-bone communication between telecom base stations. Being able to increase the capacitor efficiency and reduce the electronics footprint build area is advantageous.

Further areas may be for instance in ultra-compact sensors applications providing high efficiency capacitors both as passive components but also as power supply for instance in loT applications.

It should be noted that the word“comprising” does not exclude the presence of other elements or steps than those listed and the words“a” or“an” preceding an element do not exclude the presence of a plurality of such elements. It should further be noted that any reference signs do not limit the scope of the claims, that the invention may be at least in part implemented by means of both hardware and software, and that several“means” or“units” may be represented by the same item of hardware.

The above mentioned and described embodiments are only given as examples and should not be limiting to the present invention. Other solutions, uses, objectives, and functions within the scope of the invention as claimed in the below described patent embodiments should be apparent for the person skilled in the art.

Abbreviations BCB benzocyclobutene

PCB Printed circuit board

MMIC Monolithic microwave integrated circuit

MIM Metal-lnsulator-Metal