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Title:
CARRIER TAPE FOR ELECTRONIC COMPONENTS
Document Type and Number:
WIPO Patent Application WO/2005/082737
Kind Code:
A1
Abstract:
Carrier tape (1) for a plurality of electrical components has a cavity (2) for each electrical component. A support elevation (7) on a bottom surface of the cavity (2) is provided. From the inner side of the support elevation (7) and from the side walls (18) of cavity (2) extend protruding portions (8, 12) towards the centre of the cavity (2).

Inventors:
CHEW ALEX BOON KIAT (SG)
TOH CHYE LIN (SG)
TYE CHING YUN (SG)
SEAH LEE HUA ALVIN (SG)
Application Number:
PCT/IB2004/000210
Publication Date:
September 09, 2005
Filing Date:
January 29, 2004
Export Citation:
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Assignee:
INFINEON TECHNOLOGIES AG (DE)
CHEW ALEX BOON KIAT (SG)
TOH CHYE LIN (SG)
TYE CHING YUN (SG)
SEAH LEE HUA ALVIN (SG)
International Classes:
B65D73/02; H05K13/00; (IPC1-7): B65D73/02
Foreign References:
US5361901A1994-11-08
EP1264779A12002-12-11
JPH0858877A1996-03-05
Attorney, Agent or Firm:
Schweiger, Martin c/o Kanzlei Schweiger & Partner (Karl-theodor-str. 69, München, DE)
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Claims:
Patent Claims
1. Carrier tape (1) for a plurality of electrical components comprising the following features: a cavity (2) for each electrical component, at least one support elevation (7) on a bottom surface of the cavity (2), from the inner side of the support elevation (7) and from the side walls (18) of cavity (2) extend protruding portions (8,12) towards the centre of the cavity (2).
2. Carrier tape (1) according to claim 1 characterized in that protruding portion (8,12) includes a ledge (19,20).
3. Carrier tape (1) according to claim 1 or claim 2 characterized in that the carrier tape (1) includes a plurality of cavities (2) spaced at intervals along the carrier tape (l). and at least one column of sprocket holes (3,4) positioned lon gitudinally towards an edge of the carrier tape (1).
4. Carrier tape (1) according to one of claims 1 to 3 characterized in that the cavity (2) can accommodate either a first electronic component having first outer dimensions or a second elec tronic component having second dimensions.
5. Carrier tape (1) according to one of claims 1 to 4 characterized in that the cavity (2) has a recess (5) in two opposing side walls.
6. Carrier tape (1) according to one of claims 1 to 5 characterized in that the cavity (2) has rounded edges and corners and is wider at the top than at the bottom.
7. Carrier tape (1) according to one of claims 1 to 6, characterized in that a laminate semiconductor package (13) rests on ledges (19, 20) of protruding portions (8,12).
8. Carrier tape (1) according to one of claims 1 to 7, characterized in that a leadframe semiconductor package (9) rests on upper sur face (21) of support elevations (7).
9. Use of a carrier tape (1) according to one of the afore mentioned claims for transporting electrical components such as semiconductor packages.
Description:
Carrier tape for electronic components The invention relates to a carrier tape for electronic compo- nents.

EP 1 264 779 discloses a packing tape assembly which comprises a tape substrate with openings. A box, which is formed by folding paper, is inserted into each opening to create a re- ceiving pocket for an electronic component.

JP 8058877 discloses a carrier tape in which a cover strip is heat sealed to the carrier tape on one edge of the carrier tape and fixed by an openable fastener on the other edge.

These carrier are very expensive and inconvenient for packing and transporting electronic components.

It is one object of the invention to provide a simpler and more economic carrier tape. This object of the invention is solved by the subject matter of the independent claims. Fur- ther improvements arise from the subject matter of the depend- ent claims.

The carrier tape is suitable for a plurality of electrical components and comprises a cavity for each electrical compo- nent. Each cavity includes at least one support elevation on a bottom surface of the cavity. The support elevation may com- prise an island or a side wall of the cavity which extends in the lateral direction of the carrier tape. The inner side of the support elevation and the side walls of cavity include protruding portions which extend towards the centre of the cavity.

The cavity of the carrier tape may be used to accommodate ei- ther a first electronic component having first outer dimen- sions or a second electronic component having second outer di- mensions. The electronic components may comprise semiconductor packages.

The carrier tape according to the invention is not only de- signed for only one type of semiconductor package. Therefore different electronic components with more than one outer di- mensions may fit tightly inside the recesses of the carrier tapes and they may not move within the recess and become dam- aged during transport to the customer. One and the same car- rier tape can therefore economically be used for many differ- ent electronic components. This helps saving costs and making the packing and transportation process easier.

The support elevation can be provided by a horizontal, verti- cal or inclined surface of a support elevation or side wall of the cavity. An electronic component may be supported in the cavity, mainly held in place or its movement within the cavity restricted by one or by a variety of different types of sur- face. The electronic components may be accommodated in the cavity in different ways depending on the position of the sup- port elevations and outer dimensions and external contact ar- rangement of the electronic component.

The support elevation may comprise an island positioned on the bottom of the cavity. This enables a leadframe-based elec- tronic component to be accommodated in the cavity. The body of the leadframe package rests on and is supported by the upper surface of the support elevation island. The leads of the leadframe package, which normally project downwards from the

body of these types of packages, are accommodated inside the cavity without touching the bottom surface of the cavity. This is important as bending or damage to the leads of the package means that the package can no longer be used.

The side walls of the electronic component which do not in- clude leads are in close proximity or abut the side walls of the cavity. Alternatively, the sides of the electronic compo- nent which do not include leads may rest on ledges or protrud- ing portions on the side walls of the cavity. The electronic component is therefore prevented from moving significantly, during the subsequent assembly steps of the carrier tape or during transit of the reel to the customer.

Alternatively the support elevation comprises protruding por- tions which extend towards the centre of the cavity from ei- ther two opposing side walls or from four side walls of the cavity. The protruding portions may also include ledges. An electronic component may be supported on the protruding por- tions or ledges only on two opposite sides. This arrangement has the advantage of being suitable for leadframe packages which include leads on two opposing sides of the package. Al- ternatively, the electronic component may be supported on four protruding portions or ledges, which has the advantage of greater support and restriction of movement of the electronic component.

The support elevations in the form of ledges have the advan- tage that only the edge portions of the component rest on the ledges. This is particularly advantageous for components where the external contacts are located in the centre of the bottom surface of the component, for example flip-chip semiconductor packages. The external contacts are therefore prevented from

touching the support elevations and/or bottom of the cavity.

This prevents damage to the external contacts of the compo- nent.

The cavity of the carrier tape of the invention preferably has a recess in two of the side walls which face opposite to one another. This has the advantage that a first electronic compo- nent can accommodated within the four outer corners of the two recesses and a second component of a different size can be ac- commodated within the four corners of the cavity.

The support elevations may comprise protruding portions which include ledges and which extend from the side walls of the re- cesses towards the centre. An electronic component may be sup- ported by the ledges of the protruding portions located in the recesses.

Alternatively, the cavity may additionally include support elevations in the form of islands which extend from the bottom of the cavity and also include protruding portions with ledges on the inner side walls. The electronic component may be sup- ported by ledges in the recesses of the cavity and ledges on the support islands. Alternatively an electronic component may be supported only by protruding portions or ledges on support islands. In this embodiment the walls of the cavity include no protruding portions.

Preferably the cavity rounded edges and corners and is wider at the top than at the bottom. This enables the components to be easily placed into and removed from the cavity.

The outwardly inclining side walls of the cavity also provide a contact between the bottom edge of an electronic component

and the side wall. This contact can be used to clamp the com- ponent in place within the cavity. The support elevation may also be built on a longitudinal wall or side wall which ex- tends upwards from the bottom surface of the cavity. Elec- tronic components may be clamped in the cavity between two op- posing side walls or between all four sides of the cavity de- pending on the size of the component.

The cavity preferably has a hole in the bottom surface which is more preferably located in the centre of the bottom surface of the cavity. The hole enables a rod to be inserted from out- side of the package to push the electronic component towards the top or above the top surface of the carrier tape so that the electronic component can be gripped by the unpacking ma- chine. If the material of the carrier tape is sufficiently flexible, then a hole may not be included as, the carrier tape will deform when the rod is pushed against the outer surface of the bottom of the cavity, allowing the force to be trans- ferred to the electronic component which will be raised up- wards. A hole may also not be included in the bottom surface of the cavity depending on the gripping mechanism of the auto- matic machinery.

The positioning of the support elevations advantageously en- ables electronic components of different outer dimensions to be packed into the same carrier tape such that movement of the components within the cavity is minimized. The positioning of support elevations may be varied to accommodate different electronic components which it is desired to pack in the car- rier tape.

Preferably a semiconductor leadframe package rests on the up- per side of the support elevations. It is mainly held in place

the cavity by contact between at least the bottom edge of the side walls of the body of the leadframe package and the out- wardly inclining side walls of the cavity.

Preferably a laminate semiconductor package rests on the ledges of the protruding portions. It is mainly held in place the cavity by contact between the side walls of the laminate package and the vertical side walls of the ledges of the pro- truding portions.

The carrier tape preferably includes a plurality of cavities spaced at intervals along its length. This enables many elec- tronic components to be packed into a single reel of carrier or packing tape. The carrier tape also includes at least one column of sprocket holes positioned longitudinally towards an edge of the carrier tape. This enables the carrier tape to be fed through automatic machines such as component pick and place machines. The electronic components may then be placed into the cavities during the packing process automatically by machine and may be removed automatically from the cavities by machine when the electronic components are subsequently used by the consumer.

The size and positioning of the sprocket holes and the size and positioning of the cavities in the carrier tape are chosen so as to comply with the relevant industry standards. This en- ables the carrier tape according to the invention to be used with the existing automatic packing, assembly and component unpacking machinery.

The carrier tape is used for transporting electrical compo- nents such as semiconductor packages.

The carrier tape according to the invention has the advantage as the same carrier tape can be used either for a plurality of electronic components of a first size or a plurality of compo- nents of a second size or both sizes of components may be packed into the same reel of carrier tape. This offers clear advantages over carrier tapes which are only designed to be able to accommodate one size of electronic component. The de- sign and usage of the carrier tape is therefore more flexible compared with a carrier tape in which only one size of elec- tronic component can be packed or accommodated.

Thus a single reel of carrier tape can be used for packing semiconductor packages which have different outer dimensions such as dual/multiple laminate and leadframe packages for ex- ample. The expense and inconvenience of acquiring and stocking a range of custom sized carrier tapes for each type of elec- tronic component is eliminated. The machine conversion time for running a new carrier tape for a new semiconductor package at the Mark Scan Pack (MSP) process is also advantageously re- duced.

An embodiment of the invention will now be described by way of example with reference to the drawings.

Figure 1 shows a top view of a section of a carrier tape in- cluding a cavity for a semiconductor package, Figure 2 shows a top view of the cavity of Figure 1 including a leadframe semiconductor package, Figure 3 shows a top view of the cavity of Figure 1 including a laminate semiconductor package, Figure 4 shows the cross-sectional view A-A of the cavity of Figure 1,

Figure 5 shows the cross-sectional view B-B of the cavity of Figure 1, Figure 6 shows the cross-sectional view C-C of the cavity of Figure 1, and Figure 7 shows the cross-sectional view D-D of the cavity of Figure 1.

Figure 1 shows the top view of a section of a carrier tape 1 including a cavity 2 for semiconductor packages. The direction of the carrier tape 1 referred to as longitudinal in the de- scription of the figures is depicted vertically in Figure 1.

The direction of the carrier tape 1 referred to as lateral in the description of the figures is depicted horizontally in Figure 1.

The carrier tape 1 includes a plurality of cavities 2 arranged at constant intervals along its length. The dimensions and the materials properties of the carrier tape 1 and the spacing of the cavities 2 along the carrier tape 1 are chosen so as to comply with the relevant known industry standards.

The carrier tape 1 includes two columns of sprocket holes 3 and 4 positioned longitudinally, one column towards each edge of the carrier tape 1. A first column of sprocket holes 3 with a circular cross-section are positioned towards the left hand edge and a second column of sprocket holes 4 with an essen- tially lozenge-shaped cross-section are positioned towards the right hand edge of the carrier tape 1 in the orientation de- picted in Figure 1. The lateral width of the carrier tape 1 and the positioning and size of the sprocket holes 3,4 are chosen so that the carrier tape 1 fits standard carrier tape reels or spools and machines and complies with the relevant known industry standards.

The cavity 2 is located in the centre of the carrier tape 1 and has an essentially rectangular form in the plane of the carrier tape 1. The long side of the rectangle is positioned laterally across the tape. The corners of the cavity 2 are rounded. Each of the two lateral sides of the cavity 2 include a recess 5 positioned approximately centrally in the lateral side wall and having a width of approximately two thirds of the lateral side of the cavity 2. The outer corners of the re- cess are rounded.

At the centre of each recess 5 is a protruding portion 12. The protruding portion 12 protrudes into the cavity so that its inner wall is on approximately the same lateral line as the inner wall of the cavity 2 outside of the recess 5. The pro- truding portion 12 has, in the top view of Figure 1, a rectan- gular shape and is located centrally in the recess 5. The lat- eral width of the protruding portion 12 is approximately one third of the lateral width of the recess 5. A circular hole 6 is located in the centre of the bottom surface of the cavity 2.

The cavity 2 also includes two support elevations 7 arranged as islands on the bottom surface of the cavity 2. The support elevations 7 are, as seen in the top view of Figure 1, rectan- gular and arranged so that the long side is positioned and in the longitudinal direction of the carrier tape 1. The corners of the support elevation 7 are rounded. The inner long side of each support elevation 7 includes a protruding portion 8 lo- cated approximately centrally along the inner long side of the support elevation 7. The protruding portion 8 is, as seen in the top view of Figure 1, rectangular with its long side in the longitudinal direction of the tape carrier 2. The length

of the protruding portion 8 is approximately half the length of the long side of the support elevation 7.

Each support elevation 7 is positioned within the cavity 2 to- wards the outer edge of the carrier tape 1 so that the dis- tance between the outer sides of the elevation 7 and the inner walls of the cavity 2 is approximately the same. The support elevations 7 are positioned within the cavity 2 so that the inner long sides of the elevations 7 are approximately later- ally aligned with the inner corners recesses 5 of the cavity 2.

The same reference numbers are used in all of the Figures to denote the same features and are not necessarily described again in the description of each Figure.

Figure 2 shows a top view of the cavity 2 of the carrier tape 1 shown in Figure 1 including a leadframe semiconductor pack- age 9 within the cavity 2. The leadframe package 9 is, when viewed from above the carrier tape 1, essentially rectangular and includes a plurality of leads 10 along its long sides. The leadframe package 9 fits within the cavity 2 so that its shorter sides are in close proximity to and partly abut the longitudinal sides 22 of the cavity 2 and the outer edges of the leads 10 are in close proximity with the long sides of the cavity 2. The package body 11 of the leadframe package 9 rests on the upper surface 21 of the support elevations 7.

Figure 3 shows a top view of the cavity 2 including a laminate semiconductor package 13 within the cavity 2. The laminate package 13 is, when viewed from the top of the carrier tape 1, essentially square and fits within the cavity 2 so that it rests on the ledges 19 of the protruding portions 12 of the

recesses 5 and on the ledges 20 of the protruding portions 8 of the elevations 7. The corners of the laminated package 13 are in close proximity to the corners of the recesses 5.

Figure 4 shows the cross-sectional view A-A of the cavity 2 of the carrier tape 1 shown in Figure 1. The cross-sectional shape of the cavity 2, support elevations 7 and the vertical positioning of two types of semiconductor package, a leadframe package 9 and a laminate package 13, are shown. The cavity 2 has an approximately rectangular cross-section and is slightly wider at the top than at the bottom. The cavity 2 is wider than it is deep. The outer dimensions of the cavity are chosen to comply with the relevant known industry standards. The edges and corners of the cavity 2 are rounded.

Each support elevation 7 has an approximately square cross- section. A depression 14 in the material comprising the cavity wall raises the central portion of the bottom surface of the support elevation 7 by approximately the width of the material comprising the cavity wall. A rectangular cutout 15 of the top inner corner of the protruding portion 8 of the support eleva- tion 7 creates a ledge 20 and vertical side wall 23 on the protruding portion 8 on the inner side of the elevation 7. The protruding ledge 20 is therefore positioned lower in the cav- ity than the top surface of the support elevation 7. The edges of the support elevation 7 where it joins the bottom surface of the cavity 2 are rounded. The edges at the top surfaces and cutout 15 are square.

The protruding portion 12 of the recess 5 includes a ledge 19 at approximately the same height above the bottom of the cav- ity 2 as that of the protruding ledge 20 of the elevation 7.

The dimensions of the ledges 19,20 and their position within the cavity are chosen so as to accommodate the type of elec- tronic component or semiconductor package which it is desired to pack in the cavity 2. The dimensions and position of the ledges 19,20 are also chosen to comply with the relevant known industry standards.

The position of two types of semiconductor package within the cavity 2 is also shown in Figure 4. The bottom surface of the laminate package 13 rests on the protruding ledge 20 of the support elevation 7 and the ledge 19 of the protruding portion 12. The bottom portions of the side walls of the laminate package 13 abut the vertical surface 23 formed by the cutout 15 of the protruding portion 8 of the elevation 7. The contact between the side walls of the laminate package 13 and the ver- tical surface 23 of the protruding portion 8 mainly holds the packages in place within the cavity 2. The top surface of the laminate package 13 is lower than that of the upper surface of the carrier tape 1.

The bottom surface of the body 11 of the leadframe package 9 rests on the upper surface 21 of the support elevations 7. The top surface of the body 11 of the leadframe package 9 lies on approximately the same plane as that as the top surface of the carrier tape 1. The side walls of the leadframe package 9 are in close proximity to the inner side walls 22 of the cavity 2 and the lower edge of the side wall abuts the side wall 22 of the cavity 2 mainly holding the leadframe package 9 in place in the cavity 2. The leads 10 of the leadframe package 9 are located in the space between the outer sides of the support elevation 7 and the inner walls 22 of the cavity 2.

Figure 5 shows the cross-sectional view B-B of the cavity 2 of Figure 1 which more clearly shows the protruding portion 12 of the recess 5 positioned in the longer lateral side of the cav- ity 2. The top inner edge of the protruding portion 12 in- cludes a cutout 17 of rectangular cross-section, the longer side being vertical. This forms a ledge 19, whose upper sur- face is at the same height above the bottom of the cavity 2 as the ledge 20 of the protruding portion 8 of the elevations 7, and a vertical wall 24. The position of the inner wall of the recess 5 is indicated by a dotted line 18. The bottom surface of the laminate package 13 rests on the ledge 19 and the outer side wall of the laminate package 13 abuts the vertical wall 24 formed by the cutout 17. The laminate package 13 is mainly held within the cavity 2 by contact between its side walls and the vertical walls 23,24 of the protruding portions 8 and 12.

The bottom inner edge of the cavity between the recess 5 and the floor of the cavity 2 is rounded.

Figure 6 shows the cross-sectional view C-C of the cavity 2 shown in Figure 1. The inner wall of the recess 5 is shown by the solid line 18. The protruding portion 12 and ledge 19 formed by the cutout 17 protrude into the cavity 2. The lami- nate package 13 rests on the ledge 19 and its vertical side wall abuts the outer vertical wall 24 formed by the cutout 17 of the protruding portion 12. The edge between the recess 5 and floor of the cavity 2 is rounded.

Figure 7 shows the cross-sectional view D-D of the cavity 2 shown in Figure 1. The laminate package 13 is shown resting on the ledge 20 formed by the cutout 15 of the top inner corner of the protruding portion 8 of the support elevation 7. The outer wall of the laminate package 13 abuts the vertical side wall 23 of the protruding portion 8 of the support elevation 7

formed by the cutout 15. The body 11 of the leadframe package 9 rests on the upper surface 21 of the support elevation 7.

The outer side wall of the body 11 of the leadframe package 9 is in close proximity to the inner side wall 22 of the cavity 2 and its lower edge abuts the side wall 22 of the cavity 2 so that the leadframe package 9 is mainly held within the cavity 2. A lead 10 of the leadframe package 9 is located in the space between the outer wall of the support elevation 7 and the inner wall 22 of the cavity 2. The inner corners of the cavity and elevation 7 and the edges of the depression 14 of the elevation on the bottom outer surface of the cavity 2 are rounded.

The carrier tape 1 comprises a flexible electrically non- conducting material, such as a plastic, polymer, resin or pa- per-based materials or a composite based on one of these mate- rials. The material is chosen so that the properties of the carrier tape 1 comply with the relevant known industry stan- dards.

The carrier tape 1 of the invention is used by placing an electronic component, for example a semiconductor package 9, 13, into a cavity 2 of the carrier tape 1. In normal operation a plurality of electronic components are packed into a plural- ity of cavities, with one component being placed in each cav- ity. The electronic components may all be of the same type or they may be of different types and/or have different external dimensions. It is a particular advantage of the carrier tape 1 of the invention that two different types of semiconductor package 9,13 may be packed into a single carrier tape 1.

After the semiconductor packages 9,13 have been placed in the cavities 2 of the carrier tape 1, a cover strip, which may

comprise of the same material as that of the carrier tape, is sealed onto the top surface of the carrier tape 1. The sealing may be performed by the use of adhesives or by heat sealing the cover strip to the carrier tape 1. These methods are known in the art. The cover strip further protects the semiconductor package 9,13 from dust and dirt and also prevents the semi- conductor package 9,13 from falling out of the cavity 2 should it become dislodged. The carrier tape 1 containing the semiconductor packages with the cover strip sealed on the top surface is then wound onto a reel or spool which is then sent to the customer.

Reference Numbers 1 carrier tape 2 cavity 3 round sprocket hole 4 lozenge sprocket hole 5 recess 6 central hole 7 support elevation 8 protruding portion of support elevation 7 9 leadframe semiconductor package 10 lead fingers of leadframe package 9 11 body of leadframe package 9 12 protruding portion of recess 5 13 laminate semiconductor package 14 depression in bottom surface of support elevation 7 15 cutout of protruding portion 8 17 cutout of protruding portion 12 18 inner wall of recess 5 19 ledge of protruding portion 12 20 ledge of protruding portion 8 21 upper surface of support elevation 7 22 side walls of cavity 2 23 vertical wall of protruding portion 8 24 vertical wall of protruding portion 12




 
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