The present invention relates to a cash till drawer apparatus and a method of operating a cash till drawer.

Electronic point of sale ("EPOS") systems are often used to coordinate cash till transactions. As part of a transaction, the EPOS system may provide an event signal (e.g. an "open" signal) to a cash till drawer opening mechanism so as to operate the mechanism and open the cash till drawer. Cash can then be inserted into and removed from the cash till drawer as part of the transaction. Once the appropriate amount of cash has been inserted into or removed from the drawer, the drawer can be closed again.

EPOS systems and cash till drawers are often designed specifically for one another. For example, the drawer opening mechanism of a cash till drawer may be designed to open a drawer in response to a particular open signal from a particular EPOS system. The drawer may also provide particular drawer presence or particular drawer status signals (e.g. "drawer open" or "drawer closed" signals) to the EPOS system. However, there are also large numbers of EPOS systems and cash till drawers currently on the market which are not compatible with one another.

One way to provide compatibility might be to provide an interface apparatus for each given EPOS system and cash till drawer combination. However, since there is a large number of different EPOS systems and cash till drawers currently on the market, a large number of such interfaces would be needed in order to support every combination of EPOS system and cash till drawer. Cash till drawers therefore cannot straightforwardly be ported between different EPOS systems. Furthermore, cash till drawers are typically "dumb" devices with any "intelligence" being provided by the EPOS system.

The Applicants therefore believe that there remains scope for improvements in cash till drawer apparatus.

According to an aspect of the present invention there is provided an apparatus for providing a control signal to an output device so that the output device can perform an action in response to an event signal from an input device, the apparatus comprising:

a supply voltage input configured to receive a supply voltage from an input device; an event signal input configured to receive an event signal from the input device that indicates that an output device is to perform an action;

a control signal output configured to provide a control signal to the output device so that the output device can perform the action; and

processing circuitry configured to, responsive to an event signal, determine the supply voltage of the input device, derive the control signal from the supply voltage based on the determined supply voltage, and provide the control signal to the output device at the control signal output so that the output device can perform the action.

According to another aspect of the present invention there is provided a method of providing a control signal to an output device so that the output device can perform an action in response to an event signal from an input device, the method comprising:

receiving, at a supply voltage input, a supply voltage from an input device;

receiving, at an event signal input, an event signal from the input device that indicates that an output device is to perform an action; and

processing circuitry, responsive to the event signal, determining the supply voltage of the input device, deriving the control signal from the supply voltage based on the determined - - supply voltage, and providing the control signal to the output device at a control signal output so that the output device can perform the action.

The present invention accordingly comprises, in response to an event signal (e.g. an open signal) from an input device (e.g. an EPOS system), determining the supply voltage of the input device, deriving a control signal (e.g. a drawer control signal) based on the determined supply voltage, and providing the control signal to an output device (e.g. a drawer opening mechanism) so that the output device can perform an action (e.g. open a drawer). Since the supply voltage of the input device is determined before being used to derive the control signal for the output device, the supply voltage of the input device need not be compatible with the output device. The present invention therefore allows different devices (e.g. cash till drawers) to be used with a variety of different input devices (e.g. EPOS systems).

The present invention is particularly suited to apparatus for providing a drawer control signal to a cash till drawer opening mechanism in response to an open signal from an EPOS system. However, the Applicants have also recognised that the general principles described herein can be suitably applied to other situations where an output device would normally perform an action in response to an event signal received directly from an input device having a supply voltage.

Nevertheless, in preferred embodiments, the input device comprises an EPOS system, the output device comprises a cash till drawer opening mechanism, the event signal from the EPOS system comprises an open signal that indicates that the cash till drawer is to be opened, and the action to be performed is opening the cash till drawer.

According to the present invention there is provided an apparatus for providing a drawer control signal to a cash till drawer opening mechanism so that the cash till drawer opening mechanism can open a drawer in response to an open signal from an EPOS system, the apparatus comprising:

a supply voltage input configured to receive a supply voltage from an EPOS system; an open signal input configured to receive an open signal from the EPOS system that indicates that a cash till drawer opening mechanism is to open a drawer;

a drawer control signal output configured to provide a drawer control signal to the cash till drawer opening mechanism so that the cash till drawer opening mechanism can open the drawer; and

processing circuitry configured to, responsive to the open signal, determine the supply voltage of the EPOS system, derive the drawer control signal from the supply voltage based on the determined supply voltage, and provide the drawer control signal to the cash till drawer opening mechanism at the drawer control signal output so that the cash till drawer opening mechanism can open the drawer.

According to another aspect of the present invention there is provided a method of providing a drawer control signal to a cash till drawer opening mechanism so that the cash till drawer opening mechanism can open a drawer in response to an open signal from an EPOS system, the method comprising:

receiving, at a supply voltage input, a supply voltage from an EPOS system;

receiving, at an open signal input, an open signal from the EPOS system that indicates that a cash till drawer opening mechanism is to open a drawer; and

processing circuitry, responsive to the open signal, determining the supply voltage of the EPOS system, deriving the drawer control signal from the supply voltage based on the - - determined supply voltage, and providing the drawer control signal to the cash till drawer opening mechanism at the drawer control signal output so that the cash till drawer opening mechanism can open the drawer.

In embodiments, the apparatus may be configured to receive a supply voltage in the range 6V to 40V. This covers the range of supply voltages typically used by EPOS systems.

In embodiments, the apparatus may comprise a supply voltage line and a ground (or 0V) line. The supply voltage input may be connected to the supply voltage line and to the ground voltage line such that the supply voltage is provided between the supply voltage line and the ground line.

In embodiments, the processing circuitry may comprise a supply voltage

measurement connection connected to the supply voltage line and a ground connection connected to the ground line.

In embodiments, determination of the supply voltage may be achieved by supply voltage determination circuitry. The supply voltage determination circuitry may comprise a voltage divider. The voltage divider may comprise two resistances (e.g. a first resistance provided by a first resistor (e.g. of 160k ohm) and a second resistance provided by a second resistor (e.g. of 10k ohm)) in series between the supply voltage line and the ground line, with the supply voltage measurement connection of the processing circuitry being connected at a point between the two resistances. The supply voltage may be derived (e.g. calculated or looked-up) by the processing circuitry using a divided voltage measured at the supply voltage measurement connection of the processing circuitry. The processing circuitry may comprise an Analog-to-Digital Converter ("ADC") for measuring the divided voltage at the supply voltage measurement connection.

In embodiments, the event signal input may comprise a serial signal input. The serial signal input may be used to provide serial event (open) signals to the processing circuitry. In embodiments, the processing circuitry may therefore comprise a serial event connection connected to the serial signal input for receiving serial event signals. The serial signal input may also or instead be used to configure and/or program the processing circuitry. In embodiments, the processing circuitry may therefore comprise a serial programming connection connected to the serial signal input for receiving programming signals.

The serial event connection and/or serial programming connection may operate on the basis of a predetermined logic level (e.g. 3.3V). In embodiments, there may be a resistance (e.g. 4k7 ohm) connected between a regulated voltage line that is at the predetermined logic level and the serial event connection and/or serial programming connection.

In embodiments, a diode arrangement (e.g. a diode pair) may be provided between the serial event connection and/or serial programming connection and the serial signal input in order to protect the processing circuitry from logic voltages which are higher than the predetermined logic level and which may be received at the serial signal input from some input devices.

In embodiments, if inverse logic is to be used at the serial signal input (e.g. for programming), the apparatus may comprise an inverter arrangement (e.g. a NOT gate) between the serial signal input and the serial event connection and/or between the serial signal input and the serial programming connection.

In embodiments, if a serial event signal is to be used as the event (open) signal, then the processing circuitry may compare a serial input code provided at the serial signal input - -

(received at the serial event connection) with a serial event code (e.g. a 2 byte code) stored in a memory of the processing circuitry. The processing circuitry may store the serial input code in memory, for example in a buffer, so as to perform the comparison. If the serial input code matches the serial event code stored in memory, then the processing circuitry may derive and provide the control signal to the output device. If the serial input code does not match the serial event code, then the processing circuitry may not derive and provide the control signal. In this event, the processing circuitry may also clear the serial input code from memory (the buffer), and/or wait for a further serial input code to be provided.

In embodiments, the event signal input may also or instead comprise a trigger signal input. The trigger signal input may be for providing trigger event signals to the processing circuitry. In embodiments, the processing circuitry may therefore comprise a trigger event connection connected to the trigger signal input for receiving trigger event signals.

In embodiments, the trigger signal input may comprise a positive trigger signal input and/or negative trigger signal input. As will be appreciated, a positive trigger signal will indicate an event by transitioning to a high logic state whereas a negative trigger signal will indicate an event by transitioning to a low logic state.

In embodiments, the processing circuitry may be configured to detect either a negative trigger signal or a positive trigger signal at the trigger event connection. The features below will be described with reference to embodiments in which the processing circuitry is configured to detect negative trigger signals at the trigger event connection, but these features can be modified and correspondingly applied to embodiments in which the processing circuitry is configured to detect positive trigger signals at the trigger event connection. The modification needed is shown in brackets following the feature to be modified in the format: (* ).

In embodiments having a positive (*negative) trigger signal input, the apparatus may comprise an inverter arrangement between the positive (*negative) trigger signal input and the trigger event connection. The inverter arrangement may comprise a transistor arrangement. The transistor arrangement may comprise a transistor having its collector and emitter connected between the trigger event connection and the ground line across a resistance (e.g. a resistor of 10k ohm), with the base of the transistor being biased with two resistances, one of the resistances (e.g. a resistor of 22k ohm) being connected to the positive (*negative) trigger signal input and the other of the resistances (e.g. a resistor of 10k ohm) being connected to the ground line.

In embodiments, if a trigger signal is to be used as the event signal, then the processing circuitry may determine if the voltage at the trigger event connection is below (*above) a trigger threshold value. If the voltage at the trigger event connection is below (*above) the trigger threshold value, then the processing circuitry may derive and provide the control signal to the output device. If the voltage at the trigger event connection is not below (*above) the trigger threshold value, then the processing circuitry may not derive and provide the control signal.

In some embodiments, if the voltage at the trigger event connection is below (*above) the trigger threshold value, the processing circuitry may first determine if the voltage at the trigger event connection is still below (*above) the trigger threshold value before deriving and providing the control signal to the output device. This further comparison may be done after a predetermined time delay (e.g. 50-100 ms, such as 20 ms). If the voltage at the trigger event connection is still below (*above) the trigger threshold value, then the processing - - circuitry may derive and provided the control signal. If the voltage at the trigger event connection is not still below (*above) the trigger threshold value, then the processing circuitry may not derive and provide the control signal. These embodiments are advantageous in that they allow spikes in the trigger event signal (e.g. caused by noise or interference) to be filtered out. It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In some embodiments, the processing circuitry may also measure the supply voltage at the supply voltage measurement connection after each trigger threshold value

comparison. If the difference between the respective voltages measured at the supply voltage measurement connection after the trigger threshold value comparisons is below a differential threshold value (e.g. equivalent to a 2V change in the supply voltage), then the processing circuitry may derive and provide the control signal. If the difference between the respective voltages is not below the differential threshold value, then the processing circuitry may not derive and provide the control signal. These embodiments are advantageous in that they can prevent the processing circuitry incorrectly interpreting a drop in the trigger event signal caused by powering down the input device as a genuine transitioning of the trigger event signal provided by the input device. It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In embodiments, the processing circuitry may be configured to respond to serial event signals and/or trigger event signals. In some of these embodiments, the processing circuitry may be configured to respond to serial event signals and trigger event signals, and may then be selectively reconfigured to respond only to serial event signals and/or to not respond to trigger event signals. This arrangement allows the processing circuitry to respond to both serial event signals and trigger event signals, but also allows the processing circuitry to later respond only to serial event signals, if desired, for example where it is later desired to prevent the output device operating in response to a trigger event signal that can be mimicked by a device other than an authorised input device (e.g. by a battery and switch). It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In embodiments, the processing circuitry may determine whether it is configured to respond to serial event signals and/or trigger event signals before determining if there has been an event signal.

As discussed above, responsive to an event signal, the processing circuitry determines the supply voltage, derives the control signal from the supply voltage based on the determined supply voltage, and provides the control signal to the output device. This may be done in the following way.

In embodiments, the control signal has a predetermined average voltage Va that is compatible with the output device. The predetermined average voltage Va may be known to the processing circuitry. The output device may be a drawer opening mechanism and/or may comprise a solenoid. The predetermined average voltage Va for an exemplary output device (e.g. a drawer opening mechanism and/or solenoid) is in the range 2V to 10V (e.g. is 6V or 3 V).

In embodiments, the processing circuitry is able to derive and provide the average voltage using the supply voltage Vs. In embodiments, the average voltage Va is derived and provided by the processing circuitry using pulse width modulation (PWM) of the supply - - voltage Vs. The control signal may therefore be a PWM signal. The frequency of the PWM signal may by 10 kHz.

In embodiments, the processing circuitry may determine the supply voltage Vs in the manner discussed above. The processing circuitry may then derive a duty cycle D for the PWM signal, such that D = k x Va/Vs, where k is a predetermined constant or variable that may be known to the processing circuitry. The value of D may be derived by the processing circuitry by calculation or by using a look-up table.

In embodiments, the control signal output may comprise two control signal output connections. The voltage supply line may be connected to a first one of the control signal output connections, and the ground line may be connected to a second one of the control signal output connections via a control signal switching arrangement. The processing circuitry may then selectively connect and disconnect the second control signal output connection to the ground line using the control signal switching arrangement, e.g. in accordance with the duty cycle D. In embodiments, the control signal switching arrangement may comprise a transistor arrangement (e.g. a Darlington pair) controlled by a control signal connection of the processing circuitry. The transistor arrangement may have a base resistance (e.g. a resistor of 1 k ohm). The control signal output may have a diode arrangement (e.g. a diode) across the control signal output connections.

In embodiments, the processing circuitry may provide the control signal for a first predetermined time period (e.g. 50 ms). In embodiments, the processing circuitry may then provide the control signal for a second (longer) predetermined time period (e.g. 150 ms). In preferred embodiments, k is higher (e.g. 1) for the first predetermined time period, then k is lower (e.g. 0.5) for the second predetermined time period. This is advantageous in that a higher average voltage Va (e.g. 6V) is provided for a shorter time to initiate an action to be performed (e.g. to initiate movement of a drawer opening mechanism), then a lower average voltage Va (e.g. 3V) is provided for a longer time to ensure the action completes (e.g. to ensure the drawer opening mechanism is held out of the way). It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In embodiments, once the control signal has been provided, the processing circuitry may determine whether the action has been performed successfully by the output device (e.g. whether the drawer has opened).

If the action has been performed successfully, then the processing circuitry may update and store a new state for the output device in memory and/or does not derive the control signal again until a next valid event signal.

If the action has not been performed successfully (e.g. due to a weight on the drawer), then the processing circuitry may increment an attempts counter. The processing circuitry may also determine whether the attempts counter is above an attempts threshold (e.g. 3). If the attempts counter is not above the attempts threshold, then the processing circuitry may measure the supply voltage, and then derive and provide the control signal again in the manner discussed above. In embodiments, there may be a predetermined time delay (e.g. 300-500 με) before the processing circuitry derives and provides the control signal again to allow time for the fault (e.g. weight) to be removed.

If the attempts counter is above the attempts threshold, then the processing circuitry may not derive and provide the control signal again until a next valid event signal. The - - processing circuitry may also transmit a serial error code to the input device and/or reset the attempts counter.

In embodiments, any subsequent event signals may only be considered valid if the event signal is no longer provided by the input device (e.g. the voltage at the trigger event connection goes back above (*below) the trigger threshold). Thus, if the action has been performed successfully, the processing circuitry may determine whether the voltage at the trigger event connection is above (*below) the trigger threshold value. If the voltage at the trigger event connection is above (*below) the trigger threshold value, then subsequent event signals may be deemed valid. If the voltage at the trigger event connection is not above (*below) the trigger threshold value, then the processing circuitry may again determine whether the voltage at the trigger event connection is above (*below) the trigger threshold value. This checking of voltage at the trigger event connection may be repeated until the voltage goes back above (*below) the trigger threshold value. This is advantageous in that it can prevent the control signal being repeatedly or continuously provided, for example in cases where an error in the input device causes the trigger event signal to be permanently applied. This in turn can prevent parts of the output device (e.g. a solenoid of a drawer opening mechanism) overheating. It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In embodiments, the apparatus may comprise device status input circuitry for determining the state of the output device.

For example, the processing circuitry may comprise a first state (e.g. a "drawer open" state) monitoring connection and a second state (e.g. "drawer closed" state) monitoring connection. The first state monitoring connection may be connected to the regulated voltage line via a pull-up resistance (e.g. a resistor of 4k7 ohm) and the second state monitoring connection may be connected to the regulated voltage line via a pull-up resistance (e.g. a resistor of 4k7 ohm).

The apparatus may also comprise a first state input connected to the first state monitoring connection of the processing circuitry and a second state input connected to the second state monitoring connection of the processing circuitry. The first and second state inputs may be connectable to a monitoring switch (e.g. a microswitch) for the output device.

The apparatus may also comprise a return output connected to the ground line. The return output may be selectively connectable to either the first state input or the second state input by the monitoring switch for the output device. As will be appreciated, the pull-up resistances mentioned above may act to limit the current through the monitoring switch.

The processing circuitry may determine the state of the output device in the following way.

When the return output is connected to the first state input by the monitoring switch for the output device, the first state monitoring connection is pulled to ground. The processing circuitry detects this by measuring the voltage at the first state monitoring connection. The processing circuitry then stores and latches the status of the output device as being in the first state. Should the return output be disconnected from the first state input by the monitoring switch for the output device, the first state monitoring connection is pulled- up. However, the processing circuitry ignores this since the monitoring switch may not actually have connected the return output to the second state input (e.g. the monitoring switch may merely have "bounced"). - -

When the return output is connected to the second state input by the monitoring switch for the output device, the second state monitoring connection is pulled to ground. The processing circuitry detects this by measuring the voltage at the second state monitoring connection. The processing circuitry then stores and latches the status of the output device as being in the second state. Should the return output be disconnected from the second state input by the monitoring switch for the output device, the second state monitoring connection is pulled-up. However, the processing circuitry again ignores this since the monitoring switch may not actually have connected the return output to the first state input (e.g. the switch contact may merely have "bounced").

The processing circuitry therefore may comprise a set-reset latch, i.e. the processing circuitry may only respond to a definite indication of the first state or the second state (rather than an indication of the absence of the first state or the second state). This can avoid the problem of "bounce" in a monitoring switch. It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In embodiments, the apparatus may also comprise device status output circuitry for indicating the state of the output device to the input device.

For example, the apparatus may comprise a first state output for providing a first status signal (e.g. a "drawer open" signal) to the input device. The first state output may be selectively connected to the ground line by the processing circuitry when the output device is determined to be in the second state (e.g. in the manner discussed above). The first state output may be selectively disconnected from the ground line by the processing circuitry when the output device is determined to be in the first state (e.g. in the manner discussed above). In this event, the first state output may be at a high logic voltage (e.g. either the regulated voltage or the supply voltage). The first state output may be connected to the high logic voltage via a pull-up resistance.

The processing circuitry may selectively connect/disconnect the first state output to/from the ground line using first state switching circuitry. The first state switching circuitry may comprise a transistor arrangement controlled by a first state output connection of the processing circuitry. The transistor arrangement may comprise a base resistance (e.g. a resistor of 3k3 ohm).

The first state output may be selectively connected to the supply voltage line (e.g. with a jumper), for example so as to provide the high logic level depending on the requirements of the input device. A lower pull-up resistance (e.g. a resistor of 3k3 ohm) may be provided between the first state output and the regulated voltage line and/or a higher pull- up resistance (e.g. a resistor of 15k ohm) may be provided between the first state output and the supply voltage line. A diode arrangement (e.g. a diode pair) may be provided to prevent current flowing to the regulated voltage line and/or to the supply voltage line.

Similarly, the apparatus may comprise a second state output for providing a second status signal (e.g. a "drawer closed" signal) to the input device. The second state output may be selectively connected to the ground line by the processing circuitry when the output device is determined to be in the first state (e.g. in the manner discussed above). The second state output may be selectively disconnected from the ground line by the processing circuitry when the output device is determined to be in the second state (e.g. in the manner discussed above). In this event, the second state output may be at a high logic voltage (e.g. - - either the regulated voltage or the supply voltage). The second state output may be connected to the high logic voltage via a pull-up resistance.

The processing circuitry may selectively connect/disconnect the second state output to/from the ground line using second state switching circuitry. The second state switching circuitry may comprise a transistor arrangement controlled by a second state output connection the processing circuitry. The transistor arrangement may comprise a base resistance (e.g. a resistor of 3k3 ohm).

The second state output may be selectively connected to the supply voltage line (e.g. with a jumper), for example so as to provide the high logic level depending on the

requirements of the input device. A lower pull-up resistance (e.g. a resistor of 3k3 ohm) may be provided between the second state output and the regulated voltage line and/or a higher pull-up resistance (e.g. a resistor of 15k ohm) may be provided between the second state output and the supply voltage line. A diode arrangement (e.g. diode pair) may be provided to prevent current flowing to the regulated voltage line and/or to the supply voltage line.

In embodiments, the processing circuitry may derive and provide the control signal to the output device regardless of the status of the output device. This can allow the action to performed by the output device even when the monitoring switch for output device the is broken.

In embodiments, the apparatus may also comprise a device present output and device present output circuitry for indicating to the input device that the output device is present. The device present output circuitry may comprise a resistance (e.g. two resistors (e.g. of 10k ohm) in parallel) connected between the device present output and the supply voltage line. In embodiments, the negative trigger signal input discussed above may also act as the device present output.

In embodiments, the apparatus may comprise power circuitry for deriving a regulated voltage from the supply voltage. The processing circuitry may be powered by the regulated voltage and/or use the regulated voltage as a high logic level. The apparatus may therefore comprise a regulated voltage line, and the processing circuitry may comprise a regulated voltage connection connected to the regulated voltage line and/or a high logic level connection connected to the regulated voltage line. The processing circuitry may also comprise a ground connection connected to the ground line and/or a low logic level connection connected to the ground line.

In embodiments, the power circuitry may comprise a voltage regulator having a regulator input connected to the supply voltage line and a regulator output connected to the regulated voltage line. The voltage regulator may also comprise a ground connection connected to the ground line.

In embodiments, the power circuitry may comprise a regulator resistance (e.g. two resistors (e.g. of 1 k8 ohm) in parallel) between the supply voltage line and the regulator input. In embodiments, the power circuitry may comprise power switch circuitry between the supply voltage line and the regulator input, the power switch circuitry selectively bypassing the regulator resistance. The power switch circuitry may be controlled by the processing circuitry based on the determined supply voltage. For example, when the supply voltage is above a regulator threshold voltage (e.g. 25 V) the power switch circuitry may be opened so that the resistance is not bypassed. This allows a voltage drop for a higher supply voltage to occur across the regulator resistance. However, when the supply voltage is below the regulator threshold voltage, the power switch circuitry may be closed so that the resistance - - is bypassed. This removes the voltage drop across the regulator resistance for a lower supply voltage. These embodiments are particularly advantageous in that they allow the range of the voltage regulator to be extended. It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In embodiments, the power circuitry may comprise a transistor arrangement controlled by a power control connection of the processing circuitry. For example, the transistor arrangement may comprise a first regulator transistor controlled by the processing circuitry, and a second regulator transistor selectively biased using the first regulator transistor. The first regulator transistor may have base resistance (e.g. of 3k3 ohm). The second regulator transistor may be selectively biased using two resistances (e.g. of 10k ohm and 22k ohm respectively).

In embodiments, the power circuitry may comprise a zener diode between the regulator input and the ground line. The zener diode may limit the voltage at the regulator input to a predetermined maximum (e.g. 27 V).

In embodiments, the power circuitry may comprise a smoothing capacitor (e.g.

100nF) between the regulator input and the ground line, and/or between the regulator output and the ground line, and/or between the regulated voltage connection of the processing circuitry and the ground line.

In embodiments, the processing circuitry may comprise one or more counters for counting events such as drawer openings, trigger signals, override openings (e.g. openings not responsive to event signals). The one or more counters may each comprise an n (e.g. 6) bit counter. The one or more counters may each store a count value in volatile memory and, when 2" events are counted a bit may be written out to non-volatile memory. This is advantageous in that the amount of non-volatile memory needed to count events can be reduced. It is therefore recognised that these features are advantageous in their own right, and not merely in the context of other features described herein.

In embodiments, the apparatus may comprise a serial signal output for providing information relating to events, for example to the input device or another external device. The processing circuitry may comprise a serial signal output connection connected to the serial signal output. If inverse logic is used, then the apparatus may comprise an inverter arrangement (e.g. a NOT gate) between the serial signal output and the serial signal output connection. There may also be a serial output resistance (e.g. of 1 k ohm) between the serial signal output and the serial signal output connection.

These embodiments are particularly advantageous when the apparatus forms part of a cash till drawer unit. For example, the counter values can be provided to an external device to facilitate the planning of maintenance for the cash till drawer unit. Providing this functionality within the drawer (rather than the EPOS system) also allows the information relating to a particular drawer to travel with that drawer (i.e. independently of any EPOS system). Indeed, it is believed that these features of the present invention are advantageous in their own right and not merely in the context of the above described features.

Thus, according to another aspect of the present invention there is provided a cash till drawer unit comprising:

a cash till drawer;

a cash till drawer opening mechanism for opening the cash till drawer;

a monitoring switch for monitoring the status of the cash till drawer; and - - an apparatus, the apparatus comprising processing circuitry configured to monitor and count cash till drawer events.

According to another aspect of the present invention there is provided a method of operating a cash till drawer unit, the cash till drawer unit comprising:

a cash till drawer;

a cash till drawer opening mechanism for opening the cash till drawer;

a monitoring switch for monitoring the status of the cash till drawer; and

an apparatus comprising processing circuitry;

the method comprising:

the processing circuitry monitoring and counting cash till drawer events.

In any of the above embodiments or aspects, the processing circuitry may comprise an integrated circuit preferably a programmable integrated circuit such as a microcontroller. In embodiments, the apparatus may comprise a circuit board (e.g. a PCB) on which above components are mounted.

In embodiments, the apparatus may comprise an input connector comprising one or more or all of: the supply voltage input, the serial signal input, the serial signal output, the first state output, the second state output, the positive trigger signal input, and the negative trigger signal input. The input connector may comprises a serial interface such as an RJ45 connector, an Ethernet connector, an RS232 connector, a USB connector, etc.. The inputs may also or instead be provided by a wireless interface such as a WiFi connection, a Bluetooth connection, a ZigBee connection etc.. The apparatus may comprise an interchangeable adaptor that can provide a connection between a given pair of the above interfaces.

In embodiments, the apparatus may comprise a first (e.g. drawer opening mechanism) output connector comprising the control signal output and/or a second (e.g. drawer status) output connector comprising the return output, the first state input and/or the second state input.

The apparatus may be part of cash till drawer unit. Thus, embodiments may comprise a cash till drawer unit comprising the apparatus. The cash till drawer unit may also comprise a cash till drawer, a drawer opening mechanism (e.g. comprising a solenoid) and/or a drawer status switch.

In embodiments, the cash till drawer unit may be part of a cash till. Thus, embodiments may comprise a cash till comprising the cash till drawer unit. The cash till may also include an EPOS system.

A number of preferred embodiments of the present invention will now be described by way of example only and with reference to the accompanying drawings, in which:

Figure 1 shows a circuit diagram for an apparatus that provides a control signal according to an embodiment of the present invention; and

Figure 2 shows a flow chart for providing a control signal according to an

embodiment of the present invention.

The present invention will be described in the context of a cash till drawer apparatus that provides an open signal to a drawer opening mechanism. The drawer opening mechanism comprises a solenoid that retracts a latch so as to open a till drawer. The solenoid retracts the latch in response to an open signal.

The various components of the cash till drawer apparatus will now be described with reference to Figure 1. - -

Figure 1 shows a circuit diagram for a cash till drawer apparatus 100 according to an embodiment of the present invention. The apparatus 100 is mounted in a cash till drawer unit which includes a cash drawer and a cash drawer opening mechanism such as a solenoid.

The apparatus 100 comprises processing circuitry U1/U2. The processing circuitry U1/U2 controls the operation of the apparatus 100. In this embodiment, the processing circuitry U1/U2 is a PIC microcontroller.

The apparatus 100 also comprises an RJ45 input connector 102. The input connector 102 connects the apparatus 100 to an EPOS system (not shown).

The input connector 102 comprises a supply voltage input (pins 6 and 7) for receiving a supply voltage from the EPOS system. The supply voltage input is connected to a supply voltage rail 104 of the apparatus 100 and a ground rail 106 of the apparatus 100. In this embodiment, the supply voltage of the connected EPOS system is 24V.

The processing circuitry U1/U2 comprises a supply voltage measurement connection (pin 3) connected to the supply voltage line 104. In this embodiment, measurement of the supply voltage is achieved by a voltage divider. The voltage divider comprises a first resistor R5 of 160k ohm and a second resistor R6 of 10k ohm in series between the supply voltage line 104 and the ground line 106. The supply voltage measurement connection is connected at a point between the first resistor R5 and the second resistor R6. The voltage at the supply voltage measurement connection is measured by an ADC of the processing circuitry U1/U2, and the supply voltage is then calculated by the processing circuitry U1/U2 using the voltage measured at the supply voltage measurement connection and knowledge of the resistor values for the first resistor R5 and the second resistor R6.

The input connector also comprises a serial signal input (pin 8) for receiving serial event signals from the EPOS system. The processing circuitry U1/U2 correspondingly comprises a serial event connection (pin 12) for receiving the serial event signals. The serial signal input can also be used to program the processing circuitry U1/U2 via a NOT gate U2.b. The processing circuitry U1/U2 correspondingly comprises a serial programming connection (pin 2) for receiving serial programming signals.

In this embodiment, the serial event connection and serial programming connection operate on the basis of a predetermined logic level that is at a regulated voltage of 3.3V. In this embodiment, there is a pull-up resistor R11 of 4k7 ohm connected between a regulated voltage line 108 that is at the regulated voltage and these serial connections. In this embodiment, a diode pair D1 is also provided between these serial connections and the serial signal input in order to protect the processing circuitry U1/U2 from logic voltages that are higher than the regulated voltage.

The input connector 102 also comprises trigger signal input in the form of a positive trigger event input (pin 5) that can receive positive trigger event signals from the EPOS system and a negative trigger event input (pin 2) that can receive negative trigger event signals from the EPOS system. The processing circuitry U1/U2 correspondingly comprises a trigger event connection (pin 7) connected to the trigger event inputs for receiving the trigger event signals. The processing circuitry U1/U2 detects trigger event signals at a point between a resistor R7 of 160k ohm and a resistor R8 of 10k ohm.

In this embodiment, the processing circuitry U1/U2 is configured to detect a negative trigger event signal at the trigger event connection. The negative trigger event input is connected to the trigger event connection via the resistor R7. The apparatus 100 also comprises an inverter arrangement between the positive trigger event input and the trigger - - event connection so that the processing circuitry U1/U2 can also detect a positive trigger event signal. The inverter arrangement comprises a transistor Q1 having its collector and emitter connected between the trigger event connection and the ground line 106 across the resistor R8, and having its base biased by a resistor R9 of 22k ohm and a resistor R10 of 10k ohm.

In this embodiment, the apparatus 100 also provides a drawer present signal to the EPOS system via the negative trigger signal input. The device present signal is a current provided via two resistors R1 and R2, each of 10k ohm, connected in parallel between the negative trigger event input and the supply voltage line 104.

The input connector 102 also comprises a serial signal output (pin 1) for providing information from the processing circuitry U1/U2 to the EPOS system or other external devices using inverted logic. The processing circuitry U1/U2 correspondingly comprises a serial signal output connection (pin 13) connected to the serial signal output via a NOT gate U2.a. A serial output resistor R23 of 1 k ohm is also provided.

The input connector 102 also comprises a drawer open state output (pin 3) for providing a drawer open signal to the EPOS system and a drawer closed state output (pin 4) for providing a drawer closed signal to the EPOS system.

When the drawer of the till is determined by the processing circuitry 100 to be open, the processing circuitry U1/U2 disconnects the drawer open state output from the ground line 106 using an open state output connection (pin 8) to control a transistor Q2 via a resistor R17 of 3k3 ohm, and connects the drawer closed state output to the ground line 106 using a closed state output connection (pin 10) to control a transistor Q3 via a resistor R16 of 3k3 ohm. This causes the drawer open state output to be at a high logic voltage and the drawer closed state output to be at ground. Similarly, when the drawer of the till is determined by the processing circuitry 100 to be closed, the processing circuitry U1/U2 disconnects the drawer closed state output from the ground line, and connects the drawer open state output to the ground line. This causes the drawer closed state output to be at a high logic voltage and the drawer open state output to be at ground.

In this embodiment, the high logic voltage can either be the regulated voltage or the supply voltage. In this embodiment, the regulated voltage is provided as the high logic voltage by pull-up resistors R12 and R13 of 3k3 ohm or, if a jumper J1 is in place, the supply voltage is provided as the high logic voltage by pull-up resistors R14 and R15 of 15k ohm. Diode pairs D2 and D3 are also provided to prevent current flowing to the regulated voltage line and to the supply voltage line.

The apparatus 100 also comprises a control signal output connector CN2. The control signal output connector CN2 connects the apparatus 100 to the solenoid of the drawer opening mechanism (not shown) so as to provide a drawer control signal. In this embodiment, the control signal output connector CN2 comprises two control signal output connections (pins 1 and 2). The control signal output has a protection diode D4 across the control signal output connections.

The voltage supply line 104 is connected to a first one of the control signal output connections and the ground line 106 is connected to a second one of the control signal output connections via a Darlington pair Q6. The processing circuitry U1/U2 selectively connects and disconnects the second control signal output connection to the ground line 106 using a control signal connection (pin 11). The control signal connection switches the - -

Darlington pair Q6 so as to produce a PWM signal at the control signal output connector CN2. The Darlington pair Q6 has a base resistor R19 of 1 k ohm.

The apparatus 100 also comprises a drawer status output connector CN1 for determining the open/closed state of the drawer. The drawer status output connector CN 1 connects the apparatus 100 to a microswitch of the drawer (not shown). The drawer status output connector CN1 comprises a return output (pin 1), a drawer open input (pin 2), and a drawer closed input (pin 3). The return output is connected to the ground line 106 of the apparatus 100. When the drawer is open, the drawer open input is connected to the return output (i.e. to ground). When the drawer is closed, the drawer closed input is connected to the return output (i.e. to ground).

The processing circuitry U1/U2 comprises a drawer open monitoring connection (pin 6) and a drawer closed monitoring connection (pin 5). The drawer open monitoring connection and drawer closed monitoring connection are respectively connected to the regulated voltage line 108 via pull-up resistors R3 and R4 of 4k7 ohm.

The processing circuitry U1/U2 detects when the drawer is open by measuring the voltage at the drawer open monitoring connection. When the drawer is open, the processing circuitry U1/U2 stores and latches the status of the drawer as being open. Should the return output then be slightly disconnected from the drawer open input by the microswitch, the drawer open monitoring connection is pulled-up to the regulated voltage by the resistor R3. However, the processing circuitry U1/U2 ignores this since the microswitch may merely have "bounced".

Similarly, the processing circuitry U1/U2 detects when the drawer is closed by measuring the voltage at the drawer closed monitoring connection. When the drawer is closed, the processing circuitry U1/U2 stores and latches the status of the drawer as being closed. Should the return output then be slightly disconnected from the drawer closed input by the microswitch, the drawer closed monitoring connection is pulled-up to the regulated voltage by the resistor R4. However, the processing circuitry U1/U2 again ignores this since the microswitch may merely have "bounced".

Thus, the processing circuitry U1/U2 only latches the state of the drawer when a positive connection to the return output is made. As discussed above, the status of the drawer is then relayed to the EPOS system via the drawer open state output and the drawer closed state output of the input connector 102.

The apparatus 100 also comprises power circuitry for deriving a regulated voltage of 3.3V from the supply voltage. The regulated voltage is provided to regulated voltage line 108, and the processing circuitry U1/U2 comprises a regulated voltage connection (pin 5) connected to the regulated voltage line 108. The processing circuitry U1/U2 also comprises a ground connection (pin 2) connected to the ground line 106. A capacitor C3 of 100 nF is provided across these connections.

The processing circuitry also comprises a high logic level connection (pin 1) connected to the regulated voltage line 108 and a low logic level connection (pin 4) connected to the ground line 106.

In this embodiment, the power circuitry comprises a voltage regulator IC1 having a regulator input (pin 3) connected to the supply voltage line 104 and a regulator output (pin 1) connected to the regulated voltage line 108. The voltage regulator IC1 also comprises a ground connection (pin 2) connected to the ground line 106. The power circuitry also - - comprises capacitors C1 and C2, each of 100 nF, respectively between the regulator input and the ground line and between the regulator output and the ground line.

In this embodiment, the power circuitry also comprises two resistors R21 and R22 of 1 k8 ohm in parallel between the supply voltage line 108 and the regulator input that can be selectively bypassed by the processing circuitry U1/U2 on the basis of the determined supply voltage.

In this embodiment, when the supply voltage is above a regulator threshold voltage of 25 V, a transistor Q5 is switched off so that the resistors R21 and R22 are not bypassed. This allows a voltage drop to occur across the resistors R21 and R22. However, when the supply voltage is below the regulator threshold voltage of 25V, the transistor Q5 is switched on so that the resistors R21 and R22 are bypassed. This removes the voltage drop across the resistors R21 and R22. This extends the range of the voltage regulator IC1.

In this embodiment, the transistor Q5 is controlled by a transistor Q4 that is switched by the processing circuitry U1/U2. The transistor Q4 has a base resistor R18 of 3k3 ohm, and the transistor Q5 is selectively biased by Q4 using a resistor R20 of 10k ohm and a resistor R24 of 22k ohm. In this embodiment, the power circuitry also comprises a zener diode ZD1 between the regulator input and the ground line 106 that limits the voltage at the regulator input to a maximum voltage of 27 V.

Operation of the cash till drawer apparatus 100 of Figure 1 will now be described with reference to Figure 2.

Figure 2 shows a flow chart 200 of the operation of the cash till drawer apparatus 100 according to an embodiment of the present invention.

Operation of the apparatus starts at step 202. In this step, the processing circuitry U1/U2 monitors and relays the status of the cash till drawer to the EPOS system in the manner discussed above. The processing circuitry U1/U2 also waits for an event signal at the trigger event connection and the serial event connection.

In step 204, the processing circuitry U1/U2 measures the voltage at the trigger event connection, and reads any serial input codes received at the serial event connection into an input buffer.

In step 206, the processing circuitry U1/U2 compares a serial input received at the serial event connection with a 2 byte serial event code stored in a memory of the processing circuitry U1/U2. If the serial input code provided matches the serial event code stored in memory, then the processing circuitry proceeds to step 224. If the serial input code does not match the serial event code, then the processing circuitry U1/U2 proceeds to step 208. In step 208, the processing circuitry U1/U2 clears the serial input code from the input buffer and then returns to step 202.

In step 210, the processing circuitry U1/U2 compares the voltage at the trigger event connection to a trigger threshold value. If the voltage is below the trigger threshold value there may be a trigger event and the processing circuitry U1/U2 proceeds to step 212. If the voltage is not below the trigger threshold value there is no trigger event and the processing circuitry returns to step 202.

In step 212, the processing circuitry U1/U2 determines the voltage of the supply voltage in the manner discussed above and stores the voltage as a 1st supply voltage sample. The processing circuitry U1/U2 then proceeds to step 214. In step 214, the processing circuitry U1/U2 waits 20 ms before proceeding to step 216. - -

In step 216, the processing circuitry U1/U2 again measures the voltage at the trigger event connection, and then proceeds to step 218. At step 218, the processing circuitry U1/U2 again compares the voltage at the trigger event connection to the trigger threshold value. If the voltage is still below the trigger threshold value then there may be a trigger event and the processing circuitry U1/U2 proceeds to step 220. If the voltage is not still below the trigger threshold value then there is no trigger event and the processing circuitry returns to step 202. This checking of the trigger event signal allows short duration spikes in the trigger signal (e.g. caused by noise or interference) to be filtered out.

In step 220, the processing circuitry U1/U2 again determines the voltage of the supply voltage in the manner discussed above, but this time stores the voltage as a 2nd supply voltage sample. The processing circuitry U1/U2 then determines the difference between the 2nd and 1st supply voltages before proceeding to step 222. In step 222, the processing circuitry U1/U2 determines if the difference between the 2nd and 1 st supply voltages is greater than a differential threshold value (equivalent to a 2V change in the supply voltage). If the difference is less than the differential threshold value then there may be a trigger event and the processing circuitry proceeds to step 224. If the difference is greater than the differential threshold value then there is considered to be no trigger event and the processing circuitry returns to step 202. This checking of the supply voltage prevents the apparatus 100 incorrectly interpreting a drop in the trigger signal caused by powering down the EPOS as a genuine transitioning of the trigger signal.

In step 224, the processing circuitry U1/U2 again determines the voltage (Vs) of the supply voltage in the manner discussed above, before proceeding to step 226. In step 226, the processing circuitry U1/U2 calculates a duty cycle D for a PWM signal, such that D = k x Va/Vs. In this embodiment, the nominal average voltage (Va) for the solenoid is 6V. In this embodiment, Vs is 24V and so D is 0.25 when k=1. In this embodiment, the frequency of the PWM signal is 10 KHz. The processing circuitry U1/U2 then proceeds to step 228.

In step 228, the processing circuitry U1/U2 switches the Darlington pair Q6 in accordance with the duty cycle D with k=1 , so as to provide a relatively higher control signal to the solenoid for relatively shorter time of 50 ms to move the solenoid. The processing circuitry U1/U2 then proceeds to step 230.

In step 230, the processing circuitry U1/U2 then switches the Darlington pair Q6 in accordance with the duty cycle D but with k=0.5, so as to provide a relatively lower control signal to the solenoid for relatively longer time of 150 ms. This holds the solenoid out of the way while the drawer opens. The processing circuitry U1/U2 then proceeds to steps 232 and 234.

In steps 232 and 234, the processing circuitry U1/U2 determines if the drawer has opened. If the drawer has not opened, then the processing circuitry U1/U2 proceeds to step 236. In step 236, the processing circuitry U1/U2 increments an attempts counter before proceeding to step 238. In step 238, the processing circuitry U1/U2 determines if the attempts counter is above a threshold of 3 attempts.

If the attempts counter is not above the threshold, the processing circuitry U1/U2 returns to step 224, and so attempts to open the drawer again. It should be noted that the supply voltage is read again before applying the control signal. This means that the average voltage of the control signal can remain the same even if the supply voltage has changed since the last application of the control signal. - -

If the attempts counter is not above the threshold, the processing circuitry U1/U2 proceeds to step 240. In step 240, the processing circuitry U1/U2 transmits an error code to the EPOS system via the serial signal output. The processing circuitry U1/U2 then proceeds to step 246.

If the drawer has opened, then the processing circuitry U1/U2 proceeds to step 242.

In step 242, the processing circuitry U1/U2 latches the state of the drawer as being open and transmits a drawer open code to the EPOS system via the serial signal output. The processing circuitry U1/U2 then proceeds to steps 244 and 246.

In step 246, the processing circuitry U1/U2 determines if the trigger event signal is now above the trigger threshold value (i.e. there is no longer a signal indicating that the drawer should be opened). If the trigger event signal is still below the trigger threshold value, then the processing circuitry U 1/U2 loops back around to step 244. The processing circuitry U1/U2 will remain in this loop until the trigger event signal goes above the trigger threshold value. This can prevent the control signal being repeatedly or continuously provided where an error in the EPOS system causes the event trigger signal to be permanently applied. This in turn can prevent the solenoid of the drawer opening mechanism overheating.

Once the trigger event signal is above the trigger threshold value, then the processing circuitry U1/U2 returns to step 202 to wait for further trigger events.

In this embodiment, the processing circuitry also comprises counters for counting drawer openings, trigger signals, and override openings (e.g. openings not responsive to event signals). The one or more counters each comprise a 6 bit counter in volatile memory. When 2 ⁶ (i.e. 64) events are counted, a bit is written out to non-volatile memory. This approach reduces the amount of non-volatile memory needed to count events. The counter values can be provided to the EPOS system or another external device via the serial output connection, and then used to plan maintenance for the till drawer unit.

As will be appreciated from the above, the present invention in its preferred embodiments at least can allow a cash till drawer unit to be used with a variety of different EPOS systems. This is achieved in the preferred embodiments of the present invention at least by determining the supply voltage of the EPOS system before the supply voltage is used to derive a control signal for the drawer opening mechanism of the cash till drawer unit.