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Patent Searching and Data


Title:
CATHODE PANEL PROCESSING METHOD, COLD-CATHODE FIELD ELECTRON EMISSION DISPLAY, AND ITS MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2005/117055
Kind Code:
A1
Abstract:
A cathode panel processing method for manufacturing a cathode panel in which any electron emission region recognized as a bright spot is not present even if the darkest display is carried out by the whole cold-cathode field electron emission display. In the method for processing a cathode panel (CP) where electron emission regions are arranged in a two-dimensional matrix so as to manufacture a cold-cathode field electron emission display in which the inside pressure is set to a predetermined pressure value P 0, (A) the cathode panel (CP) is placed in a processing chamber (100) in which the pressure is set to a predetermined pressure value P1 (where P1>P0, preferably P1»P0) and (B) electrons are emitted from all the electron emission regions by applying an inspection voltage (VINS) to all the electron emission regions to cause electric discharge in electron emission regions emitting electrons the amount of which is larger than that of the other electron emission regions.

Inventors:
NEGISHI EISUKE
Application Number:
PCT/JP2005/009210
Publication Date:
December 08, 2005
Filing Date:
May 13, 2005
Export Citation:
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Assignee:
SONY CORP (JP)
NEGISHI EISUKE
International Classes:
H01J9/02; H01J9/42; H01J31/12; (IPC1-7): H01J9/02; H01J31/12
Foreign References:
JP2002175756A2002-06-21
JPH09237571A1997-09-09
JP2003151456A2003-05-23
Attorney, Agent or Firm:
Nakamura, Tomoyuki c/o Miyoshi International Patent Office (Toranomon Kotohira Tower 2-8, Toranomon 1-chome, Minato-k, Tokyo 01, JP)
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