In a DSSS cellular telephony system, the base stations identify themselves by transmitting pilot signals. Each pilot signal is a sequence of zero bits, modulated, according to the principles of DSSS encoding, by a pseudonoise (PN) sequence, or an extended pseudonoise sequence.

For example, under the IS-95 interim standard, the PN sequence is 215 chips long. with the n-th chip including an in-phase component i (n) and a quadrature component q (n). The initial values of i and q are i(1)=q(1)=1 and i(n)=q(n)=0 for 2/15. Subsequent values of i and q, up to n=21'-l, are obtained recursively as follows: i (n) = a (n-15) + i (n-10) + i (n-8) + i (n-7) + i (n-6) + i (n-2) (1) q (n) = q (n-15) + q (n-12) + q (n-l 1) + q (n-10) + q (n-9) + q (n-5) + q(n-4) +-3)(2) where the additions are modulo 2. Finally, i(215)=q(215)=0.

The same PN sequence is used by each of the base stations. The base stations are synchronized; and each base station uses the PN sequence with a different delay (also called"PN offset") to produce the pilot signal. This enables the mobile units of the cellular telephony network to distinguish one base station from another.

The total signal received by a mobile station. as a function of time í. is: l AA1,, RX(/)=C(b,m, t) PN (/+offset (b) +r (h, M)) Ll+Ea D (i, l"í) W (i, b) +N mn nm=i (3) Here./7 indexes the B base stations ; m indexes the MI, transmission paths (multipath channels) from base station b to the mobile station; C is the channel gain of multipath channel m; r is the additional delay introduced to the PN sequence by multipath channel m : the"1"inside the brackets represents the sequence of zeros that is

modulated by the base stations to produce the pilot signals:/indexes the 7/, other users that are transmitting via base station b at time t; a is the power of user i relative to the pilot signal; D is the data transmitted by user i : W is a code sequence (for example, a Hadamard code sequence) that is used in addition to the PN sequence to modulate data D and allow simultaneous transmission on the same physical channel by all the users in addition to the pilot signals; and N is additive noise.

Each mobile unit of the cellular telephony network determines which base station to communicate with (typically, the nearest base station) by correlating this signal with the PN sequence at a set of trial delays. Because data D are modulated by sequences W, the correlation of the part of the signal that comes from other users is negligible. The correlation with the pilot signals also is negligible. except at trial delays that are equal to the PN offsets used by the base stations, as modified by multipath delays T. Specifically, a pilot signal that arrives at a delay, that is equal to the sum of a base station offset and one of the multipath delays r associated with transmissions from that base station, gives a significant contribution to the correlation at a matching trial delay; and all other pilot signals contribute negligibly to the correlation at that trial delay. This correlating is performed when the mobile station powers up, and continuously thereafter, to allow handover fi-om one base station to another when the mobile station crosses a cell boundary. The delays of the various base stations are well separated, by more than the largest anticipated multipath delay, so in the absence of additive noise and in the absence of multipath delays, only a small number of correlations, equal to the number of potential nearest base stations, would have to be performed, to identify the base station whose delay gives the highest correlation as the nearest base station.. According to the IS-95 standard, this separation is at least 256 chip durations Tc. Because the pilot signals and data D are received by the mobile station from each base station via several paths at different delays (PN offset + r). the various replicas of the signals thus received are combined to suppress the deterministic noise represented by the various multipath delays T. For example, maximal ratio combining is the optimal combination method in a bit error rate and frame error rate sense. In order to do this combining, the multipath delays must be determined. Therefore, the correlation is performed at a series of delays in a

window centered on the nominal delay. The size of this window depends on the local topography, and is provided to the mobile unit by the base station. One typical window size. according to the IS-95 standard, is 60 chip durations.

Figure 3 is a schematic block diagram of a mobile station receiver 30. RF signals are received by an antenna 60, downconverted to an intermediate frequency (IF) by a downconverter 62, filtered by a bandpass filter 64 (typically a surface acoustic wave filter) to eliminate signals outside the required bandwidth. and amplified by an automatic gain control 66. The amplified IF signals are multiplied by an IF sinusoid 65, without (block 68i) and with (block 68q) a 90° phase shift 67, to produce an in-phase signal I and a quadrature signal Q. In-phase signal I is filtered by -pass filter 70i and digitized by an A/D converter 72i. Similarly. quadrature signal Q is filtered by a low-pass filter 70q and digitized by an A/D converter 72q. A searcher 80 receives the digitized signals and performs the correlations needed to determine the various multipath delays i inside the target window. The digitized signals are again correlated, at the delays determined by searcher 80, by the correlators of a correlator bank 74, and the outputs of correlator bank 74 are combined, in a maximal ratio sense, in a rake combiner 76 to produce the final output signal.

In order to ensure uninterrupted communication as a mobile station crosses from one cell to another, the correlations performed by searcher 80 must be performed rapidly. In fact, it is not necessary to perform the full correlation at each delay in the window. It suffices to perform a correlation that is only long enough to ensure a high detection probability at the right delay and a low false alarm probability at the wrong delay. Typically, the length of the correlation, measured as a multiple N of the chip duration Tc. is between 500TC and 2000T.

To make the correlations even more efficient, the dual dwell algorithm is used.

At each delay in the window, the correlation is performed for a number M of chip durations that is less than N. Only if the correlation value after M chip durations exceeds a certain threshold is the correlation performed for the full N chip durations.

The threshold, and the parameters N and M. are chosen to maximize the detection probability while minimizing both the false alarm probability and the time spent correlating. See, for example, M. K. Simon, J. K. Omura. R. A. Scholtz and B. K.

Levitt. Spread Spectrum Communication,'ol. Jll. Computer Science Press, 1989. chapter 1, particularly section 1. 3, and D. M. Dicarlo and C. L. Weber."Multiple dwell serial search: performance and application to direct sequence code acquisition", IEEE Transactions on Communication. s vol. COM-31 no. 5 pp. 650-659. May 1983.

In the prior art implementation of this algorithm, several correlators are used by searcher 80 to correlate the received pilot signal with the PN sequence at several adjacent delays in the window. If none of the correlation values exceeds the threshold after A4 chip durations, then the correlators are used to correlate the received pilot signal with the PN sequence at the next several adjacent delays. If at least one of the correlation values exceeds the threshold after M chip durations. then all the correlations are continued for the full N chip durations, but only the correlation values obtained by the correlators whose correlation values exceeded the threshold after the initial A4 chip durations are actually considered. The brute force approach to reducing search time, adding more correlators, is inefficient, because the more correlators that are used, the more likely it is that one of the correlators passes the threshold. In that case. the other correlators, which did not pass the threshold, continue to correlate unnecessarily for the full N chip durations.

There is thus a widely recognized need for. and it would be highly advantageous to have, a configuration for a cellular telephony searcher that would allow the efficient use of many correlators.

SUMMARY OF THE INVENTION According to the present invention there is provided a cellular telephony searcher, comprising: (a) a plurality of correlators for correlating a received signal with a pseudonoise sequence; (b) an input mechanism for inputting the pseudonoise sequence into the correlators. each of the correlators receiving the pseudonoise sequence with a different delay; and (c) a delay management mechanism for initializing the delays and subsequently changing the delays. the changing being contingent, for each correlator, only on an output of the correlator.

According to the present invention there is provided. in a cellular telephony network including at least one base station and at least one mobile station, each of the

at least one mobile station receiving a received signal from the at least one base station. the received signal including a plurality of received values. each received value having a real part and an imaginary part, a method for each of the at least one mobile station to identify at least one multipath channel to use to communicate with one of the at least one base station, including the steps of : (a) generating a pseudonoise sequence; (b) simultaneously performing a plurality of initial correlations of the received signal with the pseudonoise sequence, each of the initial correlations being performed with a different initial delay of the pseudonoise sequence, the initial correlations being performed for a first dwell time to produce, for each of the initial correlations, an initial first dwell time correlation value : and (c) for each initial correlation: (i) if an estimated absolute value of the initial first dwell time correlation value exceeds a threshold, continuing to perform the each initial correlation, (ii) otherwise, performing a first subsequent correlation of the received signal with the pseudonoise sequence at a first subsequent delay different from any of the initial delays : wherein, if the performing of at least one of the initial correlations is continued and if at least one of the first subsequent correlations is performed. the continued performing of the at least one initial correlation and the performing of the at least one first subsequent correlation are effected simultaneously.

Although the examples presented herein are of a cellular telephony system according to the IS-95 standard, it is to be understood that the principles of the present invention apply to any DSSS cellular telephony system. In addition, although the examples presented herein are directed at an implementation of a dual dwell algorithm, it will be clear to those skilled in the art how to apply the present invention to the implementation of a multiple dwell algorithm.

In the most general form of the present invention, the correlators correlate the received signal with the pseudonoise sequence at different trial delays. as initialized and changed periodically by the delay management mechanism. A correlator that succeeds in producing an output of sufficiently high absolute value is kept at its trial delay: a correlator that fails to produce an output of sufficiently high absolute value is moved to a different trial delay. The amount by which trial delays are changed depends on the outputs of all the correlators collectively ; but the decision whether to

change the trial delay of a specific correlator depends only on the output of that correlator, independent of the outputs of the other correlators. It is in this sense that the changing of a trial delay of a correlator is contingent only on the output of that correlator. This distinguishes the present invention from the prior art, in which all correlators are moved to new delays, or are not moved to new delays, in lock step.

More specifically, in the application of the present invention to multiple dwell algorithms generally, and to a dual dwell algorithm in particular, according to the present invention, if a correlator produces, after M chip durations, a correlation value that is less than the threshold, that correlator is assigned to a new delay in the window, and the correlation is repeated at the new delay, using this correlator, for another M chip durations. In this way. all the correlators are kept busy almost all the time.

Because of the more efficient use of the correlators according to the present invention, as compared with the relative inefficient use of the correlators according to the prior art implementation of the dual dwell algorithm, the tradeoff between speed and efficient hardware utilization under the present invention allows the use of eight or more correlators, with the consequent increase in throughput v. s. the prior art implementation.

For efficient implementation, N is made an integral multiple of M, typically AAI. The time MT, is referred to herein as the"first dwell time". The time (N-AII) is referred to herein as the'second dwell time".

To allow this dynamic reassignment of correlators, a device of the present invention feeds the PN sequence from a PN sequence generator into a delay line. The delay line feeds multiple copies of the PN sequence, each copy at a different delay relative to the PN generator, to a multiplexer. Each correlator is provided with an index register, wherein is stored an index representative of the delay to which that correlator is assigned at any given time. The multiplexer reads the value stored in the index register and forwards the corresponding copy of the PN sequence to the correlator associated with that index register.

Each correlator has its own memory, each memory with a certain number R of registers. Periodically, after y<R first dwell times. i. e., after yM chip durations, an interrupt is generated and correlator outputs are read by system software. Correlator

outputs that have been accumulated for a full At chip durations are used subsequently by system software to identify the strongest multipath components of the signals received from the neighboring base stations.

13RIEF DESCRIPTION OF THE DRAWINGS The invention is herein described, by way of example only. with reference to the accompanying drawings, wherein: FIG. 1 is a partial block diagram of a searcher of the present invention: FIG. 2 is a flow chart for the decision of whether to move a correlator to a new delay: FIG. 3 (prior art) is a schematic block diagram of the receiver of a cellular telephony mobile unit.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention is of a cellular telephony searcher which can be used by a mobile station to identify the several strongest multipath components of nearby base stations faster than presently known searchers.

The principles and operation of a cellular telephony searcher according to the present invention may be better understood with reference to the drawings and the accompanying description.

Referring now to the drawings, Figure 1 is a partial block diagram of a searcher 10 of the present invention. Searcher 10 includes a PN sequence generator 12. a delay line 14 that in turn includes several complex delay units 16, a multiplexer 18. several correlators 20, a hold unit 26 and a next location unit 28. With each correlator 20 is associated an index register 22 and a memory 24. Memory 24 includes several complex registers and several corresponding integer registers, as discussed below. For illustrational simplicity. only two correlators 20 are shown, and only six delay units 16 are shown in delay line 14. In practice, the preferred number of correlators 20 is at least 8. The preferred number of delay units 16 is discussed below.

Also shown in Figure 1 is a receiver 30 and a clock 32.

Block 30 of Figure 1 represents prior art receiver 30 of Figure 3. except for searcher 80; and. in fact, according to the present invention. searcher 10 substitutes directly for searcher 80 in receiver 30 of Figure 3. The calculation performed by each correlator 20 is \\There the RXt are successive values of the received signal of equation (3) the PNA are successive values of the PN sequence received by correlator 20 from PN sequence generator 12. and the summation index k runs from I to an upper limit h'. The received signal is not necessarily sampled at the same rate as the PN sequence. In the examples presented herein, new samples Rua are provided to correlators 20 by A/D converters 72 at time intervals of Toc. 12. The parameter v represents the time at which the correlation performed by a particular correlator 20 starts. The parameter y represents the delay at which the correlation is performed, relative to the time at which the correlation starts. The samples RXA and PNA are complex. and the asterisk represents complex conjugation: PNA is the complex conjugate of PUNA. For example, in a searcher 10 with four correlators, the correlation performed initially by the first correlator 20 is: RX(0)PN(0)+RX(Tc)PN(Tc)+RX(2Tc)PN(2Tc)+RX(3Tc)PN(3Tc)+...S= (5) the correlation performed initially by the second correlator 20 is: RX(Tc/2)PN(0)+RX(3Tc/2)PN(Tc)+RX(5Tc/2)PN(2Tc)S= +...(6)+RX(7Tc/2)PN(3Tc) the correlation performed initially by the third correlator 20 is: RX(Tc)PN(0)+RX(2Tc)PN(Tc)+RX(3Tc)PN(2Tc)S= +RX (4T6) PN (3T6) + (7) and the correlation performed initially by the fourth correlator 20 is: SS= RX(5Tc/2)PN(Tc)+RX(7Tc/2)PN(2Tc)+ + ...(8)+ (In equations (5)- (8), RX and PN are shown as functions of time, rather than as sampled values.) Note that correlators 20 do not all start correlating at the same time.

In this example, the first correlator 20 starts correlating at time t=0 ; the second correlator 20 starts correlating at time t=Tc/2; the third correlator 20 starts correlating at time t=Tc ; and the fourth correlator 20 starts correlating at time t=3T,. l2. Note also that. in this example at least, each correlator 20 receives the PN sequence with a delay corresponding to the time at which that correlator 20 starts its calculation. After M chip durations T (A=M), SK=SA. 1 is first dwell correlation value. After N chip durations Tc (K=N), SK=SN is the second dwell correlation value.

Similarly, clock 32 is not part of searcher 10, but is the system clock of the mobile station of which searcher 10 is a high level component. Clock 32 drives PN sequence generator 12 under the control of hold unit 26. as described below.

PN sequence generator 12 produces a new value 'A'/.everychipduration7",.

Each new term in the right hand side of equation (4) also is computed by each correlator 20 once every T.. In any particular T, interval. all correlators 20 receive from A/D converters 72 one of two different values RXk but each correlator 20 receives from PN sequence generator 12, via delay line 14 and multiplexer 18, a different value PNk, depending on the value of an index stored in index register 22 associated with that correlator 20.

Conceptually, once every T, interval. each correlator 20 performs the multiplication RXkPNt and adds the complex product thus obtained to a correlation value stored in one of the complex registers in memory 24 associated with that correlator 20. Because the possible values of the PNA samples are either +1 or-1 there is no need to actually perform multiplications. Instead, only additions or subtractions of the in-phase and quadrature components of RXA are actually performed. This allows a significant reduction in the complexity and electrical current consumption of searcher 10.

For example, let A=Re (RXk) +Im (RX'A) and let B=Re(RXk)-Im(RXk). If Im(PNk)=1,thenRe(RXkPNk*)=AandIm(RXkPNk*)=-B.IfRe(PNk)=1Re(P Nk)=1and and Im (PN*) =-l, then Re (RXkPNk*)=B and Im (RXkPNK*)=A. If Re (PNA) =-1 and lm (PNk)=1, then Re (RXkPNk =-B and Im (RXkPNk*)=-A. If Re (PN ») =-l and lm (PNk) =-l, then Re (RXkPNk*)=-A and Im (RXkPNk*)=B. Instead of transferring RX4, directly from receiver 30 to correlators 20. RXk is sent to an arithmetic unit (not

shown) that computes A and B and sends A and B to the appropriate correlators 20.

Each correlator 20 then adds A or B to the real part and the imaginary part of the correlation value, depending on the signs of the values of Re (PNA) and Im (PN ») concurrently provided by multiplexer 18 to that correlator 20.

Another method of avoiding actual multiplications exploits the fact that only the absolute values of the correlation values S are actually needed, to further reduce the number of calculations and achieve a further reduction in electrical current consumption by searcher 10. If the complex PN sequence of every correlator 20 is rotated 45°, then either the real part or the imaginary part of every PNA sample is equal to zero. Each correlator 20 then adds either Re (rua.) or #Im (RXk) to the real part or the imaginary part of S, depending on the sign of the non-zero component of 7W/.. without the intervention of the arithmetic unit. The rotation as described implicitly divides the complex PN sequence by the square root of 2. If only the relative values of S' are required, then the system software uses these values of S as produced by correlators 20. If the absolute values of S are needed. then the system software normalizes the values of S that it obtains from searcher 10 by multiplying those values bv the square root of 2.

Each delay unit 16 receives the PN sequence, either directly from PN sequence generator 12 in the case of the first (leftmost) delay unit 16, or from the immediately preceding delay unit 16. Each delay unit passes the PN sequence, with a fixed delay D. to multiplexer 18 and (except for the last (rightmost) delay unit 16) to the next delay unit 16. PN sequence generator 12 also passes the PN sequence directly to multiplexer 18. Thus, if there are Nf, delay units 16 in delay line 14. multiplexer 18 receives Nn+1 copies of the PN sequence, with mutual relative delays D. The size of D. and the sampling rate at which KXk samples are provided to correlators 20, are selected to give searcher 10 the required time resolution. In the example of equations (5)- (8). in which the sampling rate of RX4. is (TC/2)-I. the time resolution of searcher 10 is T,./2.

Searcher 10 functions under the overall control of the system software to search for the delays, in all the relevant windows, that give correlation values that are siglllificantly meaningful (i. e., above background noise) to be useful in identifying the

string neighboring base stations and in demodulating the signals received from these base stations. For each window, the search process is initialized by setting the delay of PN sequence generator 12 to the first (earliest) delay in the window, by setting the indices stored in index registers 22 to values corresponding to the first L delays in the window (Z, being the number of correlators 20), and by zeroing the complex registers of memories 24. Subsequently, hold unit 26 delays PN sequence generator 12 further. as described below. In all cases, hold unit 26 delays PN sequence generator 12 by blocking timing signals from clock 32.

Whenever a correlator 20 finishes a correlation over M chip intervals, next location unit 28 decides whether that correlator 20 should continue correlating at its current delay or should move to the next delay. Figure 2 is a flow chart of this decision. If K=M (block 40), correlator 20 has finished the first dwell correlation, so the absolute value of is compared to the first dwell threshold (block 42). If ISA, ll is less than or equal to the first dwell threshold, the correlation at the current delay has failed, so correlator 20 is moved to the next delay that needs to be tested (block 48). If exceeds the first dwell threshold. then correlator 20 stays at the current delay (block 46) and continues the summation of equation (4) until N terms RSVABNK have been summed. If K>M (block 40), then, in the genera) case of A>2M, either correlator 20 is in the middle of computing the second dwell correlation value-S'v(A'<jV) or correlator 20 has finished computing the second dwell correlation value (K=p\T) (block 44). If correlator 20 is in the middle of computing S\. then correlator 20 remains at the current delay (block 50). Otherwise, correlator 20 is moved to the next delay that needs to be tested.

In the special case of N=2M, K>M implies K=N, so the"no"branch of block 40 leads directly to block 48.

Most preferably, the exact absolute value of Sol vis not compared to the threshold. Instead the following piecewise linear approximation of |SM|, which is based on a linear approximation of I + x2, and which is easier to implement in hardware than an exact numerical calculation of the absolute value ouf suis used for the absolute value of SM; |SM| +min(|Re(SM)|,|Im(SM)|)/4max(|Re(SM)|,|Im(SM)|)

(x2+y2)1/2=|x|(1+(y2/x2))1/2#|x|(1+(|v|/(2|x|)))1/2=|x|+|y|/ 2]|S|= This approximation is sufficiently accurate for first dwell thresholding, and allows the implementation of the first dwell threshold decision in a hardware unit that is smaller, anci consumes less electrical current, than would otherwise be necessary. E3v coutrast, the exact absolute value of SN is computed, for trial delays that pass the first dwell threshold, in software, so that the various |SN|'s can be compared to determine the delays with the largest |SN|s. The fact that only a small number of trial delays pass the first dwell threshold keeps the associated computational load on the system software elatively with no sacrifice in accuracy.

Recall that each memory 24 includes several complex registers for storing SK.

The register depth, i.c. number R of complex registers, depends on how often (multiple of MTC) an interrupt is generated to allow the reading of the most recently calculated value of S and the reading of the index value in the associated integer register. For example, if the interrupt is generated every 2MT then R should be at least'and in general if the interrupt is generated every yMTc(y being an integer) then R should be at least as great as y. If y<R. then the R complex registers are activated cyclically, giving the system software more time to respond to interrupts. R and y are implementation-dependent parameters. There are several considerations in the selection of the optimum values of y and R. Values of y and R that are too small put too much of a burden on system software. Large values of ß and R require a correspondingly long delay line and a larger chip area devoted to memories 24. The preferred value of both R and) is 2. Most preferably. to minimize the burden on system software, an interrupt is issued to system software only when all correlators 20 have filled their respective memories 24.

Next location unit 28 also includes a next location register. At the start of correlation in a given window, the value in the next location register is set to the index corresponding to the first delay after the initial L delays. Subsequently, whenever block 48 is reached for a given correlator 20. the value stored in the next location registrer is: (a) copied to index register 22 of that correlator 20 and then

(b) changed to the index corresponding to the delay immediately following the delay to which that correlator 20 has now been set.

Every yM interrupt intervals. while the interrupt service routine searcher 10, the system software determines the delay of the locally generated PN sequence that is to be used now by each correlator 20. and signals hold unit 26 to pause PN sequence generator 12 until the timing of the generation of the PN sequence hv PN sequence generator 12 matches the earliest delay of the forthcomin M chip intervals. At the same time, multiplexer 18 shifts the input of the PN sequence to each correlator 20 correspondingly, to preserve the continuity of input to each correlator 20. This allows the use of a delay line 14 that is much shorter than the window. Specifically, the minimum value of NI), the number of delay units 16 in delay line 14, is where A is an implementation dependent parameter: A=L !/9* where y is the interrupt interval factor defined above.

Preferably, the components illustrated in Figure 1 all are implemented in hardware. The details of such a hardware implementation will be obvious to those skilled in the art.

The following is an example of the functioning of searcher 10. with L=8 correlators 20 and with D=Tc/2, M=512, N=3M=1536 and y=2. In this example, the value of the indices in index registers 22 and in the next location register of next location unit 28 are given as (possibly fractional) multiples of T.. In practice, because index registers 22 are integer registers. the values actually stored in index registers 22 are appropriate integral multipliers of D. Similarly, the delays are expressed as multiples of T,. relative to the center of the window. A correlator 20 is said to"fail the first dwell threshold"if that correlator 20 produces a first dwell correlation value SA. 1 less than or equal in absolute value to the first dwell threshold, and to "pass the first dwell threshold"if that correlator 20 produces a first dwell correlation value 578 having an absolute value greater than the first dwell threshold. All correlators 20 have two complex registers in memories 24 for accumulating correlation values.

Following the IS-95 standard, the first correlation is performed at a delay of -30.

Table 1: Status at Time = 0 correlatorno.statusnewindex correxspondingnewvaluein value delay nextlocation register -3010 -29½2½ -2931 -28½41½ z 6-27½ 7 3-27 43½-26½ Table 2: Status at time = 512T, correlatorno.statusnewindexcorresponding newvaluein valuedelaynextlocation register threshold4-264½1fail ? failthreshold4½ -25½ 5 3 failthreshold5-255 4failthreshold5½ -24½6 5failthreshold6-246½ 6 failthreshold6'/2-23'/27 7failthreshold7 -23 7½ 7½-22½8failthreshold

Note : All the correlators have failed the first dwell threshold. Therefore. all the index registers are incremented by 4.

Table 3: Status at time = 1024T, correlatorno.statusnewindexcorresponding newvaluein valuedelay nextlocation register threshold8-228½1fail 2failthreshold8½ -21½ 9 pass threshold 5-25 4failthreshold9 -21 9½ 5 fail threshold 9'/2-20'/210 66½-23½10threshold 7failthreshold10-20 8 failthreshold101/2-191/,

Note: Correlators 3 and 6 have passed the first dwell threshold. Therefore, these two correlators remain at their old delays. to continue correlating for the second dwell time. The other correlators, having failed the first dwell threshold, are set to the next delays.

Now, an interrupt is generated. Hold unit 26 performs a hold of 5T,, which is the delay of the earliest correlator (correlator 3) relative to the start of the window. and 5 is subtracted from all the index values and from the value in the next location register.

Table 4: Status at time = 1536 T correlatorno.statusnewindex corresponding newvaluein value delav nextlocation register threshold6-196½1fail threshold6½-18½72fail continue (2-25 7 44fail threshold7½-18 55fail threshold8-17½ 6continue-23½81½ 7failthreshold8 -17 8½ threshold5½-19½8½8pass

Note: Correlator 8, which has passed the first dwell threshold, and correlators 3 and 6. which are correlating in the second dwell time. are kept at their old delays. The other correlators are set to the next delays.

Table 5: Status at time = 2048 T, correlatorno.statusnewindexcorresponding newvaluein valuedelav nextlocation register l fail threshold 8ll2-16l/2 9 2passthreshold6½ -18½ 9 continue ( 4failthreshold9 -16 9½ 5 failthreshold9'/2-15'A10 6continue(31½ -23½10 7failthreshold10 -15 10½ (2nd)5½-19½10½8continue

Note: Correlator 2. which has passed the first dwell threshold, and correlators 3,6 and 8. which are correlating in the second dwell time. are kept at their old delays. The other correlators are set to the next delays.

An interrupt is again generated, but no hold is performed because the earliest correlator still is correlator 3.

Table 6: Status at time = 2560T£ correlatorno.statusnewindexcorrespondingnewvaluein valuedelaynextlocation register threshold10½-14½111fail 2continue(2nd)e61/-) 33finish (new11½-14 location) 4failthreshold11½ -13½12 5failthreshold12-1312'/-) 6finish(new12½ -12½ 13 location) 7fail threshold-12 (3rd)5½-19½10½8continue

Note: Correlators 2 and 8, which are correlating in the second dwell time, remain at their old delays. The other correlators, which either have failed the first dwell threshold or have completed the full first and second dwell correlations, are set to the next delays. In correlators 3 and 6. the active memory registers now store the second dwell correlation value.

Table 7: Status at time = 3072toc

correlatorno.statusnewindexcorrespondingnewvaluein valuedelaynextlocation register 113½-11½14threshold (3rd)6½-18½112continue threshold14-1114½3fail 4passthreshold11½ -13½ 14½ 5 failthreshold14'/2-10'/2 15 6passthreshold12 2-12 215 7failthreshold15-1015½ 8finish(new15 l/2-9/216 location)

An interrupt is again generated. SA is read from the inactive complex registers of the memories of correlators 3 and 6. The corresponding indices are read from the corresponding integer registers of the memories of correlators 3 and 6. Hold unit 26 performs a hold of 6TC because the earliest correlator (correlator 2) is advanced by 13 T./ ? relative to PN sequence generator 12. Correspondingly, 6 is subtracted from all of the index values and from the value in the next location register.

The operations performed by searcher 10 are partitioned between hardware and software in a manner that makes optimal use of the relative strengths and weaknesses of hardware and software. Specifically, operations associated with high current consumption are implemented in hardware, and numerically intensive operations are implemented in software. The exceptions are numerically intensive operations that are performed frequently, for example, the approximate computation of according to equation (9), which also are performed in hardware. The sorting of . values to find the test delays that pass the second dwell threshold. and the pausing of PN generator 12, also are done by software.

While the invention has been described with respect to a limited number of embodiments, it will be appreciated that many variations. modifications and other applications of the invention may be made.