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Title:
CERAMIC LAMINATED SUBSTRATE, MODULE, AND METHOD FOR MANUFACTURING CERAMIC LAMINATED SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2020/022352
Kind Code:
A1
Abstract:
The present invention provides a ceramic laminated substrate on which electronic components to be mounted are formed, the incidence of mounting faults being low even if the height of solder is irregular. The ceramic laminated substrate comprises: a ceramic laminate 1 for which ceramic layers 1a to 1d are laminated; a via conductor 2; a terminal electrode 4; and a land electrode, wherein the land electrode has a first land electrode 5 and a second land electrode 6 for joining different electrode terminals of a single electronic component, the area of the first land electrode 5 is smaller than the area of the second land electrode 6, the first land electrode 5 has a projection electrode 5a and plating layers 5b, 5c, the second land electrode 6 has a membrane electrode 6a and plating layers 6b, 6c, and the height of the first land electrode 5 is higher than the height of the second land electrode 6.

Inventors:
GOITSUKA, Takuya (10-1, Higashikotari 1-chome, Nagaokakyo-sh, Kyoto 55, 〒6178555, JP)
Application Number:
JP2019/028917
Publication Date:
January 30, 2020
Filing Date:
July 23, 2019
Export Citation:
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Assignee:
MURATA MANUFACTURING CO., LTD. (10-1, Higashikotari 1-chome Nagaokakyo-sh, Kyoto 55, 〒6178555, JP)
International Classes:
H05K3/34; H01L21/60; H01L23/12; H01L23/13; H01L25/04; H01L25/18; H05K1/18; H05K3/46
Domestic Patent References:
WO2016194925A12016-12-08
Foreign References:
JP2011176301A2011-09-08
JP2008004733A2008-01-10
JP2002043747A2002-02-08
JP2008021883A2008-01-31
JP2004356527A2004-12-16
Attorney, Agent or Firm:
KAWAMOTO, Takashi (Kawamoto Patent Office, 15-7 Goryo Minegado-cho 3-chome, Nishikyo-ku, Kyoto-sh, Kyoto 03, 〒6101103, JP)
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