Technical Field

[0001] The present disclosure relates to ceramic waveguide filter devices. Background

[0002] Ceramic waveguide (CWG) filters are a promising solution for 5G Advanced Antenna System (AAS) radio front-end design due to its smaller size, lower weight and lower cost, as well as its relatively higher Q factor compared with other types of filters such as air cavity filter, dielectric cavity filter and ceramic monoblock filter etc.

[0003] Fig. 1 shows a general Frequency Division Duplex (FDD) type radio front- end 100 that includes a CWG duplexer 102 coupled to an antenna 104. A power amplifier (PA) 106 is coupled to the CWG duplexer 102 via a transmit lowpass filter (Tx LPF) 108, and a Low noise amplifier (LNA) 1 10 is coupled to the CWG duplexer 102 either directly or optionally via a receive lowpass filter (Rx LPF) 1 12.

[0004] The CWG duplexer 102 is composed of a transmit bandpass filter (Tx BPF) 1 14 and a receive bandpass filter (Rx BPF) 1 16. The Tx BPF 1 14 operates to couple transmission (Tx) radio signals output from the PA 106 to the antenna 104, while the other Rx BPF 1 16 operates to couple inbound (Rx) radio signals from the antenna 104 to a the Rx LNA 1 10.

[0005] The Tx and Rx LPFs 108 and 1 12 may be used with the CWG duplexer 102 in order to meet radio system requirements. These LPFs generally need to be in small size, which can be satisfied by the use of ceramic monoblock type LPF or Surface Acoustic Wave (SAW) or Bulk Acoustic Wave (BAW) type filter. However, these types of LPF filters tend to be lossy, and accordingly they are not a preferred option at least for the TX path.

[0006] One possible design option for the Tx LPF 108 is to use a two dimensional (2D) type transmission line LPF filter constructed on the RF printed circuit board (PCB). However, this solution tends to occupy a large area on the PCB, which is undesirable.

[0007] Furthermore, since the CWG duplexer 102 and the LPF(s) 108 and 1 12 are manufactured as separate components, some form of cabling or transmission line is needed to connect them together. However, such connections create additional losses, and occupy further area on the PCB. As a consequence, the use a CWG duplexer 102 for the radio front-end 100 yields very little benefit in terms of size reduction as compared to solutions that do not use CWG components.

[0008] There is another problem with conventional CWG duplexer applications, which is the reliability issue.

[0009] Figs. 2 & 3 show respective examples of a conventional CWG duplexer 102 mounted on an RF PCB 202. In the example of Fig. 2, the CWG duplexer 102 is configured as a generally rectangular block, which is connected to the PCB 202 via a plurality of solder bumps 204. Respective Tx and Rx ports 206 and 208 are provided by means of connectors located on a top surface of the duplexer 102, to facilitate connection to the PA 106 and LNA 1 10 via suitable cables. On the bottom of the duplexer 102, one of the solder bumps also serves as an antenna port 210, which facilitates connection to the antenna 104 via suitable transmission lines (not shown) on the PCB 202.

[0010] In the example of Fig. 3, the CWG duplexer 102 is of similar construction as in the example of Figure 2, except that the Tx and Rx ports 206 and 208 are also provided as solder bumps on the bottom of the duplexer 102.

[0011] For conventional CWG materials, the coefficient of thermal expansion (CTE) is about 5ppm/C or less. In contrast, commonly used RF PCBs (such as well known FR4, or Megatron 6) have a CTE of about 15ppm/C. Therefore, there is always a large thermal mismatch between the CWG filter/duplexer (and, more generally, any CGW device) and the RF PCB.

[0012] In addition, a typical CWG duplexer has a dimension of about

70mmx40mmx15mm for 2GHz application, the maximum distance between two edge solder bumps tends to be relatively large as shown in Figs 2 & 3. Taken together, the combination of the large thermal mismatch and the large distance between edge solder bumps results in high stresses in the edge solder bumps. These stresses tend to vary with temperature, which leads to fatigue cracking and eventual failure of the solder bumps.

[0013] Technically, the reliability of a CWG filter/duplexer mounted on the RF PCB is determined by two main factors: one is the difference of the mismatched CTEs; another is the maximum distance of any two solder bumps. Therefore, in order to improve the CWG filter/duplexer reliability, it is necessary to reduce either or both of the CTE difference and the maximum distance between adjacent solder bumps.

[0014] However, there is almost no choice to reduce the CTE difference because from a filter design point of view, the lower CTE the CWG has the more stable performance the CWG filter/duplexer has over entire temperature range, on other hand the current widely used RF PCB material such as FR4 or Megatron 6 can not be simply replaced with any new lower CTE PCB material.

Summary

[0015] An aspect of the present invention provides a composite electronic device comprises a ceramic waveguide, CWG, device having at least two input/output, I/O, ports; and a ceramic stripline, CS, device comprising at least one stripline transmission path having at least two I/O ports. The CS device is affixed to the CWG device such that at least one of the I/O ports of the CWG device is electrically connected to a corresponding one I/O port of the CS device.

Brief Description of the Drawings

[0016] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain principles of the disclosure.

[0017] Figure 1 is a block diagram illustrating elements of a conventional radio front-end;

[0018] Figures 2A-2C respectively show side, top and bottom views of an example ceramic waveguide (CWG) duplexer known in the art; [0019] Figures 3A and 3B respectively show side and bottom views of a second example CWG duplexer known in the art;

[0020] Figures 4A and 4B respectively show top and side cross-sectional views of an example CWG bandpass filter (BPF);

[0021] Figures 4C-4E respectively show top, side cross-sectional and top cross- sectional views of an example ceramic stripline (CS) lowpass filter (LPF);

[0022] Figures 5A-5C respectively show top, side cross-sectional and bottom views of an example CWG BPF/CS LPF in accordance with representative embodiments of the present invention;

[0023] Figures 6A-6C respectively show top, side cross-sectional and bottom views of a second example CWG BPF/CS LPF in accordance with representative

embodiments of the present invention;

[0024] Figure 7A is a block diagram schematically illustrating functional elements of an example composite device in accordance with representative embodiments of the present invention; Figures 7B-7E respectively show top, side cross-sectional; top cross-sectional; and bottom views of the example composite device of Figure 7A;

[0025] Figure 8A is a block diagram schematically illustrating functional elements of an example composite device in accordance with representative embodiments of the present invention; Figures 8B-8E respectively show top, side cross-sectional; top cross-sectional; and bottom views of the example composite device of Figure 8A;

[0026] Figures 9A-9B respectively show side and bottom views of a third example CWG BPF/CS LPF duplexer in accordance with representative embodiments of the present invention;

[0027] Figures 10A-10B respectively show side and bottom views of a fourth example CWG BPF/CS LPF duplexer in accordance with representative embodiments of the present invention;

[0028] Figures 1 1 A-1 1 B respectively show side and bottom views of a fifth example CWG BPF/CS LPF duplexer in accordance with representative embodiments of the present invention; [0029] Figures 12A-12B respectively show side and bottom views of a sixth example CWG BPF/CS LPF duplexer in accordance with representative embodiments of the present invention;

[0030] Figures 13A-13B respectively show side and bottom views of a seventh example CWG BPF/CS LPF duplexer in accordance with representative embodiments of the present invention;

[0031] Figures 14A-14B respectively show side and bottom views of an eighth example CWG BPF/CS LPF duplexer in accordance with representative embodiments of the present invention;

Detailed Description

[0032] The embodiments set forth below represent information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure.

[0033] At least some of the following abbreviations and terms may be used in this disclosure.

2D Two Dimensional

3GPP Third Generation Partnership Project

5G Fifth Generation

AAS Advanced Antenna System

ASIC Application Specific Integrated Circuit

CWG Ceramic Waveguide

FDD Frequency Division Duplex

BPF Bandpass Filter

LPF Lowpass Filter

CTE Coefficient of Thermal Expansion

CS LPF Ceramic Stripline LPF [0034] Embodiments of the present invention provide a composite electronic device that comprises a ceramic waveguide, CWG, device having at least two input/output, I/O, ports; and a ceramic stripline, CS, device comprising at least one stripline transmission path having at least two I/O ports. The CS device is affixed to the CWG device such that at least one of the I/O ports of the CWG device is electrically connected to a corresponding one I/O port of the CS device.

[0035] Figures 4A-E illustrate example ceramic filter structures. Figures 4A and 4B respectively show top and side cross-sectional views of an example ceramic waveguide (CWG) bandpass filter (BPF) 400, while figures 4C-4E respectively show top, side cross-sectional and top cross-sectional views of an example ceramic stripline (CS) lowpass filter (LPF) 402.

[0036] The example CWG BPF 400 shown in Figures 4A and 4B comprises a CWG body 404 and a pair of vias 406a and 406b that serve to couple electrical energy into and out of the CWG body 404. As may be seen in FIG. 4A, the vias 406a and 406b are exposed on the top surface of the CWG body 404, which consequently serve as input/output I/O ports by which the CWG BPF 400 may be connected to other components (eg. by means of suitable solder connections, for example). Alternatively, the vias 406a and 406b may be exposed on respective opposite surfaces of the CWG body 404, if desired.

[0037] The example CS LPF 402 shown in Figures 4C-4E comprises a metal layer 408 disposed on a ceramic substrate 410, and a pair of vias 412a and 412b that serve to couple electrical energy to and from of metal layer 408. As may best be seen in FIG. 4D, the vias 412a and 412b are exposed on opposite surfaces of the CS LPF 402, which consequently serve as input and output ports by which the CS LPF 402 may be connected to other components (eg. by means of suitable solder connections, for example). Alternatively, the vias 412a and 412b may be exposed on a common surface of the CS LPF 402, if desired.

[0038] By appropriate selection of the ceramic materials used in the CWG BPF 400 and the CS LPF 402, these two devices can be constructed with similar dimensions in the horizontal plane, but with respective different heights. Accordingly, two or more such devices may be bonded together to yield a composite device as may be seen in Figures 5-8.

[0039] Fig. 5 shows an example composite device 500 comprising a CWG BPF 502 bonded to the CS LPF 402 illustrated in FIGs. 4C-4E. The CWG BPF 502 is similar to that illustrated in FIGs. 4A and 4B. The via 406a of the CWG BPF 502 is electrically connected to via 412a of the CS LPF 402, for example by means of solder (not shown in FIG. 5). Known bonding techniques and materials (such as thermal adhesives, for example) may be used to mechanically secure the CWG and CS devices together. Since both devices are constructed of ceramic materials, the CTE mismatch between the two devices is minimal, even when different ceramic compositions are used in each device. Consequently, thermally induced stresses in the adhesive bond between the CWG and CS devices will also be minimal.

[0040] Fig. 6 shows another example composite device 600 comprising a CWG BPF 602 bonded to a CS LPF 604. In this example, the CWG BPF 602 is constructed such that both vias 406a and 406b are exposed on the same (e.g. upper) surface of the CWG BPF 602. In addition, the CS LPF 604 includes a through-via 606, which may align with via 406b. With this arrangement, vias 406a and 412a can be electrically bonded together (eg. by solder), and via 406b can be electrically connected to through via 606 (eg. by solder) so that vias 412b and 606 can be used as input/output (I/O) ports of the composite device 600.

[0041] FIGs. 7A-7E show an example composite device 700 comprising a duplexer 702 with one or more stripline filters 704a and 704b (FIG. 7A). The duplexer 702 is composed of a pair of parallel CWG BPFs 706a and 706b coupled to a common I/O port 708 which may be connected to an antenna 104. Each stripline filter 704a, 704b is connected between a respective one of the CWG BPFs 706a and 706b and a respective I/O port 710a, 710b which may be coupled to other electronic circuits such as power amplifier 106 and/or low noise amplifier 1 10.

[0042] In the example of FIG. 7, the CWG BPFs 706 are bonded to a CS device 712 that is configured to accommodate parallel RF stripline structures 714a and 714b connected between a respective I/O port 710 and an I/O via of a respective one of the two CWG BPFs 706. In this example, All three I/O ports 708, 710a and 710b are formed on the top of the composite device 700.

[0043] FIGs. 8A-8E show another example composite device 800 comprising a duplexer 802 connected with a stripline filter 804 (FIG. 8A). The duplexer 802 is composed of a pair of parallel CWG BPFs 806a and 806b coupled between respective I/O ports 808a and 808b and the stripline filter 804. The stripline filter 804 is connected between the duplexer 802 and an antenna port 810.

[0044] In the example of FIG. 8, the CWG BPFs 806 are bonded to a CS device 812 that is configured to accommodate an RF stripline structure 814 connected between antenna port 810 and a common I/O via 816 of the duplexer 802. In this example, all three ports 808a, 808b and 810 are formed on the top of the composite device 800.

[0045] As may be appreciated, one feature that common to all of the example composite devices described above with reference to FIGs. 5-8 is that adjoining CWG and CS devices may be electrically connected together by means of vias and solder , for example. As such, the connections between adjoining device are electrically very short, and consequently have very low loss. Another common feature is that in each composite device, CWG and CS devices are bonded together in a vertical stack. This means that a composite device (which may include two or more discrete CWG and CS devices) occupies less space on a PCB than would be the case if each device needed to be individually mounted on the PCB and interconnected by electrical wires or transmission lines.

[0046] The examples described above with reference to FIGs. 5-8 relate to duplexers formed by CWG BPFs bonded to one or more CS LPFs. However, it will be appreciated that other types of CWG and CS devices can be bonded together to obtain composite devices that perform other functions. Thus it will be seen that the present invention is not limited to embodiments in which CWG BPFs are bonded to one or more CS LPFs to form a duplexer.

[0047] As noted above, the reliability of CWG devices is closely related to thermally induced stresses in the solder connections between the CWG device and the PCB. These thermally induced stresses are a function of the difference between the respective coefficient of thermal expansion (CTE) of the CWG and PCB materials, and the spacing between the solder bumps connecting a CWG device to a PCB.

[0048] Embodiments of the present invention enable high reliability by minimizing the distance separating solder connections between CWG device and a PCB.

[0049] In some embodiments, solder connections provide both an electrical path and a mechanical joint between the CWG device and the PCB, and may be used for I/O ports and one or more ground connections that can be positioned close to the I/O ports.

[0050] In some embodiments, contact bumps provided on a CWG device serve to permit a sliding contact between a CWG device and the PCB. Such a sliding contact stabilizes the CWG device against vibration, for example, but permits sliding motion and so avoids thermally induced stresses. In some embodiments, at least three contact bumps are provided on a CWG device. The number of contact bumps can be greater than three, if desired. Contact bumps may be distributed around a periphery of the CWG device.

[0051] Contact bumps may be formed of any suitable material including, for example, plastic or metal. If desired, contact bumps may be formed of a solder material, which may have a different melting point than the solder material used to form the solder connections between the CWG device and the PCB. If desired, metal contact bumps may be arranged to slide on a metal layer of the PCB, and so provide a ground connection for the CWG device.

[0052] In some embodiments, two types of solder materials that have different melting points may be used to address the CWG filter/duplexer reliability issue. The solder material with lower melting point may be used to make solder bumps for the active ports (eg. Tx, Rx and Antenna I/O ports) and ground connections surrounding these active ports. The solder material with the higher melting point may be used to make contact bumps that will provide a mechanical support to the CWG filter/duplexer body and (optionally) an additional ground connection.

[0053] FIGs. 9A and 9B show an example CWG (or composite CWG/CS) device 900 mounted on an RF PCB 902. In the example of FIG. 9, TX and RX I/O ports 904 and 906 are provided as connectors on a top face of the device 900. As may be seen in FIG. 9B, a plurality of contact bumps 908 are provided around a perimeter of the bottom face of the device 900. An antenna I/O port 910 is centered on the bottom face of the device 900, and is surrounded by a set of ground ports 912.

[0054] In some embodiments, two different types of solder materials are used to form the contact bumps 908, and the ports 910 and 912. For example, the contact bumps 908 may be formed using a higher melting point solder material, while the ports 910 and 912 located at the centre of the device 900 may be made using a lower melting point solder material.

[0055] The contact bumps 908 play two roles: one is to provide a ground connection between the device 900 and the RF PCB 902, the other is a sliding mechanical supporter to the device 900. On the other hand, the ports 910 and 912 provide electrical connections (for ground and I/O signaling) between the device 900 and circuit traces on the PCB 902, and also provide a fixed mechanical connection between the device 900 and the PCB 902.

[0056] When a reflow is used to mount the device 900 on the RF PCB 902, the reflow temperature can be controlled to ensure that only the lower-melting point solder bumps are melted. This melting of the lower-temperature solder enables the electrical and fixed mechanical connections between the device 900 and the RF PCB 902 to be made without any significant effect on the higher melting temperature solder contact bumps 908.

[0057] After the reflow operation, the device 900 will be firmly fixed on the RF PCB 902 by the lower melting temperature solder ports 910 and 912, and at least three of the higher melting temperature solder contact bumps 908 will be touching the RF PCB 902 tightly and help support the device 900. As the contact bumps 908 can slide on the RF PCB 902, they will be not be subjected to significant thermal stresses. The lower melting temperature solder ports 910 and 912 do form a fixed mechanical connection, and so will absorb at least some thermal stresses. However, these stresses are minimized by the very short distances separating the ports 910 and 912. Thus, the device 900 will have much better reliability than conventional devices. [0058] FIGs. 10A and 10B show a variant of the embodiment of FIGs. 9A and 9B, in which the Tx and Rx connectors 904 and 906 are located at one end of the CWG device 1000, and the lower melting temperature solder ports 910 and 912 are located near the other end of the CWG (or CWG/CS composite) device 1000.

[0059] FIGs. 1 1 A and 1 1 B show a further example CWG (or composite CWG/CS) device 1 100 mounted on an RF PCB 1 102. In the example of FIG. 1 1 , TX and RX I/O ports 1 104 and 1 106, and an antenna I/O port 1 1 10 are provided on a bottom face of the device 1 100, surrounded by a set of ground ports 1 1 12. As may be seen in FIG.

1 1 B, a plurality of contact bumps 1 108 are provided around a perimeter of the bottom face of the device 1 100.

[0060] As in the embodiments of FIGs. 9 and 10, the reliability of the device 1 100 illustrated in FIGs. 1 1 A and 1 1 B will also be determined by the lower melting temperature solder ports 1 104, 1 106,1 1 10, and 1 1 12. As the separation distance between these solder ports is relatively small, the illustrated embodiment will have much better reliability than conventional devices of equivalent functionality.

[0061] FIGs. 12A and 12B show a variant of the embodiment of FIGs. 1 1A and 1 1 B, in which the lower melting temperature solder ports 1 104, 1 106, 1 1 10, and 1 1 12 are located near one end of the CWG (or CWG/CS composite) device 1200.

[0062] FIGs. 13A and 13B show a further variant of the embodiment of FIGs. 1 1 A and 1 1 B, in which the lower melting temperature solder ports 1 104, 1 106, 1 1 10, and 1 1 12 are located near one end of the CWG (or CWG/CS composite) device 1200.

[0063] FIGs. 14A and 14B show an example CWG (or composite CWG/CS) device 1400 mounted on an RF PCB 1402. In this example embodiment, TX, Rx and antenna I/O ports 1404, 1406 and 1408 are provided as low-melting temperature solder bumps on a bottom face of the device 1400, surrounded by a set of ground ports 1410. As may be seen in FIG. 14B, a set of three contact bumps 1412 are provided around a perimeter of the bottom face of the device 1400.

[0064] As may be appreciated, the use of three contact bumps 1412 is sufficient to provide mechanical stability for the device 1400. Accordingly, the use of three contact bumps may represent a minimum contact pad arrangement. From a production yield point of view, the use of more than three contact bumps may be preferable, to improve mechanical stability and/or electrical grounding. As the contact bumps mainly play a mechanical supporting role to the composite electronic device, so they can be made by using other materials including any one or more of: plastic materials such as PTFE or the like, Ceramic materials, or metals such as silver and copper.

[0065] In the embodiments described above with reference to FIGs. 9-14, the use of solder bumps to provide fixed physical and electrical connections, while contact bumps provide sliding support is described in the context of mounting a CWG/CS composite device to a printed circuit board. However, it will be appreciated that the use of solder bumps and contact bumps is not limited to such devices. For example, solder bumps and contact bumps may equally be used for mounting a CWG filter 404 to a printed circuit board, independently of whether or not any other devices (such as CS devices) are also combined with the CWG filter.

[0066] While processes in the figures may show a particular order of operations performed by certain embodiments of the present disclosure, it should be understood that such order is representative, and that alternative embodiments may perform the operations in a different order, combine certain operations, overlap certain operations, etc.

[0067] Those skilled in the art will recognize improvements and modifications to the embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein.