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Patent Searching and Data


Title:
CHANNEL CHECK TEST SYSTEM
Document Type and Number:
WIPO Patent Application WO/2000/035161
Kind Code:
A1
Abstract:
When the setting of the compression/expansion rules of an encoder or decoder contains an error, it causes a problem that even when it should be judged that a channel is electrically connected, a misjudgement is made. A channel check test system comprises a transmission-side DCME for inserting a nonlinearly-quantized input test pattern into a channel to be tested and a reception-side DCME having an adder for adding an offset value to the output value or a linear converter, a code extractor for extracting a code from the output signal of the adder, a delay unit for delaying the extracted code, an exclusive-OR circuit for performing an exclusive-OR operation of the extracted code and the output signal of the delay unit, a counter for counting the number of events that the output value agrees with a predetermined value, and a comparator for comparing the count with a threshold and outputting the result of the comparison. Thus it is possible to check the electrical connection of a channel under test, including the check of an error of the setting of the PCM compression/expansion rules in either the transmission-side DCME or the reception-side DCME.

Inventors:
SUGINO YUKIMASA (JP)
SUZUKI SHIGEAKI (JP)
HORIE NOBUYOSHI (JP)
Application Number:
PCT/JP1999/006771
Publication Date:
June 15, 2000
Filing Date:
December 02, 1999
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
SUGINO YUKIMASA (JP)
SUZUKI SHIGEAKI (JP)
HORIE NOBUYOSHI (JP)
International Classes:
H04B14/04; H04L1/24; H04L12/26; H04M3/00; H04M3/26; H04M3/24; H04Q11/04; (IPC1-7): H04L29/02; H04B14/04; H04M3/26; H04J3/14
Foreign References:
JPH07131832A1995-05-19
JPH0548563A1993-02-26
JPH0333800A1991-02-14
JPH05268365A1993-10-15
Other References:
See also references of EP 1049304A4
Attorney, Agent or Firm:
Soga, Michiteru (8th floor 1-1, Marunouchi 3-chome Chiyoda-ku Tokyo, JP)
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