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Patent Searching and Data


Title:
CHARGE SAMPLING FILTER CIRCUIT AND CHARGE SAMPLING METHOD
Document Type and Number:
WIPO Patent Application WO/2008/032635
Kind Code:
A1
Abstract:
[PROBLEMS] To provide a charge sampling filter circuit and a charge sampling method. [MEANS FOR SOLVING PROBLEMS] A charge sampling filter circuit has a first capacitor for sampling an inputted signal and outputs at least a part of charges stored in the first capacitor by sampling to a second capacitor which can be electrically continuous with the first capacitor. The charge sampling filter circuit is also provided with a switching section for switching circuit mode, including sampling mode for sampling the inputted signal by the first capacitor and output mode for carrying electricity between the first capacitor and the second capacitor. A capacitance value of the first capacitor in the output mode is lower than that in the sampling mode.

Inventors:
YOSHIZAWA ATSUSHI (JP)
IIDA SACHIO (JP)
Application Number:
PCT/JP2007/067398
Publication Date:
March 20, 2008
Filing Date:
September 06, 2007
Export Citation:
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Assignee:
SONY CORP (JP)
YOSHIZAWA ATSUSHI (JP)
IIDA SACHIO (JP)
International Classes:
H03H15/00; H03H19/00
Foreign References:
US20030050027A12003-03-13
JPS6074711A1985-04-27
JPH06164323A1994-06-10
JP2007174629A2007-07-05
US20020172170A12002-11-21
Other References:
See also references of EP 2066028A4
"An 800MHz to 5GHz Software-Defined Radio Receiver in 90nm CMOS", IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE 26.6, 2006
FENG CHEN ET AL.: "A 0.25-mW Low-Pass Passive Sigma-Delta Modulator with Built-In Mixer for a 10-MHz IF Input", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 32, 1 June 1997 (1997-06-01), XP011060484
Attorney, Agent or Firm:
KAMEYA, Yoshiaki (Daiichi Tomizawa Building3-1-3, Yotsuy, Shinjuku-ku Tokyo 04, JP)
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