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Title:
CHIP FANNING OUT CIRCUIT AND METHOD
Document Type and Number:
WIPO Patent Application WO/2018/165816
Kind Code:
A1
Abstract:
The present invention relates to a chip fanning out circuit and method. The chip fanning out method comprises: arranging a chip on a support board, and arranging an auxiliary net and a packaging material on the support board; at least a part of the chip being embedded in the packaging material, at least a part of the auxiliary net being embedded in the packaging material, curing the packaging material to form a packaging layer, and the packaging layer packaging and fixing the chip and the auxiliary net; and disengaging the support board from the chip or the packaging layer or the auxiliary net. Overall bending or deformation caused by packaging the chip by the packaging layer is prevented, thus ensuring that line connection relationship of a circuit is not destroyed by the packaging process.

Inventors:
HU CHUAN (US)
LIU JUNJUN (US)
Application Number:
PCT/CN2017/076432
Publication Date:
September 20, 2018
Filing Date:
March 13, 2017
Export Citation:
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Assignee:
SHENZHEN XIUYUAN ELECTRONIC TECH CO LTD (CN)
International Classes:
H01L25/00
Foreign References:
CN101097904A2008-01-02
CN102915985A2013-02-06
CN203839349U2014-09-17
CN101061577A2007-10-24
Attorney, Agent or Firm:
GUANGZHOU PANYU RONDA PATENT AGENCY (CN)
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