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Title:
CHIP FORM ULTRACAPACITOR
Document Type and Number:
WIPO Patent Application WO/2019/070897
Kind Code:
A1
Abstract:
An energy storage- apparatus suitable for mounting on a printed circuit board, using a solder reflow process is disclosed.In some embodiments, the apparatus includes: a sealed housing body (e.g., a lower body with a lid attached thereto) including a positive internal contact and a negative internal contact (e.g., metallic contact pads). disposed within the body and each respectively in electrical communication with a positive external contact and a negative external contact. Each of the external contacts provide electrical communication to the exterior of the body, and may be disposed on an external surface of the body. An electric double layer capacitor (EDLC) (also referred to herein as an "ultracapacitor" or "supercapacitor") energy storage cell is disposed within a cavity in the body including a stack of alternating electrode layers and electrically insulating separator layers. An electrolyte is disposed within the cavity and wets the electrode layers. A positive lead electrically connects: a. first group of one of more of the electrode layers to the positive internal contact; and a negative lead electrically connects a second group of one or more of the electrode layers to the negative internal contact.

Inventors:
BRAMBILLA, Nicolo (1454 Beacon St, Unit 542Brookline, MA, 02446, US)
HYDE, John (22 Rosebay Drive, Ashland, MA, 01721, US)
ANDREE, Wyatt (9 Beachland Avenue, Revere, MA, 02151, US)
KALABATHULA, Susheel, M.J. (12 Waverley Street, Waltham, MA, 02453, US)
LANE, Joseph, K. (49 Pent Road, Branford, CT, 06405, US)
Application Number:
US2018/054231
Publication Date:
April 11, 2019
Filing Date:
October 03, 2018
Export Citation:
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Assignee:
FASTCAP SYSTEMS CORPORATION (21 Drydock Avenue, 8th Floor EastBoston, MA, 02210, US)
International Classes:
H01G11/80; H01G11/24; H01G11/52; H01G11/54
Foreign References:
US20100188800A12010-07-29
US20140042988A12014-02-13
KR20110049526A2011-05-12
US20090080141A12009-03-26
US20150049416A12015-02-19
Attorney, Agent or Firm:
BLACKWELL, Brandon S. et al. (WOLF, GREENFIELD & SACKS P.C.,600 Atlantic Avenu, Boston Massachusetts, 02210, US)
Download PDF:
Claims:
CLAIMS

What isclaimed is:

1. An energy storage apparatus suitable for mounting on a inted circuit board using a solder reflo process, the apparatus comprising:

sealed hous ng body .comprisi : a positive internal contact and: & negative internal contact each d s osed within fe body aiid eaeli respectively in. electrical eoramiuiieation with a positive external contact and a negative externa^ each of the extemai. contacts providin electrical.communication to the exterior -of the. body;

an electric double layer capacitor (EDLG) energy storage cell disposed, within a cavit in the body comprising a stack of alternating electrode layers and electrically insulating separator layers;

an electrolyte disposed within tlie cavity and wetting the electrode layers

a positive lead electrically connecting a firs group of one or more ofihe electrode layers! to the positive Internal contact; and

a negati ve lead electrically connecting a second group of one or more of the electrode layers to 'the negativ internal contact.

2. The apparatus of claim I, wherein each, of the electrode layers comprises an. energy storage media that, is substantially free {mm binding agents and consists essentiall of carbonaceous material

3. The apparatus of claim .2, whefein energy storage media comprises a network of carbon nanotubes defining void spaces; and a carbonaceous material located, in the. void,.spaces and bound by the network of carbon nanotubes.

4. The apparatu of claim 3, wherein at least, one electrode laye comprises a double-sided electrode layerhaving energy storage media disposed: on opposing surfaces of a conductive: current collector layer.

5. The apparatus of any preceding claim, wherein surfaces of the energy storage cell in physical contact with body consist of electrical ly insulating material.

6. The apparatus of any preceding claim wherein each of the electrode layers comprises a conductive tab attached to one of the positive, l ead and the negative lead.

7. The apparatus of any preceding claim eoniprising a corrosion prevention feature located proximal to one of the internal contacts and configured to limit electrochemical reaction between said internal contact and the electrolyte: during operation of the apparatus,

8. The apparatus Of Claim 7, wherein: the internal contact comprises a first material having a relatively high electrochemical activity with the electrolyte; the corrosion preventio feature comprises a protective layer of a second materia!, having a relatively lower electrochemical activity with the electrolyte than the first material, said, protective layer disposed to prevent contact het een the first material and the electrolyte.

9. The apparatus of claim 8, wherein the protective layer comprises a layer of seal an t

It), The apparatus of claim.8, wherein the protective layer comprises a metallic layer disposed oh. a surface of the first material

11. The apparatus of clairn 8, wherein the protecti ve layer comprises a metallic lawye disposed on. a surface of the first material and a sealant layer disposed on the'. metallic layer,

12. The apparatus of claim 1 1 , wherein in the metallic layer comprises a metallic shim covering at lease a portion of the internal contact an.d secured by the sealant layer.

13. The apparatus of any one of claims 7 t 12, wherein an interior .surface of the b dy comprises a recessed portion configured to receive, at least a portion of the corrosion prevention feature.

14. The, pparatus of any one of claims 7 to 1.3 wherein a portion of the positive or negative lead extends through the corrosion prevention feature to. connect to one of the internal contacts.

15. The apparatus of any one of claims 7 to 1. * he ei».Uje-co¾fOSien- prevention- .feature

eomprises an aluminum metallic layer.

16. The apparatus of any one of claims 7 t I S, wherein the corrosion prevention feature comprises an epoxy sealant.

17. electrically insulating envelope barrier enclosing the energy storage cell and the electrolyte a configured to prevent contact of the electrolyte and energy storage cell with the surfaces of the cavity.

18. The apparatus of claim i.7, where the leads extend through the barrier from the energy storage cell to the internal contacts,

19. The apparatus Of Claim 18, wherein the barrier is eat sealed to the leads to prevent leakage of electrolyte from within the barrier envelope.

20, The apparatus of any preceding elaifii. wh.erein the body is a chip configured for surface mounting on a pri sited eircuit board, wherein, when so; mounted, the chip extends no more than about 5.0 mm above the major surface of the printed eircuit board.

21. The, apparatus of any preceding: ekirn wherein the body k & chip configured for surface mountin n a printed circuit board,, wherein when so mounted, the chip extends no more than about 4.0 mm. above the major surface of the printed circuit board,

22, The apparatus of any preceding claim wherein the bod is a chip -configured for surface mounting on a printed circuit board, wherein when so mounted, the chip extends no more than about 3,0 mm above the major surface of the printed circuit board,

23, The apparatus of any preceding claim having an operating voltage of at least 2.0 V.

24, The apparatus of any preceding claim haying aiioperatmg voltage: of at least ¥.

25, The apparatus of any preceding claim hating aft operating voltage of at least 2.5 V»

26, The apparatus of an preceding claim having; an operating voltage of at least 3.0 Y,

27. The, apparatus of any preceding claim having: a: capacitance of at least 300 :mF.

28. The apparatus of any preceding claim having a capacitance of at least 400 mF, 20, The apparatus pf any preceding claim having an energy density of at least 4.0 l/co,.

30, The apparatus o -any preceding claim having a peak power density of at least 15 VV' ec,

31, The apparatus of any preceding claim havin a peak, power density of at least 20 W cc,

32, The apparatus of any precedin claim having a peak power density of at least 2.2 W/ec.

33. The apparatus of any preceding clai m having aft equivalent series res i stanc of 500 rnO or less.

34. The apparatus of an preceding claim lmving an: equivalent series resistance of 400 rrsQ or less.

35. The apparatus of any preceding, cliim vi¾ . ©q»ivalefiit .series resistance of 300 m or less,

36, The apparatus of any preceding claim having- an operational lifetime of at least 2,000 hours at an operalirig. voltage of at least 2,0 V and an operating, temperature of at least 65° C while exhibiting a capacitance degradation of less than 30% and an -equivalent series resistance increase of less than. 100%.

37. The apparatus of any preceding claim, having an ^operational li fetime of at leasi ¾00 hours at an operating voltage of at least 2.0 V and an operating temperature of at least 85 ° C whil exhibiting a capacitance degradation of less than 30% and an equivalent series; resistance increase of less than 1 0%.

38. The apparatus of any preceding elaim havin an operational lifetime of at least 2,000 hours at an operaiiiig voltage of at least 2.0 V and an operaimg temperature of at ieast IQQ° C. hile exhibiting a capacitance degradation of less than 30% and a equivalent series .resistance increase of less than 100%.

39. The apparatus of any one of claims 3.6 3¾, wherein the: operational lifetime occurs: after the apparatus has been soldered to a printed circuit board using a reflow process having a least one temperature cycle of at least 30 seconds with a peak temperature of at least 200 ° C,

40. The apparatus of any one of elaim 35, wherein the operational lifetime occurs after the apparatus has been soldered t a printed circuit board usin -a reilow process having at least four temperature cycles each o at least 30 seconds with a: peal, temperature of t least 200 0 C,

41. The apparatus of any preceding claim, wherein the energy storage cell provides back up power to at least one additional element mounted to the circuit board,

42. The: apparaf us f any preceding claim wherein the electrolyte cooiprises ati ionic liquid,

43. The apparatu of claim 42. wherein the electrolyte further comprises a salt.

44. The apparatus of claim 42 or claim 43, wherein the electrolyte further comprises a solvent

45. The apparatus of any preceding .claim, wherein the housing body is hcrmeticaiiy sealed,

46. The apparatus of any preceding claim, wherein within the cavity of the housing bod containing die energy storage cell a total eoneentrafion of ha!ide ions is. kept to below about 1,000 ppra.

47. The apparatus of any preceding claim, wherein, within the cavity of the housing body containing the energy storage cell metallic species impurities ate. kept to below about 1,000 ppro.

48. The apparatus of arty precedin claim, wherein within the cavit of the; housing body containing the energy storage cell imparities of bromoe'fhane, . c oroethane, l-bromobutane, 1» ehlorobuiane, l -rnefhyhnh azole, ethyl acetate, and methylene chloride are kept to below about 1,000 pprn.

49. The 'apparatus o f any preceding claim, whereiii, within the cavity of the housing body containing the energy storage cell moisture is kept to below about 100 ppro,

50. he apparatus of any preceding claim, wherein, within the cavity of the housing body containing the energy storage cell ha Side impurities ate kept to below about 200 pptn.

51. The apparatus of any precedin claim wherein the■■.apparatus comprises a single energy storage ceil contained in the sealed housing body.

5% The apparatus of any preceding claim having an operational tempera re of at least 65 ^ i at an operating voltage of 2. I V.

53. The apparatus of any preceding claim, having an operational temperature of at least &S °C at a operating: voltage of 2.1V.

54. The apparatus of any preceding claim having an operational temperature of at least 100 °C at an operating voltage of 2, 1 V.

55. The apparatus of any preceding claim wherein the electrolyte.: .comprises a cations selected from the list consisting of 1 ^-c.yano p ^-^^met limid ^oliiini, 1 ^"dmeth i-B- r yhB i azoS um. l¾3- bis -c^ao rdp^f iniida¾oBu, I »3-di.ethoxyimidazo!inins 1. -butyl- 1- methyipiperidij iurn, l4¾ityS-23~dimeth^ l.-butyl-S-niethyhroidazollum, l.~butyl" ~ Hietiiylpyridinium,. l -hutylpyridinmm, 1 -deeyl:-3-ineth:y!imidazoiiuro, 1 -ethyl -3- methylimidazoliuiti,

56. The apparatus; of any preceding claim wherein the: electrolyte comprises an.&nion selected from the list consisting ..of bjsCirifluororaetto

dicyanamide,: tetrnfltittro or te, hexailuoraphosphate, triilusraraethasesiiilbnate, bis(pentafluor«ethane^ ihiocyanate,

triiluoroCtriSiJOroroethyi}borate, spiro-{ 1 ,1 ')-bipyiToi|dim m tetrailuoroborate salt, another potential salt is -tetraethyiammoni u¾n · teirafl«orebatate mi combinations thereof as well as other, qui valents as deemed appropriate.

57. The -apparatus of any preceding claim wherein the electrolyte comprises a solvent selected .from the.1st consisting of: aectonitriie, mides, :benzont 1e, butyrolaetone, cyclic ether, diknyl carbonate, diethyl carbonate, diethylether, dimetboxycthane, dimethyl carbonate, dimethy!ibraBmide, di ethylsaJfone, dioxane, dioxolane, ethyl formate, ethylene carbonate,, ethyloiethyi carbonate, lactone, linear- ether, metbyi formate, methyl propionate,

inet ylieirahydrofHran, tritrile, nitrobenzene, niitotnethane, h-meihylpyTOlidone, propylene carbonate, sulfolane, sulfone, telrahydtpfuxan, tctraroethylene sulfone, thiophene, ethylene glycol, diethylene glycol, Methylene glycol, polyethylene glycols, carbonic acid ester, j- birtyroiactone, nitrite, tricyartohexane, hu.tyromiriic, ethylene carbonate, and methylene diehloride.

58. The apparatus of any preceding cl im here electrolyte -comprises a gel.

59. The apparatus of any preceding claim wherein the electrolyte .comprises a solid stale electrolyte.

60. The apparatus of any preceding claim wherein, the stack contains an unequal number of positive, .electrode layers and negative electrode layers configured to promote mas balancing of the stack based on the relative size of cations and anions in the electrolyte.

61. A method of making an energy storage apparatus suitable for mounting on a printed circuit board using: a solder relo process, the method comprising-:

forming; an electric double layer capacitor (EDLC) energy storage cell comprising a stack of alternating electrode layers and electrically insulating separator- layers; disposin die energy storage cell within a housing body, the body comprising a positive internal contact and a negative internal contact disposed within the body;

at least partially filling the body with: electrolyt to wet the electrode layers; electrically connecting a positive lead from a first group of one or mom of the electrode layers to the positive internal contact;

electrically connecting a negative lead from a second group of one or more of the electrode layers to the negative Internal' contact; and

sealing the honsing body whn the energy storage cell disposed irerem.

62, The . method of claim 61 wherein sealing the housing body campiises hermetically ..sealing the housing hotly.

63. The method of providing energy to a device mounted on a printed circuit board .comprising: moon ti ng the apparatus of any one of claims ί -60 to. the printed, circuit board using. solde reflow process; an

repetitively charging: and discharging the apparatus at an operating voltage and operating temperature to provide energy to a device;

wherein the operating voltage is. at least 2 V and the operating temperature is at least 65°

€.

64, The method of claim 63, wherein, the :eperaii.ng temperature■% at least 0 C

65. The method of any of claims 63-64, comprising repetitively charging and discharging the apparatus at sra operating voltage and opera ting temperature, to: provide energy to a device for at least 2,000 hours while the apparatus exhibits a eapacitaoce degradation of less .than 30% and an equi alent series resistance increase of less than 100%.

Description:
CHIP FORM liLTRACAPACXFOR CROSS REFERENCE TO RELAXED APPLICATIONS

[0003 ] This application is filed under 37 CFR 11.53(b) and further, under 33 II.S.C. f 1.1 19(e) claims th benefit of earlier filed provisional application 62 567,752, entitled "Chip Oliracapacitor" which was fifed on October 3, 201.7, which is incorporated by reference herein n. its entirety for any purpose- whatsoever * .

BACKGROU D OF THE INVENTION

!. Field of the Jnventlon

[0002] The invention disclosed herein relates to energy storage devices, and, in particular, to ran uitracapaeitor configured for mounting to an electrical circuit board,

2. Description of the Rela ted Art

[0003] A myriad of devices make use of electronics having coiiipoftents disposed onto circuit boards. As with ail electronics,, an effective power supply is a requireiuieut far powering the eoroponenis. One technique for providing local power on a circuit hoard involves the use of energy- storage devices, such as batteries and capacitors.

[0004] Oeneraiiy, conventional capacitors: provide less than about 360 Joules per kilogram of specific energy s . whereas conventional alkaline battery has a densit of about 590 kJ/kg> Ultraeapacitofs (also referred t as "supercapaeitors' 5 }, can accept and deliver charge much faster than batteries and tolerate rhany inore charge arid discharge evcles than rechargeable batteries. This makes implementation of nltracapae tors an attractive solution for electrical engineers,

[0005] As first design obstacle is thai typical ultraeapacitofs can be substantially larger than conventional batteries for: a given charge. Even with advancements in power density,: another problem is process oriented. That is, assembly of an electrical, circuit raphes soldering of components to a circuit board. This "'retlow process* * generates heat that ¾ · substantial enough to degrade or destroy conventional ultracapa ' eitors. Thus, while use of an ' ultraeapaeitdr may be an attractive solution for poweruig. electronics- mounted on a circuit board, this solution has not been. available to compact designs requiring high power output. Beyond that;, a further ro lem with existing idtracapacitor technology is the limited lifetime of such components.

[0006] " What are needed arc ultsraeapadtois- hat ; are . useful for, powering electrical components disposed on a circuit board. Preferably, the uliracapaeitor offer a compact design that is suited to the ever-shrinking size of the com^mmis, . are capabl of survi ving ^il aw processing and provid a useful lifetime of operation .

SUMMARY "

[0007] In one aspect, an energy storage apparatus suitable for iiioun ting o a printed: circuit board using a solder reflaw process is disclosed. In some embodiments, the apparatus includes: a sealed housing body (e.g., a lower body with a lid attached thereto) including a- positive. internal- contact and a negative interna!, contact (e.g.,. metallic contact pads) disposed within the body and each respectively in electrical connnraMcation with a positive external contact and a negative external contact. Each of the externa! contacts provide electriealeoniffinnieation to the exterior of the : body and may be disposed on an external surface of the body. An electric double layer capacitor (EDLC) (also referred to herei -as.:- an "nltraca acito ' o "^uperc pacitor"); energy storage cell is disposed within a cavity in th body including, a stack of alternating electrode layers and electricall insulating separator layers. An electrolyte is disposed within the cavit and wets the electrode layers, A positive lead electrically connects a first group of one or more of the elechode layers to the positive internal contact; and a negative lead electrically connects a second group of one o more of the electrode layers to the negati ve internal contact ineindes an energy siprage . media mat is substantially free from binding: agents and consists ; essentially of carbonaceous material I some embodiments, the energy storage medi includes network, of carbon nanotubes defining void spaces; and a carhonaceous material (e ., activated carbon) located in the void spaces and bound by the network of carbon nanotubes, in some embodiment^., at least one electrode layer includes a double-sided electrode layer having energy storage media disposed on opposing surfaces of a conductive curren t collector layer. [0009] la some embodiments, surfaces- of the energy storage-cell in physical contact with body consist of electrically insulating material (e.g., layers separator material, or in some embodiments an insulating envelope baoier disposed atonnd the cell).

[0010] In some embodiments;, each of the electrode layers includes a conductive tab attached to either one -of the positive lead and the negative lead. For example, a group of positive electrodes ma include tabs connected to the positive lead, e.g., using ultmsonic welding or other suitable techniques (and similarly for the negative case) .

[0011] In various embodiments, it may be desirable to prevent corrosio and other related deleterious, effects by isolating: eiectrocheniically active portions of the apparatus that may otherwise come in contact with the electrolyie during operation. Accordingly;, some embodiments include: one or mo e corrosion p evention features, cg^ a feature located proximal to one of the internal contacts: and configured to limit electrochemical reaction between said internal contact and. the electrolyte during operation. In some embodiments, the internal contact includes a fir t material having a relatively high electrochemical activity: with the electrolyte and the corrosion prevention feature; includes a protective layer of a second material having a relatively lower electrochemical activity with the electrolyte than the; f t «?&te.ria!, : s¾td.|H! teed e layer disposed to prevent contact between the first material and the electrolyte, in some embodiments, the protective layer Include a layer of sealant, e.g., of the types described herein. In some embodiments, the protective layer, includes a metallic layer disposed on a surface of the first material. In some embodiments, the rotective layer includes a metallic layer disposed on. a suriaee of the first material and a sealan t layer disposed on the metallic l ayer, in some embodiments., the metallic layer includes a metallic shim secured or partiall secured (e.g., to the internal contact) by the sealan layer, In some embodiments, an interior suriaee of the body includes recessed portion configured to receive at least a portion of the corrosion prevention feature. In some embodiments, a portion of the positive or fiegaiiye lead extends through the corrosion, prevention feature to connect to one of the internal c n act, in some embodiments, the corrosion prevention feature includes a aluminum, metallic layer. In some. embodiments, the corrosion prevention: feature inel udes an . epox sealant. [0012] Some embodiments include an electrically insulating envelope barrier enclosing the energy storage cell and the electrolyte, eoallgtsred to prevent contact of the electrolyte and energy storage cell with the surfaces of the cavity. Irs some . embodiments* the leads extetvd through, the barrier from the energy storage cell to the internal contacts. In some embodiments, the barrier is heat sealed to die leads to prevent leakage of electrolyte from within the barrier envelope.

[0013] In some embodiments, the body Is a chip (e.g., a ceramic based microchip package) configured for surface mounting on a printed circuit board, wherein, when so mounted, the chip extends ho more than ■■ about 5.0 mm, : 4,0 mrn, 3.5 i¾ip, 3.0 ram or less above the major surface of die printed circuit board.

[0014]: In some embodiments, the apparatus may have an operating voltage of . at least .2.0 V,, 2.1, V, 2.2 V 2.3 ¥, 2.4 V, 2.5 V, 3,0 V, or more, hi same embodiments, the apparatus may have a capacitance of at least 300 mF, 400 rnP, 450 mF. 500 rnF or more, hi some embodiments, the apparatus may have an energy density of at least 4,0 J¾e : , 4,5 ¾co< 5.0 , J/cc, 5,1 J/cc or more, la some embodim:ents t the apparatus ma have a peak: ower density of at least 15 W/ce, at least 20 W/cc, at least 22 /ee, or more, la some emlwditnenis, the apparatus ma have an equivalent series resistance of 500 mO or less, an. equivalent series resistance of 00 m or less, an equivalent series resistance of .300 v Q or less., in some embodiments the apparatus hiay have ah operatin temperature rating of at least 65 * C. 75 ° C, 85 a C, 100 ° C, 125 ° C, 1.50 0 C. or more.

[0015] In some embodiments, the apparatus may have an operational Sifedme of at least 2,000 hou s at an operating voltage of at least 2.0 V (or at least 2.1 V o more) and an operatin temperature of at least 6S Q C while exhibiting a capacitance degradation of less that 30% and .an equivalent series resistance increase of less than 100%, In some embodiment , the apparatus ma have an operational lifetime of at least 1,000 hours, at least 1,500 hours, at least .2,000 hours, at least 3,0CK) hours, or more at an operating voltage of at least 2.0 V (or at least 2.1 V or more) and an operating temperature of at least 85°€ while exhibiting a capacitance degradation of less than 30% and an equi valent series resistance increase of less than 100%. to some embodiments, the apparatus may have an. operational lifetime of at least. 1,000 hours, at least 1,5.00 hours, at: least 2,000 hours, at least 3,000 hours, or more at an operating voltage of at least 2.0 V (or at least 2.1 V or more) and an operating temperature of at least 100° C while exhibiting , a capacitance degradation of less than 30% arid an equivalent series resistance increase of less than 100%. In some embodiments, the operational lir me occurs alter the apparatus has been soldered to a prh ied cirevjit board; using a refiow process having at least one, two, three, feur, : five, six, or more temperature cycles of at least 30 seconds, 60 Seconds, 120 seconds. 180 seconds, 240 seconds, 360 seconds, or more with a peak teniperatore of at least 100 ° , 200 °C, 250 °G, 300 °C, or more,

[00.16] In some embodiments, tire energy storage cell provides power back u : power) to at least one additional element mounted to the circuit board (e.g., a solid state memory device).

[0017] in some embodiments, the electrolyte: includes an Ionic liquid which in some embodiments may be mixed with a salt and/or a solvent, e.g., of the types described herein .

[0018] la some- embodiments, the housing Body is hermetically sealed. Fo example, in some embodiments a metallic lid may be attached (e.g., welded) to a ceramic element to form the housing body, as described in detail herein.

[0019] In some embodiments, within the cavity of the housing body containing e: energy storage ee a total concentration of halide ions is kept to below about 1 ,000 ppm, 500 ppm, 200 ppm, 100 ppm or less : , energy storage eel! metallic species irnpiirities are kept to- below about 1 ,000 ppm, 500 ppm, 200 ppm, 100 ppm or less, in some embodiments, within the cavity of the housing body containing the energy storage cell Impurities of hromoethane,: chlor ethane, 1 -bromobutane, 1-cIiiorohutane, I- meihyllmida¾olej ethyl acetate, and methylene chloride are kept to below about 1,000 ppm, 500 ppm, 200 ppm, 100 ppm or less. In some embodiments, withi the cavity of the housing body caiitaining: the : energ storage cell moisture is kept to below about J ,000 pptn, S00 ppm, 20 ppm, l OO ppm, 50 ppm, 10 ppm or less. In some embodiments, within the eavity of the housing body con taining the energy storage cell halide imparities are kept to below about 1 ,000 ppm, 500 m, 200 ppm, 100 ppm, 50 ppm, 10 m: or less,

[0020] I some embodiments, the apparatus includes a single energy storage cell contained in the sealed housing body, kt other words, one energy storage cell per chip. In other embodiments, eac chip may include multiple energy storage cells, e.g., disposed togeth r within a common cavity, or in separate cavities, or in a combination thereof [0021 ] la another ' aspect, a method is disclosed of making an energy storage apparatus suitable for mounting on a printed circuit board using a solder reflow process. In some embodiments, t e: method includes: forming art electric double layer capacitor (EDLC): energy storage cell, including a stack of alternating electrode layers and eieciricai!y msolating separator layers; disposing the energy storage cell within a housing body, the body including a positive internal .contact and negative internal contact disposed: within the body; at leas partially filling the bod with electrolyte to wet the electrode layers electrically connecting a positive lead from a first group of one or more of the electrode layers to the positive internal contact; electrically connecting a negative lead from a second group of one or more of the electrode: layer to the negative internal contact; and sealing the housing body with the energy storage cell disposed within the cavity. In sontC: embodiments, sealing the housing body includes hermetically sealing the hotising body (e.g., to provide lo w impurity conditions as described herein),

[0022] In another aspect, a method, of is disclosed of providing energy to a device mounted on a printed circuit board, in some enibodi meet, the method ma me ide mo inti ng .me apparatus . of the type described herein to the printed circuit hoard using a solder reflow process and repetitively charging and discharging the apparatus at an operating voltage and operating temperature t provide energy to a device in some embodiments, the operating voltage is at least 2,0 V, 2.1 V, 2.2 V s 2,3 VV ' 2,4 V, 2.5 VV 2, 75 V, 3.0 V or more.

is at least 65 °C, at least 85 "C^ at; least 100€ °, at least 12S a C, at least 150 , or more, in some embodinientSv the method inctno¾s repetitively charging and discharging the apparatus at an operating voltage and operating temperature to provide energy to; a device for at least 2,000 hours while the apparatus exhibits a capacitance degradation of less than 30% and an equivalent series resistance increase of less than 100%.

[0023] Various embodiments may include any of the features and elements described herein, either atone or in any suitable comb natio .

BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The features and advantages: of the invention, are apparent from the following description taken conjunction with ' the accompanying drawings in which: [0025] FIG. 1 is an schematic diagram depicting aspects of an exemplary ultracapaeitor ;

[0026] FIG, 2 is an: isometric view depicting art embodiment of a chi cap according to the teachings herein;

[0027] FIG , 3. is e loded view of th chip ca of FIG, 2.(fwim. an. p sing, angle);

[0028] FIGS. 4A, 4B and 4C, collectively referred to herein as FIG, 4, are illustrations of electrodes for the ch p cap of FIG. 2;

chip cap of FIG; 2 ;

[0030] FIG. 6 is an. isoffierie: view depicting the storage cell for the chip cap of PIG. 2; [0031 ] FIG- 7 an isometric view depicting a body forthe chip cap of FIG, 2; [0032] FIG. 8 is a bottom, view of the body of FIG. 7;

[0033] .FIG. 9 is aa isomeric view depicting the storage cell of FIG. 6 disposed, within the body of FIG. 7;

[0034] FIG. 10 is a partial schematic vie w of a cross-section of the body of FIG. 7 in. a state of prepatatiofj for incorporation of the storage ceil;

[0035] FIG. 1 1 is a top- down view of the- assembl - of FIG ' . 9;

[0036] FIG. i:2.ls-:a-er0SSTseeti ftal- view- -of the assemblyshowftin FIG. 11 , the cross-section taken along an axis labelled ;

[0037] FIG, 13 is cap of FIG,

[0038] FIGS. 14; through i 6 are graphs depieting aspects ofperforrnanee data for an embodiment of a chip cap; [0039] FIGS. J7A through I 7B are graphs depicting aspects of performance data for an embodiment of the chip cap ;

[0040] FIGS. 1 A through !SS are graphs depicting aspects of · performance data for an embodiment of the chip cap;

[0041] FIG. 19 is a .schematic: diagram depicting systems for making use of the chip cap of FIG. 2 ; and

[0042] Fig, 20 is a schematic diagram depicting a process flow for making the chip cap of FiCS, 2. DETAILED DESCRIPTION

[0043] Disclosed herein ' &a& - ' $tot^ '' d&w& useftil. o¾ rovjdi.ag--etiei¾ to a. circuit board. Generally, the energy storage device, referred to as a "ch cap,' ' is a specialized, ultracapacitor configured in a form factor suited for surface mounting to the -circuit board. Advantageottsty, the chip cap is capable: of withstanding the demands: associated with manufacture an asseuibl of board mounted circuits and subsequently delivering superior performance over prior art energy storage, devices,

[0044] Prior to introdueiag the energy storage device, some terminology is provided to establish context for the teachings, herein.

[0045] Embodiments of the energy storage: device ma he referred to herein as - u!tracapacttor-' and further as a "chip cap. ' " The term, "chip cap" generally refers to embodiments of an ultraeapaeifor that are suited to sur ace mounting on printed circuit board,(l*Cf¾, -Generally, the ter "chip cap" is with reference to conventional microchip: are mountable to a circuit board (i.e., the chip) and the iiltraeapae tor technology that is included therein.

[0046] As used herein, the term "reflowable" generally ref¾rs to

device disclosed herein to survive manufacturing processes associated with surface mounting to circuit board. The manufacturing processes may involve soldering (i.e. ? a reflow process) where process: temperatures Include heating: cycles that heat components upwards of 13 degrees Celsius, in some cases to 200 degrees Celsius, and possibly to 220 degrees Celsius, or more. Such heating cycles may last for a duration of 30, 60, 90, 120, 240. 360 seconds or more. Thus, as discussed herein, '"reflawabJe" component is one that can withstand heating cycles appropriate for incorporation of me component into the board mounted circuit without experiencing substantially degraded future performance. In. some embodiments, the components described ' herein may withstand multiple such refiow cycles, .e.g., two, three, four, five, or more such cycles.

[0047]. In some embodiments, a reflowab!e component ma actually exhibit degraded performance, however, the degradation ma be expected an,d the final installation (i.e., assembled or mounted component may exhibit a predicted level of performance that is deemed acc eptable .

[0048] Friorto introducing the chip cap* some general aspects of an electrochemical double-layer capacitor (EDLC) are set forth below and in conjunction with FIG, 1 , Examples presented herein are not limiting of the technology,; are merely illustrative and provided for purposes of explanation..

[0049] FIG. 1 depicts concepts associated with m exemplary embodiment of an e!ectrochemieai double-layer capacitor (EDLC) 10, also referred to as an '¾ί.¾€3ρ3&ΐί π ,' The idtracapacitor 10 includes tw electrodes (a negative electrode 3 and a positive electrode: 4), each electrode 3, 4 h ving a double layer of charge at an electrolyte interlace. In some embodiments, a ' plurality of electrodes is included. However, for purposes of discussion and illustration, only two electrodes 3, 4 are shown in FIG, 1 , As a matter of convention herein, each of the electrodes 3, 4 use a carbon- based energ storage medi i (as discussed further herein) to provide energy storage.

[0050] Each of the eieetrode .3, : 4 incl ude respective curren t collector 2. M the ultracapacitpr 10,: the electrodes 3, are separated by a separator 5. I» general:, the separator 5 is a thin structural material (usually a sheet) used to separate the electrodes 3, 4, into two or more compartments.

[0051] At least om .form of electrolyte (S is included. The electrolyte 6 fills void spaces i and between, the electrode 3, 4 and the separator 5, In general, the: electrolyte. 6 is a chemical compound that disassociates into electrically charged ions. A solvent that dissolves me chemical compound may be included m some embodiments. A resulting electrolytic solution conducts electricity by ionic transport.

[0032] As a matter of convenience,, a combination of the electrodes 3, 4, the separator 5 and the electrolyte 6 are referred to as a "storage cell 12." In some embodiments, the term "storage ce ' U" merely makes reference to the electrodes 3, 4 and the separator 5 without the- electrolyte 6. [0053] Generally, the exemplary ultraeapacitor 10 is packaged int a housing 7 (which may he referred to simply as the ^housing 7") m a manner discussed further herein. The housing 7 is hermetically sealed, In various examples, the package Is hermetically sealed b techniques m king use. of laser, ultrasonic, and/or welding technologies. The housing 7 (also referred to as a "case") iiieludes at least o e emutiai 8. Each terminal 8 provides electrical ccess to eitergy stored in the energy storage media 1.

[0054] In the ' e emplary EDLG 10. the energy storage . media 1 ma be provided by and include activated c r¾.ot¾, carbon fibers-, rayon, graphene, aerogel, carbon cloth, and/or carbon nanptubes. Activated carbon " electrodes can be manufactured ^ tor example, by producin a carbon base material by carrying out a first acti vation treatmen to a carbon material obtained by carbomzation of a carbon compound, producing arfermed body by adding a binder to the carbon base: materia!, carboniiemg the fo med body, and finally producing an active carbon electrode by- carrying out a second activation treatment to the carbonized formed body.

[§055] Carbon fiber electrodes ca be ' produced-,, for example, by using pape or cloth pre-ibrm with high surface area carbon fibers.

[0056] In one specific example, multiwail carbon nanotobes (MWN T on a variety of substrates using chemical vapor deposition (CVD) are fabricated for use in. the electrodes 4, In one embodiment, low-pressure chemical vapor deposition (LPCVD) is used. The fabrication process may use a gas mixture of acetylene, argon, and hydrogen, and an iron catalyst deposited , on the substrate usi g electron beam, deposition and or sputtering deposition.

[0057] In so e: embodiments * , material used t ibrm. the energy storage: media 1 may include material other than pure carbon. For example, various formulation ' s of materials for providing binder may be included, in general, however, fee energy storage medi 1 is substantially formed of carbon, and is therefore referred to as a ''carbonaceous material"

[0058] In short, although formed -predominantly of carbon, the: energy storage media I may include an form; of carbon, and an additives or impurities as deemed appropriate or acceptable,, to provide for desired functionality as the energy storage media 1 , [0059] The electrolyte 6 includes -a pairing -of a plurality of cations*) and anions 1 1 , and, in some embodiments, may include the solvent. Various combinations of each may be used. In the exemplary E LC 1:0, the cation . 1 may include

dim t iyl~3-propytimida2olium, 1 ,3~bis(3-cyano^r py f )imidazo-iiu, I ^ietboxyit ida ' zolian^ 1- butyl-l -methytpiperidiniiini, l-butyi^J-dinietlrj-liniidazolmm, l-biityS-3-methylimidazoli.ui¾ l~ butyM-methylpyridiniurri, ί -butyipyridiinari^ l~decy!-3-met iylimida olium, l -ethyl-3~, methylimida¾olium, 3-methyH -propylpyridmiurn,

bisCtTifli >rometliylsidt«nyi)iniide and combinations thereof as well as ther equivalents as deemed appropriate.

[0060] In the exemplary EDLC 10, the anion 9 may include bisitrifluofo ietha eMil onate^rnidei . trisj(iriiluomm^hanesulfouaie)ni thide ( dieyanami.de, ietrafluoro orate, ' .hexailuorophosphate, trifiuordraethanesiiltbnate, Ms(pentafi roetlm^^ thioeyanate, tetrafkioroborate salt, anothe potential salt is tetTaethylaninioEiuffl teb¾fiuorobora.ie and. combinations thereof as well as other equivalents as deemed appropriate..

[006 Ij The solvent m include aeetonitriie, apudes, benzonitri.Ie, bniyrOl cione, cyclic ether, dibotyl carbonate, diethyl carbonate, dieihylether, dihiethoxy ethane, dimethyl carbonate, dimethyliormamide, dlmetbylsnlfone, dioxane, dioxolane, ethyl formate, -ethylene carbonate, ethylmethyl carbonate, lactone, linear ether, methyl formate,, methyl propionate, nitn!e, nitrobenzene, : nitroniethane, n-rhethy!ifyrrolid ne, propylene carbonate, sulfoiane, sulfone, tetrahydrof uratt, ;tetrameihy¾2ne sidfone, thiophene, ethylene glycol, diethyiene glycol, riethylepe glycol, polyethylene: glycols, carbonic acid ester, y-butyrolactorie, nitrite, iricyanohexane, hutyronitrite ethylene carbonate, methylene diehioride any combination thereof or other materiai(s) that exhibit appropriate performance charaetertsdes,

[0062] The separator 5 may be fabricaietl from non-woven glass. The separator 5 may also be fabricated from fiberglass, flouro-polymers, TeSfon® (PTFE , and ceramics. For example, usin non-woven glass, the separator 5 may include main fibers and binder fibers each having a fiber diameter smaller than, that of each of the main fibers and allo wing the main fibers to be bonded together. [0063] The foregoing description of concepts related to an uiiraeap¾eitar 10 provide context for the chip cap disclosed herein and discussed below,

[0064] In/the il!ostraiicTO ^ !OO inclndes a body IG! and a Hd 102 mounted thereto. Disposed within the body 101 and lid 102 is a volume 103 thateontatas a chip cap storage cell 105. iflsmersed in or wetted with electrolyte 126, The body 101 may also be referred to as a part of the housing 7, or as a if eoutai«er" or a "package" and by other similar terms . Getieraiiy, the chip cap storage cell 105 operates by principles set forth above with ' regard, to the ultfaeapacitor storage cell 12, Further aspects of the chip cap storage cell 1:05 (hereafter: referred to as the "storage cell 105" are set: forth below.

[006S]: In some embodiments the body 101 and lid 102 mounted thereto may have dimensions chosen to be suitable for microelectronics applications . For example, in some embodiments, body 101 and lid mounted thereto are configured for surface mounting on a printed circuit board, wherein,, when so mounted, the body 101 and lid 102 extends no more than about 5,0 mm, 4.0 nirn, 3.S mm, 3,0 mm. or less above- the major surface f the printed circuit board:. In some embodiments the body 101 ha a maximum, lateral dimension of less tha about 5,0 cm, 4,0, cm, 3,0 cm, 2,0 em, 1 ,0 era, 0.5 em, 0,25 an or less, in some embodiments the body 101 occupies a lateral surface area of less than 25,0 cnv"2, 16,0 em A ¾ 9,0 em 2,. 1 ,0 cm^, 0,25 em'¾ 0,1 ¾ηι ; , 0.075 crn^2, 0,05 etn A 2 or less,

[0066] in some embodiments a side of the lid 102 facing the interior of the foody .10.1 may include a protective coa ing or layer (e.g.. of a polytne r plastic material such, as PTFE or polyi.m.ide} to prevent unwanted physical or electrical contact between, the lid and the storage cell. 1.05,

[0067] The process of building the chip cap 100 begins with, fabrication of the storage cel 105 and: preparation of the body 101 ,

[00.68] The first step in building the storage. cell .105. involves preparation of die electrodes. An example of a two-sided electrode 600 is shown in FIG, 4 , Generally, and as shown in FIG, 4A, each two-sided electrode 600 includes a current collector 2 with; energy storage media 1 disposed on either side thereof [0069] Some embodiments ' of electrodes include five main .components. The components include an aluminum current collector 2, a polym r primer layer which is provided to promote adhesion of; energy storage media I (also referred to as " ct ve material"),: and. a ffiree ^ eomponent active material. The active material may include, for example, activated carbon (to enhance capacitance), carbo black (to provide high conductivity and reduce equivalent series resistance ESR)}, and a polymer binder (to bold the powders together). :

[0070] In some embodiments, carbon nanotubes (GNTs) are used as an alternative: material to provide for the adhesive and the cohesive matrix. That is, the : primer may be: replaced by a CNT. adhesion layer (AL), and the polymer binder for the. active material may also be rep faced by GNTs. The CNTs may also reduce or replace the carbon black as conductive aid. The resulting electrodes (i.e,, electrodes: that do not include a polymer or other ' adhesive material) are "hinder- free," Such hinder tree electrodes may advantageously operate at extreme conditions: (e.g., high voltage and/or temperature) without degradatio due to electrochemical reactions between a binder and surrounding material (e.g.., electrolyte). Not wishing to he hound by theory^ in some embodiments it is: understood that electrostatic attraction (e.g„ Van de Waal's: bonds) between the carbons in the binder free electrode provide sufficient adhesion and cohesion to maintain the integrity of the electrode even unde harsh conditions. For example, in some embodiments the binder free electrode may exhibit little or no deleterious de lamination even when subjected, to reflow processes (as detailed herein) or when subjected to operating voltages of at least 2.0 V, or at: least XI V or more: at operating temperatures of 65 *C, 85 ;0 5 100 °€, 1:25 °C, 150 ¾ or more.

[0071 ] In some embodiments of hinder free electrodes, the active media mcludes ictivated carbon (or other types

and " the active layer is a matrix of carbon nanottthes (CHT) without any other fillers. Advantageously, (e.g. to reduce manufacturing cost) in some en bodiments the concentration by weight of NTS Irs the active. layer may be relatively low, e.g, 5 less than 51)%, 40 % 5 .30.%, 20%, 10%, 7,:5% 5 5.0%, 2.5% or less depending o the desired performance characteristics of the electrode.

[0072] In some ernbodimsnts, the matrix is achieved b dispersing actjva carbon nder and/or a powder that includes carbon nanotebes (CNT i isopropyl alcohol using t ltrasomcation: and sufficient energy to de-bundle the carbon nanotubes (CNT) fom each other. A successful dispersion may be characterized by material separation and appearance. For example, whether the carbon nanqtube (C!SST) material separates from the solvent and whether a, smooth ' filM appears when dried,

P073J Cohesive and adhesive strength of the active media and acti ve layer respectively are both, influenced by the dispersion quality of the carbon nanotubes (CNT) .. in their slurries (as well as cliaiaeieristics of the carbon iianotube (CNT), drying time, layer thickness, substrate material, substrate texture, etc.). The dispersion of the carbon nanotubes (CNT) is influenced by the choice of solvent (and carbon nah.otu.be (GNT) characteristics; concentration; ■■ material purity; surikctafit: use; batch size; dispersion settings, e.g. sonicator amplitude, duty cycle, temperature, probe depth, stirring quality; etc ).

[0074] Adhesion of the active media- to ' the current collector- ' 2 may be improved by addition of art adhesion layer (AL of carbon nanotube (CNT) s to the current collector 2, This may be done by casting and drying layer of active media on a stainless steel (SS) plate, compressing a different plate with verticall aligned carbon nanotubes against an aluminum carbide coated current collector 2 using a roll-to-roll machine to -tra sfer the carbon nanotubes CNT), and then pressing the plate: with active media against the current collector 2/carbon nanotube (CNT) layer to form an. electrode,

[0075] in some embodiments, production of the electrode is accomplished by easting : thin layer of carbon nanotube (CNT) slurry directly onto the current collector 2, . letting the thin layer dry, then easting the active .media slurry on top.

[0076] Several techniques may be employed to place all the layers of active media onto the electrode. In. one embodiment - involving .calendaring*, easting and drying a layer of active media on stainless steel (SS) plate i performed, then compressing different plate with vertically aligned carbon nanotubes (V ACNTs) against an aluminum carbide coated current collector 2 to transfer the vertically aligned carbon nanotubes (VACNTs), and then pressing the plate with the active media against the tuminnm carbide coated current collector 2 hosting the vertically aligned, carbon nanotubes (VACNTs) layer to torrn an electrode.. In another embodiment, a thin layer of carbon iiaftotubes (CNT) is cast as a slurry directly onto the current collector 2, dried, and then the active media is cast as a shirty tat top -of the thin layer of carbon naaotufees (GNT).

[0077] Selection of acti vated carbon includes evaluation of capacitance versus lifetime. That is, it has been found that there is often a trade-off between the highest capacitance materials and the longest lifetime materials. Generally, it was found thai the quality of activated carbon should be empiricall de nninsd. it was found that w th regard to active material carbon nanotobe (CNT) powder selection; longer carbon nanotube (CNT) result in a stronger matrix; a lower wall count in. the carbon nanombes ( HT j$ better in.fetms of density efficiency; high purity of carbon nanotube (CNT) avoids reactive content; pores can oxidize to expose the interior surface of the carbon nanotube (CNT), but .may result in addition of impurities. With regard to adhesion layer powde selection, , it was found, that: for length, cohesion, versus adhesion, -should, be -.evaluated as carbon, nanotubes (CNT) that are too long will self-adhere too well and peel off the current collector 2; and a thinner layer of GNT mitigates the risk of peeling off the current collector 2, With regard to calendering techniques: the carbon nanotube (CNT) matrix ma be "activated" with pressure, becoming less powdery after the CNT have been stuck together, higher pressure gets better density, but there are diminishing returns; starting the calendaring process with low pressure and working up with addition passes seems to help adhere the layers in some eases. Care should be taken to avoid pyerworkuig. as this can lead to delamination. More calendaring passes can increase density slightly, but the risk of overworking or wrinkling the current collector 2 will increase.

[0078] The adhesion layer ma include carbon naPotubes: (CNT), carbon: nandfibers, metallic nanowires, and ceramic rsanofibers> For active material cohesion carbon nanotubes (CNT) may he used, as well as carbon nanofibers, metallic nanowires, and/or ceramic nanofibers. Tor active material energy storage:; activated carbon may be used, and or carbon black, additional carbon nanoiribes (CNT), soot, jet black, buekeybaS!s, ful!erenes, graphite, graphene, nanohoms, nanoonlons, as. well as other forms: of carbon. Carbon nanotube CCMT) used could be siug!e- wa!led, double- walled, multi-walled, of any length, diameter^ pwity^ crystaiiinity, or other aspect as deemed appropriate.

[0079] In various embodiments, dimeasions of the electrode range between, about 2:0 : p,m up t about 35 pm. In various embodiments, at thickness of the current collector is in a range of between about 10 ,οι to about 50 uni, in various mbodiment, a thickness of the adhesion layer is between about 2 ι¾ to about 10 μτη or more. A thickness of the active material disposed onto the adhesio : layer may be between about 5 μητ to about 150 μιη or more, in . some embodiments, the carbon nanotiihes (CNT) used in the adhesion layer are between ί m to about 200 nm diameter, about 1 pro to about 1:000 μτή in length, and have a wall ..count that is betwee about 1 to 100,, I some embodiments, the carton nanotobes {CMT) used in the active material are between. 1 nm to about.200 nm diameter, about 1 μηι to about 1000 um in length,, and have a wall, count that is between about 1 t 100. In some embodiments, the active material includes roughly spherical particles, exhibiting, a diameter of between about 2 um and about .30 pro.

[0080] In some embodiments, compression of the energy storage media is applied after drying. Generally, this helps lock the carbon nanotubes (CNTs) in place. A roll press, hydraulic press, o other type of press may be used. Care should be takeii to avoid damage of the current collector,

[008 i ] tn various embodiments, tire electrode layers may be formed usin any of the techniques descried in International Patent Publication No. WO/201.8/ 10265.2 published June 7, 20I8, : the entire contents of which are keorporated herein by reference.

[0082] In order to provide for current collection from a group of positive electrodes and from negative electrodes., a plurality of left-handed (FIG. 413) and right-handed (FIG. 4€) two-sided electrode 600 are produced. Generally, each of the left-handed or right-handed two-sided electrodes. 6:00 include the energy storage media I disposed on -either side, thereof and include a conductive tab 60¾ which is substantially ftee of energy storage medi 1.

[0:083] Electrodes: may be piniehed from the sheet; of material using a suitable press * The. electrodes punched from the sheet of material exhibit: appropriate dimensions for use in the storage cell I OS. Once the dimensional electrodes have been cut, they may be prepared. Preparation of the diffiensiooal eieettode may include, for example: calendaring each electrode in order to assure retention of the energy storage media 1; trimming of edges; and a heat treatment to encourage migration and reduction of any iinpiirities. After preparation, the electrodes may - ' be transferred to a suitable environn erit in re arati n for assembly. [0084] Once tahfieated nd qualified for use, the two-sided electrodes 60 axe included in a stack assembly, in. order to proceed with assembly of the stack, an appropriate separator 5 is- provided. The separato 5 roay be t btieaied from separator material.

[0085] In some embodiments, the separator 5 is cut from a supply of separator material which, in one- embodiment, is a supply of polytelratluoroemyiene (PTFE). PTFE ' is a synrlietie fliiorOpolymer of tetfailaoroethylene (commonly referred to as TEFLON, available from Chemours of Delaware), PTFE is a fluorocarbon solid, as it is a gh-n oieciilar- weight compoun consisting wholly of carbon and fluorine; In the exemplary embodiment, the separator 5 is 25 μ . thick. An example of an active stack assembly with a stogie separators is illustrated in FIG. 5.

[0086]: FIG, 5 depicts conceptual, aspects of a "z-fokf' arrangement of energy storage media 1, m die z-fold embodiment, layers of the separator 5 are formed from a single piece of separator material folded in z-fbkl f shioii. The z-folded separator 5 includes opposing, positive electrodes: 4 and negative electrodes 3 nd associated current collectors 2 folded therein, Generally, as referred to herein, an: assembly of multiple layers of the electrodes, current collectors and separators is re&rred to as a "stack 201 " and may also be referred to as an "active- stack * ' and by other similar terms.

[0087] In order to fabricate a z.~fokl stack 2 1, and once the separator 5 has been cut, a first one of the two-sided electrodes 600 is disposed onto an end of the separator ' 5. The separators is then folded and an opposing two-sided electrode 600 is disposed onto the separator 5. The process continues until a coPipleted slack 201 is provided. In one embodiment, the completed stack 201 includes fifteen two-sided electrodes 600, In this ejtapple, the completed stack2 i will have eigh (8) layers of electrode on the negative sideb and seven (7) layers of electrode on the positive side. In this embodiment, each two-sided electrode 600 has an area of energy storage material 1 that is approximately 6 turn by 8 min. The exposed portion of the current collector 2 that functions as a integrated tab has. dimension that are approximately 1.5 mm by 8 mm.

[0088] Generally * the stack 201 is configured to pro vide a desired levei of electrical performance, ft is not required nor necessar that the stack 201 be provided in . a z-fb d arrangemerit. In some embodiments, each layer of the stack 201 is separated by an individual ' separator 5. In some embedments, each layer of the stack .201 -ma be -contained within an envelope of (i.e., surrounded by) separator material

[0089] Similarly, the entire storage cell 105 may be provided in an envelope of separator material or .other suitable protective barrier (e.g., an electrically insulating therntoplastic or OfJter suitable material), is some embodiments, this envelope may contain me, electrolyte wetting the stack 201, preventing the electrolyte from, coming in contact with elements external to the barrier. I sonte such embodiments, conductive tabs 602 may extend ut through the envelope to provide electrical conirauni catio between the stack 201 and the leads (.J 23, . 124). Alternatively, in some embodiments,, the leads (123, 124 may extend through the envelope for connection to the tabs 602. In general, the envelope . may be sealed around such . electrical Connections (e.g., heat sealed) to re ent leakage of electrolyte out of the envelope.

[0090] In various embodiments, the storage cell 105 may b constructed using any of th techniques described in International Patent Publication No, WO2015102? 16 AS published November 26, 2015 or International Patent Publication No, 02O 16057983 A3 published June 30, 3016, the entire contents of each which are incorporated herein by reference,

[0091 ] In some embodiments, the stack 201 i eonstr eted, by cutting (e.g;, using: blade or a cutting laser) or punching out electrode layers from a sheet of electrode material. The electrode material may Include a sheet of material suited fox use as the curre t collector 2 with energy storage material 1 disposed on either side. Alternating layers within the stack 201 make up the negative electrodes and the positive electrodes. Separator material is interleaved between each layer and wrapped around the final assembly to form the completed stack 201,

[0092] As the stack 201 contains multiple layers of electrodes, multiple conductive tabs 601 are present. The multiple conductive tabs 602 extend beyond the energy storage media I and provide for; making- electrical contact In the: stack 201, the conductive tabs 602 are grouped aecprding to polarity and formed into a single negative lead 1.23 and a single positive lead 124. Collectively, the assemblage of the stack 201 with the negative lead 123 and positive lead 124 provide for the storage cei! 105, An. illustration of the storage cell 105 in. an. assembled form is provided in FIQ, 6, [0093] In some embodiments, grouping of the conductive tabs 602 into a respective one of the single negative lead 123 and a single positive lead 124. is performed . by

conductive leads, prior to assembly of the storage cell 1.05. When; the . storage cell. 105 is di sposed withi the body 101 , the group of conductive tabs -602is welded to a respective pad 1 1.0 (FIG. 7), thus forming a unitar lead (123, 1 4). Welding may be accomplished by, for example, .ultrasonic welding r laser welding..

[0094] ' FiGs 7 depicts aspects of the body.101. The ody 101 of the: chip cap 100 may be fabricated from dielectric: material, included wifhm the body 101 are electrical pads 110 which provide for conducting electrical current from the storage eeli 105 once disposed therein. The electrical pads 1 10 ma also conduct electrical current to the storage cell ' 105. in order to. echarge the chip cap 1.00.

[0095] In the illustration of FIG. ?, the bod 1.01 generally includes a bottom 1 11 and: four walls 1 1 rutiniiig about a perimeter of the bottom 111, ' Thus,, the body 101 provides a container into whic the storage cel l 105 may be disposed. An underside of this exam le of the body 1,01 is shown in FIG. 8.

[0096] As shown in FIG. the underside of the bottom i l l of the body 101 includes electrical contacts: 121 separated by the: dielectric- material 3.20. At least some of the contacts 121 are in electrical communication with the electrical pads 110 and enable communication of energy from the chip cap storage cell. 105 to a circuit board upon which the: chip cap 100 may be mounted. Generally, the energy is communicated fro the electrical pads 1.10 to the contacts 121 through electrical, couductors or vias (not shown) that are contained within the body 101 and surrounded by the dielectric material. 12 i . For example, i some embodiments * the body may contain one o more conductive slabs (e.g., embedded within the bottom 1 10 of the body 1.01) establishing etectricat conununkation between the electrical pads 1 10 and the contacts: 1 1. These slabs may be made of tor exam le, tungsten or other suitable: conductive materials,

[0097] Accordingly, for each of the two-sided electrodes 600, a conductive path is: formed from the current: collector 2, through the conductive tab 60 , through a respective lead (123, 124) to a respective^ electrical pad 1 10, and. then from the electrical pad 110 through ccradnctive vias. within die body 101 to one or more contacts f 21 on the bottom surfece of the body 101. [0098] The interior electrical pads 10 are exposed to the volume 103 (also referred to here in as a "cavity * ') within the body tOl. The lid 102 may include compatible material, such as ceramic or metallic material. During assembly of the chip ca 100, the lid 102 Is heffiieiieatiy sealed to the body 101 by being sealed to seal ring 1 1 , The resultin hermetic seal exhibits environmental integrit by preventing: environmental intrusion into the chip cap 100 as; ell as leakage of electrolyte from the chip cap 100. The hermetic seal includes any type of seal that ftmkes the chip cap 100 substantially airtight: (excludes the passage of electrolyte, air, oxygen, or other gaseous form of materials) to ensure adequate pertormariee for an intended service interval,

[0099] Examples of devices suited for use as the body 101 include those devices in the Surface Mount Device (SMD) p oduct line commercially; available from NTK. Technologies of Nagoya, Japan, Other examples are available from Schoit AG: of Landshut, Ge ma y and Adtech Ceramics Company of Chattanooga, Tennessee,

[00100] In some embodiments, the body 101 is high temperature co-fired ceramic device, ©eneraliy, co-fired ceramic devices are monolith c, ceramic microeleetrouic devices where the eatire ceranik support staicture and any conductive, resistive, and dielectric raaierials arc fired in a kiln at the .same time.

[00101] Typically, co-fired ceramic devices are made by processing a number of layers independently and assembling them into a device as a final step. Co-firing can be di vided into low temperate© (LTCC) and high temperature liTCC) applications; low temperature devices are fabricated, with, the sintering temperature is below 1 ,000: degrees Celsius (1 ,830 degrees Fahrenheit):, while high, temperature is around 1,600 degrees Celsius (2,910 degrees Fahrenheit), Compared to LTCC, HTCC has higher .resistance, conductive layers.

[001 2] HTCC packages generally include multiple layer of almnina oxide (A.I3G3) with tungsten (W) and rnolymanganese (MoMn) raeiallizatiom The advantages of HTCC includes mechanical rigidity and; hermetieity, both of which are important in high-reliability and environmentally stressful applications. Another advantage of HTCC technolog is. thermal dissipation capabilities. [00103] Typical ceramic packages use an alumina ceramic (AfeQj). of which there are varying purity and compositions to support different .applications. A typical ceramic package ma foe composed of 9:0-94 percent alumina,, with, the remaining portion composed of alkaline-earth silicates or other binding materials, such as magnesia (MgO) or silica (Si02), for controlling grain size and bondin the alumina together,

[60104] The bod 10.1 may be provided as a multi-layer ceramic package that has a metallization layer thai carries . power from the storage cell 105 through to the external contacts 121. This metallization layer can be made front tungste (W) or moiyrnangaitese (MdMh) in: the case of High Temperature Gofired Ceramics (HTCC), or gold (An) or copper (Cu)½ the case of Lo Temperature Coflred Ceramics (LTCC).

[0 1 5] Typically, a plating process is performed ov r the metallization layer to protect the metallization layer from, oxidation. Additional plating is not necessary if a metallization process such as a gold. (Au) metallisation process used in. LTCC is employed. Commonly, a plating layer includes nickel (Ni) a a base followed fe a thin ( Γ 3μτη) layer of gold ,{ ' A-u). for oxidation protection. Alternative plating metals include titanium (Tt) and palladium (Pd), The selected combination of plating metals may be with regard to forming strong: and reliable wire .b nds.. .

[00106] Notably,, when the storage ceil 105 is placed within the body 1 1 (FIG. 9), elements of the stack 201 (i.e.. th -curren collectors 2 and the energy storage media 1) may be separated from the body lOl(and or lid 102) fey a layer of separator material. This embodiment referred to as a "isolated: stack," results in substantial protection from potential ' failure due; to short circuiting: of the storage cell 105, In some embodiments, an isolated stack is achieved by providing the storage cell 105 in an electrically insulating envelope, Such as an envelope. fabricated from separator materia!. Once the storage cell 105 has been fabricated, it may be- set aside for subsequent installation into the body 1 1.

[00107] ' The.: body 101 ma be fabricated according to desired specifications (sncn as dimensions, electrical design, environnienial qualification a d: the like). At least one pocket or well ma y be added to confine sealant to an. area .surrounding- h^electtieal- aste 1 10 - [00108] As shown in FIG. 1 , in some embodiments, the electrical pads 1 3 are disposed within respective wells 205. Bach of the wells 205 represents a depression within a top surface of the bottom 1 1 1. Generally, the space provided by each, well 205 may be used to fold away a portion of the respective leads (123 , 124}, thus maximizing the vol tune a vailafele for the stack 201. Note that the term "wells" may be used interchangeably with other terms such as "recessed portion", ''recesses,' ' ^pockets, ' ' nd: Other similar terms.

[00109] Each electrical pad 1 10 may be a homogeneous material. For ex m le, the electrical pad 1: 10 may be one of tiuigsteri ( ), aluminum ( l , gold ( u), or another conductive material, hi some embodiments, the electrical ad 110 is plated with Optional plating material A plating layer, or simply plating 13.1 , may include, for example, gold (Au), nickel (Ni) or copper Cii). In some fu ther embodiments,. he electrical pad 1 10 i layered. For example, the electrical pad 110 may contain an underlying layer of tungsten (W) with an overlayer of nickel (Ni). he overlayer of nickel (N .i) in turn, ha ving gold (Air) pl atin 131,

[§01 10] Generally, the materials used. in the electrical pM I II) and any plating 131 ate selected as a balance of conductivity and low reactance with the selected electrolyte 1 6. Limiting interact! o of the e!ectrol ytc is further achieved b suitable preparation of the body 101. and j oin jog : of the leads (123, 124), Atieast one sealant may be used as a part of the preparation and joming,

[001 1 1 ] Gold (Au).. nickel (Ni), and tungsten ( ) can experience corrosion in the presence of common electrolytes, particularly when under a voltage potential The resulting corrosion at the plating or metallization layer will cause premature degradation of the electrolyte and weld joint decreasing performance of the chip cap 1.00. Accordingly, non-reactive sealant may be used to prevent contact between the plating/metallization layers with the electrolyte. As discussed herein the term "non-reactive*' generall refers to a substance that exhibits a level of reactivity that is considered to provide a comparative performance improvement.

[0011.2] For each of the electrical pad 1 10, conductive leader 210 ma be joined to the electrical pad 110. The joining rnay be by welding, for example. Welding may be laser welding, ultrasonic welding, or resistance welding, in some other embodiments, conductive epo ies may be used to join the conductive tab 210 with the electrical pad 110. In some embodiments, the conductive leader 210 is iornied from alunnuu (AI). The configuration: of the conductive leader 210 can vary depending on, for example, position of a respective electrode and construction of the body S OL

[0 113] in. one embodiment, the conductive leader 2 i i s one of the leads (123, i 24) for the electrode stack 201, In these embodiments, it may be such that only the weld is requited to join t electrode stack 201 to the body 1 Of, Ta another em edment, he corrfuetive leader 210 i an mfes-medlate material that is initially separate irom. the respective lead .123 . , 124) and the electrical pad 1 10. The conductive leader 210 is then joined to the respective lead (123, . 124) after sealant is applied,

[00114] Once the conductive tab 210 has been, joined to the electrical, pad J 10, sealant may ¬ be flowed onto the area sur ounding the pad: 110 and the area around the conductive tab 210. The sealant is then cured. The curing method may involve rise of heat, ultraviolet radiation, water/oxygen, evaporation or by other techniques for curing appropriate sealant materials.

[00115] In. various .embodiments, other sealant techniques may he used. For example, some embodiments * conf rmal layer of sealant may be deposited on desired portions of the package. Generally, the conformaS l yer includes thin film whic "contonns" to the- contours; of the. body 101 to address any imperfections and limit permeability thereof;- The cort formal layer may be provided as a hig viscosity component that flows easily. f 001.163 Generally, for any conf mial coating method used to passiv.ate the Internal electrical pads 1 10» care is taken to keep the eOnl¾rfnal coating from also covering external features, seal ring, and other features as appropriate. I some embodiments, material selected for the c B r al coating , does not er ere with a joining process (such as welding):.

[001 17] In one embodiment, the confomial coating includes a high erriperaiure thermoplastic polyimide, The lugh-teraperatisre thermoplastic polyimide may be provided as a material dispensable through a syringe, exhibiting a viscosity slightly higher than water. The resulting insulating- layer of material may be between about 3-20 μΐ thick exhibit strong bonds with ceramic, aiiroinum : , gold, silicone and other .materials. En some embodiments, the high - temperature thermoplastic polyimide ma include silver or other Metallic flakes to make the material conductive. In one embodiment the high-temperature thernioplastic polyimide is stored at abou t minus 4 degrees Celsius, "worked at ambient temperatures, and subjected to about a cure cycle of about 10 urinates at about 150 degrees Celsius, The cure cycle will cause the bigfa- ierriperaiufe thermoplastic poM ide to crystalline and release most of xcess materials . NMP arid f-fe ) in a gaseous form. An additional, heating cycle, of about two minutes and about 230 degrees Celsius may be undertaken to remove; excess material. The process .results in a. eontormal coating with high Insolation properties and very low thermal expansion,

[001 18] An example of a suitable material is available from MATERiON of Buffalo,. NY ahd marfceted as BONDFLOW, B0MBFL0W includes RM i-methyl-2-pyrrt)lidone (CAS 872- 50-4),

[00119] Once the stack 201 is disposed into the body 101 and electrically connected to. the electrical pads 110, eieeirolyte 126 is added to the remaining volume 103 witfeih the body l O! .

[00120] I» some embodiments, the electrolyte 12 is combination of an ionic liquid, an iani.c salt and a solvent. Generally, the ionic liquid and the solvent are. mixed t gether i.ri order achieve mixture. The mixture may be entirely ionic liquid with no solvent. In some embodiments, the electrolyt is about twenty percent ionic liquid and eighty percent solvent (by volume) , Mixtures- of i sub-ranges may be used.

[00121 ] Generally, the ionic salt may be added to the ionic liquid as an additional source of ionic storage,: with different cation and anion sizes provided to increase efficiency in view of the surface area provided by th electrode. The ionic salt may be added to the mixture in ranges tern about 0 M to 2 M (Molar, or Moles salt/Liter solution).

[00122 Subsequently, the body 101 and storage ceil 105 installed therein may be weighed and then tilled with an appropriate quantity of the electrolyte. The filling may occur, for example, by use of a micro-pipette. Once filled, the bod 101 / storage cell 105 combination may be placed into a low pressure environment (i.e., under a -vacuum). The low pressure encourages migration of the electrolyte 126 into the storage cell 105. Subsequently;, the assembly may he weighed again to ensure an. adequate supply of electrolyte 126. IT the combined body ί() , . storage cell 105 and electrolyte lid 102. The lid 102 may then welded to the body 101. Welding may e accomplished in an inert environment using, for example, a seam welder.

[00123] in rious embodiments, care ' is taken, to avoid unwant d Hilar t es within the volume 103 containing the storage cell 105. In some embodiments, within the cavity of the bousing body containing the energy storage ceil a, total concentration of h¾l ide ions is kept to below 1 about .1.000 ppm, 500 ppm, 20 ppm, 100 ppm or less, In. some embodi.mepts, within, the cavit of the housing body containing the energ storage ceil metallic species impurities are kepi to below about 1 ,000 ppm, 500 ppm, 200 ppm, 100 ppm or less, in some embodiments, witiiin the cavity of the housing ho containing the energy storage cell impurities of bromoethane, eldoreeiltane, i - bramebutane, l^elriorobntane, i-methyli.mida¾oi.e, ethyl acetate, and ' methylene chloride are kept to below ahout 1 ,000 ppm, 500 ppm, ' 200 ppm, 100 ppm. or less. In some embodiments, witimrthe cavity of the housing body containing the energy S or ge cell moisture is ke t to below about 1 ,00 ppm, 500 ppm, 200 ppm. 1.00 ppm. 50 ppm, 10 ppm or less, in some embodiments, within the cavity of the housing body containing the energy storage cell halide impurities; are kept to below about 1,000 ppm, 500 ppm, 200 ppm, 100 ppm, 50 ppm, 10 ppm or less.

[00124] In various embodiments, the electrolyte ma foe any of th types described international Patent Publication O2015102716 A publishe November 26, 2015 ami International Publication No. WO2016204820A2 published December 22, 2016 the entire contents of each of which are incorporated herein by reierence. For example, in some embodiments, the electrolyte ma include a gel or solid state electrol te of the type described in th foregoing references..

[00125] FIG. 11 provides top-down view of the assembly of FIG. 9, In FIG. 1 1 , the storage celt 105 and the body 101 are bisected by an imaginary axis-A. FIG. 12 is a cut-away depiction of the storage cell 105 and the body 101 along Imaginary axis-A,

[001.26] As shown in FIG. 12, the storage cell 1 5 includes multiple layers. Emergent from the multiple layers are multiple conductive tabs 602, In this eross-seetion, the multiple conductive tabs ¾Q are gathered to collectively provide for the negative lead. 123. During assembly, the negative lead 123 i formed into an appropriate shape and joined to : a respective one of the electrical pads 110, the same process occurring for the positive lead 124 (not shown in this cross- sectional view). Subsequently, the ' body 101 is filled with an enibodimeiit of eiectroiyte .126 suited ibr the chip cap 100. The electrolyte 126 wets the leads (123, 124), and the contents of the storage cell 105..

[00127] la some embodiments, the energy storage cell 1.05 may be a-symraeirio.EDLC, with, equal mass of active material provided on the positive and: negative electrodes of the capacitor. However,, having equal electrode masses may prevent the EDLC to have the largest possible specific capacitance ' if -the -sizes- of the- -anions and cations in the electrolyte differ because the electrodes and the electrolyte iay notbe eomple el xitilized. lit some: embodiments this issue eaft be resolved by mass balancing by adjusting the electrode masses according to the size of the ions, e.g. , to increase an EDLC's specific capacitance, in some -embodiments, the stack 201 may include an unequal number of positive and negative electrode layers, to provide improved mass balancing,

[00128] The resulting chip cap 100 is robust to manufacturin processes that typically destroy competitive devices. One example of such a pianufaeturing process is that of 'Yellow." In fellow processes,: components are heated to temperatures adequate to cause flow of solder. Generally, efficient volume production of electronic: components requires use of reflow processes. Further, compact design often make use of surface mount devices to .limit space used by components and are likewise reliant on reflow processing,

[00129] hi one ernoodiment, the chi cap 100 is mounted on a printed circuit board according to a recommended solder reflow profile. A graphic depletion o time versus temperature is provided in FIG, 13, I the example of FIG. 13, temperature is increased at three (3) degrees Celsius per second to a preheat stage (referred to as. a ''soak' * ). In the preheat stage, the chip cap 100 is maintained at a temperature of between about 130 degrees Celsius to about 160 degrees: Celsius for about 100 seconds. The temperature is then increased at three (3) degrees Celsius per second to a reflow temperature (referred to as ''reilow"}. Reflow temperature ma be reache at about 260 degrees Celsius, Generally, the time above 200 degrees Celsius should he less than about 60 seconds, after which the mounted chip cap 1.00 is cooled at a rate of about 6 degrees Celsius or less,.

[00130] In some embodiments, the chip cap 100 may exhibit a capacitance degradation of less tha 10%, 5%, 2.5% or less in response: to one, two, three, four, o more reflow cycle precesses. tn some embodiments, the chip ca 100 may exhibit an ESR: increase of less than 10%, 5%, 2.5% or less in. response to. one, two, three, four, or more reflow cycle processes. In some embodiments, the reflow process may evejt advantageously increase the. capacitance and/or decrease the ESR of the chip cap, operating essentially as a seasoning process for the device.

[00131] Evaluation of the chip- cap 100 has deinonstrated superior perfornHtanee. In order to provide some eoatext for the evaluation, some terminology Is introduced.

[00132] Electrical eircislt theory deals with ideal resistors, capacitors and inductors, each s u ed to contribute only resistance, capacitance or inductanc to the . circuit riowever, ail components have a ηοή-zero value of each, of these parameters. In particular, all physical devices are constructed of materials with finite electrical, resistance, so that physical components have some resistance in addition to their other properties. The physical origins of ES depend n the device in question,

[00133] In. a non-electrolytic capacitor and electrol tic capacitors with solid electrolyte the metallic resistance of the leads and electrodes and losses in the dielectric cause the ESR, Typically quoted values of ES for ceramic capacitors are between 0.01 and 0.1 ohms, ESR of non- electrolytic capacitors tends to be fairly stable over .time; for most purposes real notr-eieetro!ytie capacitors, can be treated as ideal components.

[00134] Alitrnininm and tantalum, electrolytic capacitors with npn solid electrolyte have much higher ESR values, up to several, ohms. Prior art electrolytic capacitors of higher capacitance have lower ESR. ESR decreases with frequency up to the capacitor's self-resonant frequency, A serious problem, particularly " with aiupriniutn electrolytics. is that ESR increases over time with, use. ESR can increase enough to cause circuit malf nction and even component damage, although measured capacitance may remain within tolerance,: While this happens: with norma! aging, high temperatures and large ripple .current exacerbate the problem. In a circuit with significant ripple current, ao increase in ESR will Increase heat dissipation, thus accelerating aging.

[00133] Electrolytic capacitors rated for high-ieniperature operation an of higher qualit than basic consumer-grade parts are less susceptible to become prematurely unusable due to ESR increase. A cheap .electrolytic capacitor may be rated for a life of less than 1000 hours, at H5 C C. Higher-grade parts are typically rated at a few thousand hours ' at maximum rated temperature. If E R is critical, spee catioo of a part with higher temperature rating, "low ESR" or larger capacitance than is otherwise required may be advantageous.

[00136 j Chip caps of the type herein have demonstrated excellent perferriMtic unde challenging conditions, in some embodiments, the chip cap may ha ve an operating voltage of at least 2.0 V, : 2, 1 , V, 2,2, V, 2,3 V, 2.4 V, 2,5 V, 3.0 V, or more. In- some embodiments, .the ebip cap ma have a capacitance of at least 300 mF, 400 mF, 450 mF * 500 mF or more. 1ft some erabodimenis, the chip cap may have ah energy density of at least 4.0 j/ee, 4.5 J/ee, 5.0 J/cc, 5, 1 jVce, or more. In some embodiments, the chip cap may have a peak power density of at least 15 W cc, at least 20 W/ee , at least 22 W/ec, " or more. In some eiBbodiments, the apparatus may have an equivalent series resistance of 500 mil or less, air equivalent series resistance of 400 i or less, an equivalent scries resistance of 300 mQ or less. In sofae embodiments, the apparatus ma have an operating temperature rating of at least 65 0 C, 75 ° C, S5 0 €, 100 ° C, 125 ° C s 150 0 C, or : more. n general, the foregoing performance. parameters may be achieved using a chip ca containing single energy storage celt. Extended performance (e.g., higher voltage operation) may be achieved by using multiple chip caps, and/or chip caps which incorporate multiple energ storage cells.

[00137] I abuse testing, chip caps of the type described herein may demonstrate an operational lifetime of at least 1,000, at least 1 ,500,. or at. least -2,0.00 hours or more at an operatin voltage of atleast 2,0 V or 2,1 V, or more (e.g. , 2.5- V, 3.0 V o above) and an operating temperamre of at least 6 ° C, 85 °€, 100 °C or more while exhibiting a capacitance degradation of less tha 30% and an. equivalent series resistance: increase of less than 100%. In, some embodimen s;: the; foregoing operational lifetime ma be demonstrated after the apparatus has been soldered- to a printed circuit board using re flow process having- at least one, two, three, four, five, six, or more teniperatore cycles of at least 30 seconds, 60 seconds , 120 seconds,: 180 seconds, 240 seconds, 360 seconds, or more wit : a peak temperature of at. least 100 °C , .200 ¾0,. 300 *C, or more. Advantageously, the foregoing level of abuse test performance, is expected to correspond to: operation lifetimes: of much greater than 2,000 hours under non-abuse conditions. For example,:, in some typical applications (e.g,, providing hold up power tor solid state drives in enterprise computing, environments) the chip cap may have an operational lifetime: of 5,000 hours, 7,500 hours, 10,000 hours, 12,30( hours, or more, even under conditions requiring thousands, tens of thousands, hundreds of thousands, or even millions of charg and discharge cycles.

[00138] FK3S, 14 through 16 depict aspects of performance for n embodiment of the chip cap 100. FIG. 14 dep cts ESR performance data for a .sample chip cap mnning at 85 *C . As shows in the graph, for 3800 hours at temperature, ESR degradation of the. Chip, cap performance is 98 percent. Comparati ve data is provided in FIG, J 5, which shows a: substantially greater ESR degradation for a prior art device. Additional performance dai for the chip cap ts provided in Fid, 16. in FIG. 16, capacitance degradation data at 8$ °C is only is 72%: of the initial eel! performance^, after 3800 hours of testing,

[00139] .FIGS, IJ through. 17B depict aspects of performance for an embodiment of the chip cap 1: GO. FIG, 17 A depicts ESR performance data for sample chip cap running at 85 °C at a voltage of 2.1 V. As shown in the graph, for 2,500 hours at temperature and. voltage, ESR. degradation of the chip cap perfonnane© is less than 40% percent,. Additional performance data for the chip cap is provided in FIG. Γ7Β. I» FIG, 17B, capacitance degradation data at 85 a G at voltage of 2,1V is less than 14% of the initial eel! . performance, after 2.500 hours of testing. ote that testing was preformed after successfully subjecting the chip cap to a solder reflow process:.

[00140J FKiS, I8A through 18B depict aspects of performance for an embodiment of the chip cap 100, FIG, 18A depicts ESR performance data for a sample chip cap running at I00 °C at a voltage of 2,iV. As shown in the graph, for 1 ,500 hours at temperature and voltage, ESR degradation of the chip cap: performance is less than 65% percent dditional ' erformance data f6^ : ^e : cfeip.eapJs.provide^,in,pIQ. 18B, In. FIG, 1 SB,, capacitance degradation, data at 100 °C at a voltage of 2. I is less than 1.4%: of the initial, cell performance, after 1 ,500 hours of testing. Note that testin was preformed after successfully subjecting the chip cap to a solder reflo process.

[00141 ] Referring to FIG, 19, there are shown examples of computing devices 500 that may make use of the chip ca 100. The computing device 500 may he a y one of a personal computer. (PC) 501, a laptop 502, a tablet 503, a mobile device (such as a smartphone), and a server 505:, Other types of computing, devices may be included. Examples include controllers for automotive systems as well as industrial systems, residential systems (such as appliances, home electronics and others). In short, die■computing devices .making use of the chip cap 100 may include just about any electronic device where board level power Is desired (e.g., solid state drives used in enterprise computing)..In some ■■ embodiments, e.g., where the chip has an perating temperature rating of ίΟΟ ¾, 125 °C* 150 "C, or more, the chip cap m y be used in extreme down hole conditions know in field of oil and gas exploratio .and production,

[00142] the illustration shown, the chip cap 100 is used to: supply power to computer memory 501, The memory 510 may be any type of memory. ' Not show are power converters and controllers appropriate for converting power from the chip ca 100, as such devices are known in the ait

[00143] Referring , to FIG. 20, a process flow is shown tor assembling a chip ca of the type disclosed herein. In step 2001 an. electrode roil is provided. The electrode roll may be, a double- sided electrode roll having carbonaceous energy .storage media on opposite faces of a metallic foil current collector. I step 2002 a portion of the carbonaceous energy storage media is removed (e.g., vi scraping) to expose strips of the current collector, in step 2003, right and left handed electrode layers are punched or cut from, the .roll, with conductive tabs formed f om the exposed portions of the roll, in step 2004 the punched electrode layers are assembled wit a separator to form a stack of the type described in detail herein. In step 5. any exeess separator is cut and fhc stack is secured, such that conductive tabs extend from the stack, in step 2006 the electrode stacks are vacuum dried to remove moisture. In step 200? the stacks are -transferred, into the open body of a. respective package. In step 200S ? electrical connections are made from the stack to

In step 2010 electrolyte is- ' dispensed to wet the electrode layers of the stack, i n step 2011 a lid is placed on. die package. I step 201. the lid i welded to the package to form a hermetic. seal In step 20 IS the finished chip cap undergoes visual inspection and electrical testing. In ste 2014 the chip caps are packaged, e.g., by taping and reeling the packages in a format suitable for pick and place ^installation tech iques ' familiar in the art.

[00144] <3e«etaUy, the term ^.memory" as used herein refers: to the computer hardware integrated circuits that store infonnation: for in niediate use in a computer and is; synonymous wit the: term ''primary storage." C m uter: memory operates at a high speed, for example r dom- access memory (RAM), as a distinction from storage mat: provides slow-to-aeeess information but offers higher capacities.

[00145] The ternis " e ory "primar storage," "main memory," "system memory" arid other similar terms are often associated with addressable semiconductor memory, i. . integrated circuits that include silicon-based transistors, used for example as primary storage but also other purposes ' in computers and; other digital electronic devices. There are two main kinds of semiconductor memory, volatile and non-volatile. Examples of non-volatile memory are flash memory (used as secondary memory) and ROM, PR9M, EPR6M and EEPROM hiemory (used for storing firmware such as BIGS). Examples of volatile memory are primary storage, which is typically dynamic random-access memory (DRAM), and fast CPU cache memory, which is typically static random-access memory (SRAM) that is fast hut energy-consuming, , offerin lower memory area! density than DRAM.

[00146] Volatile memory is computer memory that requires power: to maintain the stored information. Most modern semiconductor volatile- memory is either static RAM (SRAM) or d>iiamic RAM (DRAM). SRAM retains its contents as long m the power is coi ec-ted.. Dynamic RAM is more complicated for Interlacing and control, needing regular refresh cycles to preven losing: its contents,,

[00147] Non-volatite memory is compute memory that can retain the stored information even when not powered. Examples : of non-volatile memor '. include read-only memory (see ROM), flash memory, most types of magnetic computer storage devices (e.g. hard disk drives, floppy disks and magnetic tape), optical discs, and early computer storage methods, such, as paper tape and punched cards .* - Forthcoming non-volatile memory technologies include FeRAM:. C RAM. PRAM, STT-RAM, SO OS, RRAM, racetrack memory; KRAM, 3D XPoint, and millipede memory.

[00148] A. third category of memory is "semi-volati le." The term "semi-volatile" generally describes a memory which has some limited noh- volatile duration after power is remo%¾d, but then data is ultimatel lost, A typical goat when using a semi -volatile memory is to provid hig perlarmance/dnrability etc, associated With volatile memories, while providing some benefits of true non-volatile memory. [00149] A solid-state drive (SSD) is a solid-state storage device thai uses integrated, circuit assemblies as memory to store data persistently, SSDs haw no moving mechanical components. This distinguishes them: from conventional electeomeelia cal drives such as hard disk drives (HDDs) or floppy disks, which contain spinning d sks and movable read/write heads. Compared with electromechanical drives, SSDs are typically more resistani to physical shock, ran silently, have quicker access time and. lower latency,

[00150] As of 2017 » most SSDs us N AMD-base flas memory, which is a type of nonvolatile memory that retains data when power is tost For applications requiring fast access but not necessarily data persistence after power loss, SSDs may be constructed from random-access memory (RAM), Such devices may emplo batteries- as ■' integrated power sources to retain data for a certain amount: of time after external power is lost.

[001.51] However, all SSDs still store data In electrical charges, which slowly leak over time if left without power * This causes worn out dri es: (that have exceeded their endurance rating) to start losing data typically after some time in storage, Therefore, present SSDS are not suited tor archival purposes,

[00152] Accordingly, performance of SSDs can be substantially impro ed with the addition of improved power supplies, M n SSDs use capacitors to provide bactop power to the DRA : modules to write the volatile memory to non-volatile memory. Unfortunateiy, the available capacitors, are large and: exhibit low performance.,

[00153] in short, the SSD environment presents unique challenges for ail eapaeitive energy storage, not onl ultraeapacitor technology. Capaciti ve storage is used as o -hoard electrical: energ backup to transfer data Stored in voiatile memory (SRAM/DRAM) into iron- volatile memory (NA.ND, FLASH), The operation is critical to ensuring, that no data is lost in die even -of a power failure, As computing storage grows: ever more. important to nearly ail business sectors, tire need ibr an ultra-reliable mentor backup solution is a priority.

[00154] Havin thus introduced embodiments: of -an energy storage device for powering electrical cirenitSs some additional aspects are row presented. [00155] Various other components; may be include and. called upon for providing for aspects of the teachings herein. For example, additional materials, combinations of materials arid/br omissio of materials may be used to provide: for added embodiments that are ■■ within the scope of me teachings herein,

[00156] A variet of modifications of the teachings herein m y be realized.. Oeperally., modifications may be designed according to the needs of a user, designer, manufacturer or other similarl interested party. The modifications may be intended to meet a particular standard of performance considered important by that party,

[00157] The appended claims or claim elements should not be construe to invoke 35 U.S.C, § 1 12(f) unless the words "means for" or "step for" are explicitly used in the particular claim:,

[00158] When introducing elements of the present invention or the e.mb diment(s) thereof, the articles "a," "an," and "the" are intended to mean: that there are one or more of the elements. Similarly, the adjective "another," when used, to introduce an element, is intended id mean one or more elements. The terms delu ing" and "having" are intended to be inclusive such thai there may be additional elements other than the listed: elements,. As used herein, the term "exemplary" is not intended to imply a superlative example. Rather, "exemplary" refers to an embodiment that is one of many possible embodiments,

[00159] While t e invention has been described: with ' reference to exemplary embodiments, it will be understood by those skilled in. the art ' that various changes may be. made and equivalents may be snhstiinied for elements thereof without departing Irani the scope of the inv ntion. In addition, many modifications wil l be appreciaied by those skilled in the art to adapt a. particular instrument, situation or material to fee teachings of the invention without departing from the essenti l scope thereof Therefore, it is intended, that the inventio not be limited tp the particular embodiment disclosed fhe best mode contemplated f r carrying out this invention, but mat fee invention will include all embodiments falling within the scope of fee appended claims.