Title:
CHIP FUSE
Document Type and Number:
WIPO Patent Application WO/2011/111700
Kind Code:
A1
Abstract:
Provided is a chip fuse which includes a fuse element that can be fused at a low temperature without fail.
Surface electrodes are formed on a surface of an insulating substrate (1), and an Ni-P-Fe layer (15) is formed by plating so as to overlap the surface electrodes (3). An Sn layer (17) is formed by plating on the Ni-P-Fe layer (15). The Sn layer (17) is coated with an overcoat constituted of an insulating resin material.
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Inventors:
TAKEUCHI Katsumi (())
竹内 勝己 (())
竹内 勝己 (())
Application Number:
JP2011/055370
Publication Date:
September 15, 2011
Filing Date:
March 08, 2011
Export Citation:
Assignee:
HOKURIKU ELECTRIC INDUSTRY CO.,LTD. (3158, Shimo-okubo Toyama-sh, Toyama 92, 〒9392292, JP)
北陸電気工業株式会社 (〒92 富山県富山市下大久保３１５８番地 Toyama, 〒9392292, JP)
TAKEUCHI Katsumi (())
北陸電気工業株式会社 (〒92 富山県富山市下大久保３１５８番地 Toyama, 〒9392292, JP)
TAKEUCHI Katsumi (())
International Classes:
H01H85/11; C22C19/03; C23C28/00; C25D7/00; H01H85/046
Attorney, Agent or Firm:
NISHIURA Tsuguharu (NISHIURA & ASSOCIATES, Sankaido Building 8F9-13,Akasaka 1-chome,Minato-k, Tokyo 52, 〒1070052, JP)
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Claims:
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