Title:
CHIP SYNCHRONIZATION METHOD AND RELATED APPARATUS
Document Type and Number:
WIPO Patent Application WO/2021/093346
Kind Code:
A1
Abstract:
A chip synchronization method and a related apparatus, for use in reducing the complexity of chip design and layout. The method comprises: a first chip continuously sends a synchronization signal to a second chip (201); the first chip adds a rising edge or a falling edge to the synchronization signal, and after waiting for a first offset time (S2), enters a preset working mode (202); the second chip continuously receives the synchronization signal sent by the first chip (203), and after the received synchronization signal has a rising or falling edge, after waiting for a second offset time (S3), the second chip enters a preset working mode (204). According to the method, only one chip pin needs to be occupied to send a synchronization signal, so that multiple chips can enter the same working mode synchronously, thereby effectively reducing the complexity of chip design and layout.
Inventors:
NIE RUIJIE (CN)
LEI ZHANGWEI (CN)
WANG WENCHANG (CN)
LEI ZHANGWEI (CN)
WANG WENCHANG (CN)
Application Number:
PCT/CN2020/100392
Publication Date:
May 20, 2021
Filing Date:
July 06, 2020
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G06F1/12; G06F13/42; H04L7/00
Foreign References:
| CN103516506A | 2014-01-15 | |||
| CN101738600A | 2010-06-16 | |||
| CN110389924A | 2019-10-29 | |||
| US20190196532A1 | 2019-06-27 | |||
| CN106774634A | 2017-05-31 |
Attorney, Agent or Firm:
SHENPAT INTELLECTUAL PROPERTY AGENCY (CN)
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