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Patent Searching and Data


Title:
CIRCUIT ARRANGEMENT AND METHOD FOR TRANSMITTING SIGNALS
Document Type and Number:
WIPO Patent Application WO/2013/023652
Kind Code:
A3
Abstract:
The invention relates to a circuit arrangement (A) and to a corresponding method which use both single-ended signals based on logic levels and differential, in particular common-mode-based signals, to continually transmit a serialized signal in an error-free, stable manner.

Inventors:
BLON THOMAS (DE)
JANSEN FLORIAN (DE)
HOELTKE HOLGER (DE)
Application Number:
PCT/DE2012/200050
Publication Date:
May 30, 2013
Filing Date:
August 16, 2012
Export Citation:
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Assignee:
SILICON LINE GMBH (DE)
BLON THOMAS (DE)
JANSEN FLORIAN (DE)
HOELTKE HOLGER (DE)
International Classes:
H04L7/00; H04L7/10; H04J3/22
Foreign References:
US5968179A1999-10-19
Other References:
"SL83014 by Silicon Line GmbH", 3 March 2011 (2011-03-03), XP055057661, Retrieved from the Internet [retrieved on 20130325]
"Snapshots of SL83014 by Silicon Line GmbH - *Evidence of publication prior to priority date*", 3 March 2011 (2011-03-03), XP055057663, Retrieved from the Internet [retrieved on 20130325]
"MIPI Alliance Specification for D-PHY", 22 September 2009 (2009-09-22), pages 1 - 123, XP055057664, Retrieved from the Internet [retrieved on 20130325]
DARTNELL P ET AL: "Serdes Framer Interface Level 5 (SFI-5): Implementation Agreement for 40Gb/s Interface for Physical Layer Devices (OIF-SF15-01.01)", 29 January 2002 (2002-01-29), pages 62pp, XP009119852, Retrieved from the Internet [retrieved on 20090722]
Attorney, Agent or Firm:
HOFMANN, Andreas et al. (Muenchen, DE)
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