Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
CIRCUIT CONFIGURATION FOR IDENTIFYING A FAULTY STATE
Document Type and Number:
WIPO Patent Application WO2002015392
Kind Code:
A3
Abstract:
The invention relates to a circuit configuration (IC1, IC2, IC3, IC4) for identifying a faulty state. A first transistor of one self-conducting type (S1, JF2, P1) is provided for identifying a faulty state such as a break in a supply line (VL2) while maintaining operating safety. In a normal operating state, said first transistor has a voltage at its control input (E1) that cuts off its channel. In a faulty state, the channel of the transistor (S1, JF2, P1) becomes low-impedance. This enables preferably the output of a linear amplification stage (PA) to be applied to the intake potential (VDD) in the event of a break in a supply line (VL2).

Inventors:
AUSSERLECHNER UDO (AT)
BODENSTORFER ERNST (AT)
Application Number:
PCT/DE2001/003118
Publication Date:
June 27, 2002
Filing Date:
August 16, 2001
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
INFINEON TECHNOLOGIES AG (DE)
AUSSERLECHNER UDO (AT)
BODENSTORFER ERNST (AT)
International Classes:
H02H5/10; H03F1/52; (IPC1-7): H03F1/52; H02H5/10
Foreign References:
US4691129A1987-09-01
US3988695A1976-10-26
US4678950A1987-07-07
DE2833501A11980-02-21
Download PDF: