Title:
CLOCK BUFFER CIRCUIT AND ANALOG-TO-DIGITAL CONVERTER
Document Type and Number:
WIPO Patent Application WO/2023/216171
Kind Code:
A1
Abstract:
A clock buffer circuit (1000). The clock buffer circuit (1000) comprises a loop oscillator (1100); the loop oscillator (1100) comprises an input end for receiving a first clock signal, an output end for outputting a second clock signal, and N adjustable buffer units (1110); the loop oscillator (1100) generates the second clock signal on the basis of the first clock signal; the time constant of each adjustable buffer unit (1110) in the N adjustable buffer units (1110) is configured to enable the second clock signal and the first clock signal to be subjected to injection locking; and N is an odd number greater than or equal to 3.
Inventors:
ZHOU LIREN (CN)
GUAN YI (CN)
GUAN YI (CN)
Application Number:
PCT/CN2022/092353
Publication Date:
November 16, 2023
Filing Date:
May 12, 2022
Export Citation:
Assignee:
SHANGHAI TAUREN SEMICONDUCTOR CO LTD (CN)
International Classes:
H03K3/03; H03K5/01
Foreign References:
| TW201114188A | 2011-04-16 | |||
| CN110011644A | 2019-07-12 | |||
| US20120242314A1 | 2012-09-27 | |||
| CN112350723A | 2021-02-09 | |||
| CN105656456A | 2016-06-08 |
Attorney, Agent or Firm:
CHINA PATENT AGENT (HK) LTD. (CN)
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