Title:
CLOCK CIRCUIT AND CONTROL METHOD THEREFOR, AND COMMUNICATION DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/267792
Kind Code:
A1
Abstract:
A clock circuit and a control method therefor, and a communication device. The clock circuit comprises a phase-locked loop (100) and a trigger unit (200); the phase-locked loop (100) is used for receiving a reference clock signal and outputting a frequency division signal of a phase-locked clock signal and the phase-locked clock signal; the trigger unit (200) has an enable signal input end used for receiving a first enable signal, and an enable signal output end used for outputting a second enable signal; the trigger unit (200) is used for controlling, according to the first enable signal and the frequency division signal, the second enable signal to be output, such that the phase-locked clock signal is always in a same phase every time the second enable signal is in an active state.
Inventors:
ZHANG NAN (CN)
LIU JUN (CN)
CHEN YAWEN (CN)
LIU JUN (CN)
CHEN YAWEN (CN)
Application Number:
PCT/CN2022/094481
Publication Date:
December 29, 2022
Filing Date:
May 23, 2022
Export Citation:
Assignee:
ZTE CORP (CN)
International Classes:
H03L7/08
Foreign References:
| CN109863696A | 2019-06-07 | |||
| CN104242920A | 2014-12-24 | |||
| CN107154800A | 2017-09-12 | |||
| JP2015061273A | 2015-03-30 |
Attorney, Agent or Firm:
JIAQUAN IP LAW (CN)
Download PDF: