Title:
CLOCK DATA RESTORING DEVICE
Document Type and Number:
WIPO Patent Application WO/2008/044406
Kind Code:
A1
Abstract:
A clock data restoring device (1) restores a clock signal and data based on an inputted digital
signal. The clock data restoring device is provided with an equalizer section
(10), a sampler section (20), a clock generating section (30), an equalizer control
section (40) and a phase monitor section (50). A level adjustment quantity of
the digital signal at the equalizer section (10) is controlled by loop processing by
the equalizer section (10), the sampler section (20) and the equalizer control section
(40). On the other hand, when a phase difference between a clock signal (CK) and
the digital signal is larger than a prescribed value, the control is stopped by
the phase monitor section (50). Thus, the clock signal and the data are more correctly
restored.
Inventors:
OZAWA SEIICHI (JP)
Application Number:
PCT/JP2007/067397
Publication Date:
April 17, 2008
Filing Date:
September 06, 2007
Export Citation:
Assignee:
THINE ELECTRONICS INC (JP)
OZAWA SEIICHI (JP)
OZAWA SEIICHI (JP)
International Classes:
H04L7/033; H03L7/00; H04B3/06; H04L25/03
Domestic Patent References:
| WO2007058279A1 | 2007-05-24 |
Foreign References:
| JP2005027175A | 2005-01-27 | |||
| JPH0567374A | 1993-03-19 | |||
| JP2000151397A | 2000-05-30 | |||
| JP2007151044A | 2007-06-14 | |||
| JPH07221800A | 1995-08-18 | |||
| JP2004507963A | 2004-03-11 | |||
| JP2005341582A | 2005-12-08 | |||
| US20040240531A1 | 2004-12-02 |
Other References:
See also references of EP 2075949A4
Attorney, Agent or Firm:
HASEGAWA, Yoshiki et al. (Ginza First Bldg. 10-6Ginza 1-chome, Chuo-k, Tokyo 61, JP)
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