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Patent Searching and Data


Title:
CLOCK GATING CONTROL CIRCUIT AND CHIP TEST CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2023/184573
Kind Code:
A1
Abstract:
A clock gating control circuit (200) and a chip test circuit. The clock gating control circuit (200) is used for controlling clock inputs of a plurality of tested circuit parts of a tested circuit. The clock gating control circuit (200) comprises M decoders (210), a plurality of clock gating circuit blocks (230), a functional logic circuit block (240), which outputs a functional logic signal, and L control modules (220). Each decoder (210) receives and decodes an N-bit binary input, generates an L-bit binary code, and outputs L decoding sub-signals corresponding to the L-bit binary code; each clock gating circuit block (230) is used for controlling the clock input of one or more tested circuit parts; and each control module (220) enables or disables one or more clock gating circuit blocks (230) according to an externally input enable control signal, M decoding sub-signals and the functional logic signal, wherein the M decoding sub-signals are formed by means of each decoder (210) among the M decoders (210) providing one decoding sub-signal, and M, N and L are all positive integers.

Inventors:
WANG ZEKUN (CN)
HUANG XIAN (CN)
GUAN YI (CN)
Application Number:
PCT/CN2022/086522
Publication Date:
October 05, 2023
Filing Date:
April 13, 2022
Export Citation:
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Assignee:
SHANGHAI TAUREN SEMICONDUCTOR CO LTD (CN)
International Classes:
G01R31/3185
Foreign References:
US20130271197A12013-10-17
CN114113989A2022-03-01
CN104769841A2015-07-08
CN111610435A2020-09-01
CN110514981A2019-11-29
Attorney, Agent or Firm:
CHINA PATENT AGENT (HK) LTD. (CN)
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