Title:
CLOCK PROCESSING DEVICE AND PROGRAM
Document Type and Number:
WIPO Patent Application WO/2022/244287
Kind Code:
A1
Abstract:
In this clock processing device (10), a one-way delay difference calculation unit (26) calculates a first one-way delay difference and a second one-way delay difference. An RTT acquisition unit (28) acquires information for calculating the RTT. A delay time estimation unit (32) estimates a first one-way delay time. A one-way delay range update unit (30) derives the first one-way delay difference and the second one-way delay difference and updates the presence range of the first one-way delay time, which is defined using the first one-way delay difference and the second one-way delay difference. An assessment unit (34) assesses, using the presence range of the first one-way delay time, whether the estimated first one-way delay time is correct.
Inventors:
KURATA YOSUKE (JP)
Application Number:
PCT/JP2021/045570
Publication Date:
November 24, 2022
Filing Date:
December 10, 2021
Export Citation:
Assignee:
SEIKO SOLUTIONS INC (JP)
International Classes:
H04L7/00; G04G5/00
Foreign References:
| JP2014216669A | 2014-11-17 | |||
| JP2020091134A | 2020-06-11 | |||
| JP2016025474A | 2016-02-08 |
Other References:
XUEQIAO LI ; YUAN CHEN ; SHUANG LIANG: "Improvement of precise time synchronization algorithm based on IEEE1588", COMPUTER, MECHATRONICS, CONTROL AND ELECTRONIC ENGINEERING (CMCE), 2010 INTERNATIONAL CONFERENCE ON, IEEE, USA, 24 August 2010 (2010-08-24), USA , pages 70 - 73, XP031780728, ISBN: 978-1-4244-7957-3
Attorney, Agent or Firm:
TAIYO, NAKAJIMA & KATO (JP)
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