Title:
CLOCK RECOVERY APPARATUS
Document Type and Number:
WIPO Patent Application WO/2016/106548
Kind Code:
A1
Abstract:
A clock recovery apparatus, comprising: an analog-to-digital converter (ADC) (21), a data buffer (22), a digital interpolator (23), a clock phase error estimator (24), a filter (20), and a digital controller (25). Output terminals of the ADC (21) are respectively connected to an input terminal of the data buffer (22) and a first input terminal (26) of the clock phase error estimator (24); the output terminal of the data buffer (22) is connected to a first input terminal (28) of the digital interpolator (23); the output terminal of the digital interpolator (23) is connected to a second input terminal (27) of the clock phase error estimator (24); the output terminal of the clock phase error estimator (24) is connected to the input terminal of the digital controller (25); the output terminal of the digital controller (25) is connected to a second input terminal (29) of the digital interpolator (23). The present invention reduces complexity of circuit design and facilitates the realization of a hardware circuit.
Inventors:
WAN WENTONG (CN)
Application Number:
PCT/CN2014/095520
Publication Date:
July 07, 2016
Filing Date:
December 30, 2014
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
H04L7/033
Foreign References:
| US20070009074A1 | 2007-01-11 | |||
| CN102016996A | 2011-04-13 | |||
| CN101820340A | 2010-09-01 | |||
| CN102377715A | 2012-03-14 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
北京同立钧成知识产权代理有限公司 (CN)
北京同立钧成知识产权代理有限公司 (CN)
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