Title:
CLOCK SWITCHING CIRCUIT AND NODE DEVICE
Document Type and Number:
WIPO Patent Application WO/2003/049356
Kind Code:
A1
Abstract:
A clock switching circuit which is fed with clock signals corresponding to respective elements of a redundant system and outputs a clock signal corresponding to the system in operation while relaxing the phase fluctuation in response to a change in the system construction and a node device which is provided with the clock switching circuit. Useless accumulation of phase error is prevented with neither a drastic change in the construction nor a degradation of performance. Therefore, the clock switching circuit is constructed such that the phase of a synchronous clock signal synchronized with a clock signal corresponding to an element used antecedently is stepwise varied alternately in opposite directions each time the element being used is updated.
Inventors:
UMEDA NOBUYUKI (JP)
HATA AKIHIRO (JP)
SATO HIROYUKI (JP)
TSUJI HIDEO (JP)
SUMINO SATOSHI (JP)
HATA AKIHIRO (JP)
SATO HIROYUKI (JP)
TSUJI HIDEO (JP)
SUMINO SATOSHI (JP)
Application Number:
PCT/JP2001/010513
Publication Date:
June 12, 2003
Filing Date:
November 30, 2001
Export Citation:
Assignee:
FUJITSU LTD (JP)
UMEDA NOBUYUKI (JP)
HATA AKIHIRO (JP)
SATO HIROYUKI (JP)
TSUJI HIDEO (JP)
SUMINO SATOSHI (JP)
UMEDA NOBUYUKI (JP)
HATA AKIHIRO (JP)
SATO HIROYUKI (JP)
TSUJI HIDEO (JP)
SUMINO SATOSHI (JP)
International Classes:
H04J3/06; (IPC1-7): H04L7/04; H04L7/00
Foreign References:
| JPH08265311A | 1996-10-11 | |||
| JPH08172380A | 1996-07-02 | |||
| JPH05167439A | 1993-07-02 | |||
| JPH10240375A | 1998-09-11 | |||
| JPH11298460A | 1999-10-29 | |||
| JPH1127247A | 1999-01-29 | |||
| JPH0583238A | 1993-04-02 |
Attorney, Agent or Firm:
Furuya, Fumio (9th Floor 19-5, Nishishinjuku 1-chom, Shinjuku-ku Tokyo, JP)
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