Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
A CMOS CHIP COMPATIBLE GAS SENSOR
Document Type and Number:
WIPO Patent Application WO/2014/128615
Kind Code:
A1
Abstract:
A CMOS chip compatible gas sensor (100), comprising: a base substrate layer (1); an intermediate substrate layer (2) formed over the base substrate layer (1), a catalyst layer (3) formed by a first lithography process formed of continuous different cross sectional areas on the intermediate substrate layer (2) wherein a notch region (4) is formed of a portion of the catalyst layer (3), to create a suspended composite catalyst structure (7) by undergoing an oxidation reaction; at least two contact pads (5, 6) of predetermined thickness and predetermined length are provided on the catalyst layer (3) for electric probing, wherein the at least two contact pads (5, 6) are electrically connected to the notch region (4); and a provision provided on the chip to allow the notch region (4) to be exposed to the gas.

Inventors:
BHAT NAVAKANTA (IN)
PALASH KUMAR BASU (IN)
Application Number:
PCT/IB2014/059082
Publication Date:
August 28, 2014
Filing Date:
February 19, 2014
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
INDIAN INST SCIENT (IN)
International Classes:
G01N27/12; G01N33/00
Domestic Patent References:
WO1995010770A11995-04-20
WO1996036869A11996-11-21
Foreign References:
DE102006031228A12008-01-10
Other References:
GERGINTSCHEW Z ET AL: "The capacitively controlled field effect transistor (CCFET) as a new low power gas sensor", SENSORS AND ACTUATORS B: CHEMICAL: INTERNATIONAL JOURNAL DEVOTED TO RESEARCH AND DEVELOPMENT OF PHYSICAL AND CHEMICAL TRANSDUCERS, ELSEVIER S.A, CH, vol. 36, no. 1, October 1996 (1996-10-01), pages 285 - 289, XP004061082, ISSN: 0925-4005, DOI: 10.1016/S0925-4005(97)80083-4
CIMALLA V ET AL: "REVIEW ARTICLE; Group III nitride and SiC based MEMS and NEMS: materials properties, technology and applications; Group III nitride and SiC based MEMS and NEMS", JOURNAL OF PHYSICS D: APPLIED PHYSICS, INSTITUTE OF PHYSICS PUBLISHING LTD, GB, vol. 40, no. 20, 21 October 2007 (2007-10-21), pages 6386 - 6434, XP020112038, ISSN: 0022-3727, DOI: 10.1088/0022-3727/40/20/S19
JULIAN W GARDNER ET AL: "CMOS Interfacing for Integrated Gas Sensors: A Review", IEEE SENSORS JOURNAL, IEEE SERVICE CENTER, NEW YORK, NY, US, vol. 10, no. 12, December 2010 (2010-12-01), pages 1833 - 1848, XP011311241, ISSN: 1530-437X
SCHARNAGL K ET AL: "Low temperature hydrogen detection at high concentrations: comparison of platinum and iridium", SENSORS AND ACTUATORS B: CHEMICAL: INTERNATIONAL JOURNAL DEVOTED TO RESEARCH AND DEVELOPMENT OF PHYSICAL AND CHEMICAL TRANSDUCERS, ELSEVIER S.A, CH, vol. 80, no. 3, December 2001 (2001-12-01), pages 163 - 168, XP004311803, ISSN: 0925-4005, DOI: 10.1016/S0924-4247(01)00672-0
Attorney, Agent or Firm:
MADHUSUDAN, SIDDARA, Thippappa et al. (Intellectual Property Attorneys4121/B, 6th Cross, 19A Main, HAL II Stage, Bangalore Karnataka 8, IN)
Download PDF:
Claims:
Claims:

1. A CMOS chip compatible gas sensor (100), comprising:

a base substrate layer (1);

an intermediate substrate layer (2) formed over the base substrate layer (1), a catalyst layer (3) formed by a first lithography process formed of continuous different cross sectional areas on the intermediate substrate layer (2) wherein a notch region (4) is formed of a portion of the catalyst layer (3), to create a suspended composite catalyst structure (7) by undergoing an oxidation reaction;

at least two contact pads (5, 6) of predetermined thickness and predetermined length are provided on the catalyst layer (3) for electric probing, wherein the at least two contact pads (5, 6) are electrically connected to the notch region (4); and

a provision provided on the chip to allow the notch region (4) to be exposed to the gas.

2. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the suspended composite catalyst structure (7) comprises of a core shell, metal- semiconductor, semiconductor-metal, semiconductor-semiconductor (p-n) junction having built in electric field.

3. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the suspended composite catalyst structure (7) changes its electrical resistance on exposure to gas.

4. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein process steps such as formation of the base substrate layer (1), intermediate substrate layer (2), catalyst layer (3), suspended composite catalyst structure (7), and contact pads (5, 6) are formed at a temperature ranging from 20° C to 400° C.

5. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein material composition of the base substrate layer (1) is at least one of silicon (Si), glass and plastic with a thickness ranging from about ΙΟΟμπι to about ΙΟΟΟμπι.

6. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the intermediate substrate layer (2) is suitably formed over the base substrate layer (1), to posses the property of being selectively etched to form the notch region (4).

7. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the material composition of the intermediate substrate layer (2) is silicon dioxide (Si02) with a thickness ranging from about 70nm to about 130nm.

8. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the catalyst layer (3) deposited in the notch region (4) comprises of, thin Platinum (Pt) which is partially oxidized to Platinum oxide Pt02, during plasma etching using tetraflouromethane (CF4) and Oxygen (02).

9. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the suspended composite catalyst structure (7) comprises of core-shell, metal- semiconductor junction, with Platinum-Platinum Oxide, or any other meatl- semiconductor combination such as Tin-Tin Oxide, Zinc-Zinc oxide, Tungsten- Tungsten oxide etc.

10. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the metal oxides in the suspended composite catalyst structure (7) could be doped with appropriate dopants to enhance the sensing reaction.

11. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the n- type and p- type mixed metal oxides in the suspended composite catalyst structure (7) are deposited either by co-depositing appropriate metal oxide targets, or using reactive deposition of respective metals in the oxygen ambient to create the metal oxides.

12. The CMOS chip compatible gas sensor (100) as claimed in claim 1, wherein the suspended composite catalyst structure (7) comprises of n-type and p- type mixed metal oxide structures.

13. The CMOS chip gas sensor (100) as claimed in claim 1, wherein at least two contact pads (5, 6) are formed over the intermediate substrate layer (2) by a method selected from a group comprising radio frequency (RF) sputtering, reactive sputtering, electron beam evaporation and thermal evaporation.

14. The CMOS chip gas sensor (100) as claimed in claim 1, wherein the sensitivity can be further enhanced by incorporating a heater to increase the temperature of the suspended composite catalyst structure (7).

15. The CMOS chip gas sensor (100) as claimed in claim 1, wherein the material composition of at least two contact pads (5, 6) is Platinum (Pt).

16. The CMOS chip gas sensor (100) as claimed in claim 1, wherein the material composition of at least two contact pads (5, 6) can also be made of other conducting films such as Aluminum, Copper, Titanium and Titanium Nitride.

17. The CMOS chip gas sensor (100) as claimed in claim 1, wherein the suspended sensor array can be integrated in-situ, on top of a CMOS chip fabricated in a standard Silicon foundry, consisting of all the electronics to process the sensor signals, without destroying electronics functionality of underlying Silicon CMOS chip.

18. A method of manufacturing a CMOS chip gas sensor (100) comprising steps of:

forming a base substrate layer (1);

forming an intermediate substrate layer (2) over the base substrate layer (1), forming a catalyst layer (3) by a first lithography process formed of continuous different cross sectional areas on the intermediate substrate layer (2) wherein a notch region (4) is formed of a portion of the catalyst layer (3), to create a suspended composite catalyst structure (7) by undergoing an oxidation reaction; and providing a provision on the chip to allow the notch region (4) to be exposed to the gas.

Description:
A CMOS CHIP COMPATIBLE GAS SENSOR

TECHNICAL FIELD

The present disclosure relates to a CMOS chip compatible gas sensor. More particularly, the embodiments include a semiconductor device which is a nano- structured electrochemical gas sensor prepared by utilizing the catalytic property of Platinum Oxide (Pt0 2 ) in conjunction with its p-type semiconducting behaviour.

BACKGROUND OF THE DISCLOSURE

Many of the safety systems utilize Gas sensing and detectors which are deployed in critical installations for detection of gases. These kinds of gas sensing devices are part of a safety system. Majority of the applications use gas sensors in a variety of fields including pollution monitoring, hazardous gas detection, and industrial process control. Since leakage of gases may cause a possible life threatening situation to organic life, such as humans or animals, it is of at most importance to detect such hazardous gases and take necessary precautions/measures.

Gas detectors can be classified according to the operation mechanism (semiconductors, oxidation, catalytic, infrared, etc.). Gas detectors come in two main types: portable devices and fixed gas detectors. The first is used to monitor the atmosphere around personnel and is worn on clothing or on a belt/harness. The second type of gas detectors are fixed type which may be used for detection of one or more gas types. Fixed type detectors are generally mounted near the process area of a plant or control room.

Typically, metal oxides (such as Sn0 2 , ZnO) are used as sensing elements along with metal catalysts (such as Pt or Pd). The gas sensors are benchmarked based on some important features such as power consumption, response time and Limit of Detection (LOD).

Conventionally, micro electro mechanical systems (MEMS) based gas sensors are used which use a variety of metal oxides to sense different gases. The MEMS based gas sensors are typically fabricated using either surface or bulk micromachining techniques. Usually, the metal oxides are responsive to oxidizing or reducing gases, only at elevated temperatures. Additionally, most of the metal oxide sensors require an integrated micro heater which consumes significant power. Also the response time and limit of detection (LOD) are limited by thermal mass and the size of the structure. Hence, a variety of nano-structured sensors are explored either to minimize the power consumption or improve the response time or extend the limit of detection (LOD) to sub-parts per million (ppm) levels. Some of the alternate structures, which require new materials and bottom up synthesis technique are not compatible with silicon foundries and complementary metal oxide semiconductor (CMOS) technology. Further, it is a complex process to integrate the sensor in a post-CMOS process where the processing temperature is high i.e. temperature greater than 500°C.

Conventionally, most of the nano-structured sensors use Platinum (Pt) or Palladium (Pd) catalysts to enhance the sensitivity. The best available H 2 sensor with the lowest LOD uses Palladium nanowires synthesized with lithographically patterned electro deposition method which is a very complex technique and is not compatible with conventional CMOS.

In light of the foregoing, there is a need to develop a gas sensor which has a nano-structured gas sensing element for gas detection thereof to overcome the limitations stated above. SUMMARY OF THE DISCLOSURE

The shortcomings of the prior art are overcome and additional advantages are provided through the provision as claimed in the present disclosure. Additional features and advantages are realized through the techniques of the present disclosure. Other embodiments and aspects of the disclosure are described in detail herein and are considered a part of the claimed disclosure.

In an embodiment of the present disclosure a CMOS chip compatible gas sensor, comprising: a base substrate layer; an intermediate substrate layer formed over the base substrate layer, a catalyst layer formed by a first lithography process formed of continuous different cross sectional areas on the intermediate substrate layer wherein a notch region is formed of a portion of the catalyst layer, to create a suspended composite catalyst structure by undergoing an oxidation reaction; at least two contact pads of predetermined thickness and predetermined length are provided on the catalyst layer for electric probing, wherein the at least two contact pads are electrically connected to the notch region; and a provision provided on the chip to allow the notch region to be exposed to the gas. In an embodiment of the present disclosure the suspended composite catalyst structure comprises of a core shell, metal-semiconductor, semiconductor-metal, semiconductor- semiconductor (p-n) junction having built in electric field.

In an embodiment of the present disclosure the suspended composite catalyst structure changes its electrical resistance on exposure to gas.

In an embodiment of the present disclosure process steps such as formation of the base substrate layer, intermediate substrate layer, catalyst layer, suspended composite catalyst structure, and contact pads are formed at a temperature ranging from 20° C to 400° C.

In an embodiment of the present disclosure, the intermediate substrate layer is suitably formed over the base substrate layer, to possess the property of being selectively etched to form the notch region.

In an embodiment of the present disclosure, the material composition of the intermediate substrate layer is silicon dioxide (Si0 2 ) with a thickness ranging from about 70nm to about 130nm.

In an embodiment of the present disclosure, the catalyst layer deposited in the notch region comprises of, thin Platinum (Pt) which is partially oxidized to Platinum oxide Pt0 2 , during plasma etching using tetraflouromethane (CF 4 ) and Oxygen (0 2 ).

In an embodiment of the present disclosure, the suspended composite catalyst structure comprises of core-shell, metal-semiconductor junction, with Platinum-Platinum Oxide, or any other metal-semiconductor combination such as Tin-Tin Oxide, Zinc-Zinc oxide, Tungsten- Tungsten oxide etc.

In an embodiment of the present disclosure, the metal oxides in the suspended composite catalyst structure could be doped with appropriate dopants to enhance the sensing reaction. In an embodiment of the present disclosure, the n-type and p- type mixed metal oxides in the suspended composite catalyst structure are deposited either by co-depositing appropriate metal oxide targets, or using reactive deposition of respective metals in the oxygen ambient to create the metal oxides. In an embodiment of the present disclosure, the suspended composite catalyst structure comprises of n-type and p- type mixed metal oxide structures.

In an embodiment of the present disclosure, at least two contact pads are formed over the intermediate substrate layer by a method selected from a group comprising radio frequency (RF) sputtering, reactive sputtering, electron beam evaporation and thermal evaporation.

In an embodiment of the present disclosure, the sensitivity can be further enhanced by incorporating a heater to increase the temperature of the suspended composite catalyst structure.

In an embodiment of the present disclosure, the material composition of at least two contact pads is Platinum (Pt).

In an embodiment of the present disclosure, the material composition of at least two contact pads can also be made of other conducting films such as Aluminum, Copper, Titanium and Titanium Nitride.

In an embodiment of the present disclosure, the suspended sensor array can be integrated in- situ, on top of a CMOS chip fabricated in a standard Silicon foundry, consisting of all the electronics to process the sensor signals, without destroying electronics functionality of underlying Silicon CMOS chip.

In an embodiment of the present disclosure, a method of manufacturing a CMOS chip gas sensor comprising steps of: forming a base substrate layer; forming an intermediate substrate layer over the base substrate layer, forming a catalyst layer by a first lithography process formed of continuous different cross sectional areas on the intermediate substrate layer wherein a notch region is formed of a portion of the catalyst layer, to create a suspended composite catalyst structure by undergoing an oxidation reaction; and providing a provision on the chip to allow the notch region to be exposed to the gas.

It is to be understood that the aspects and embodiments of the invention described above may be used in any combination with each other. Several of the aspects and embodiments may be combined together to form a further embodiment of the invention. The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS The novel features and characteristic of the disclosure are set forth in the appended claims. The disclosure itself, however, as well as a preferred mode of use, further objectives and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying figures. One or more embodiments are now described, by way of example only, with reference to the accompanying figures wherein like reference numerals represent like elements and in which:

Figure 1 illustrates different stages of forming substrate layers over a CMOS chip by various processes.

Figure 2 illustrates the top and side view of the CMOS chip gas sensor before plasma etching. Figure 3 illustrates the top and side view of the CMOS chip gas sensor after plasma etching.

Figure 4 illustrates enlarged view of the catalyst layer and notch region which acts as the suspended composite catalyst structure.

FIG. 5 illustrates semiconducting behavior of thin Pt films in the CMOS gas sensor according to an embodiment of the present disclosure. FIG. 6 illustrates self-heating of Pt films at low voltages by using nano scale heater according to an embodiment of the present disclosure.

FIGS. 7 and 8 illustrates X-ray photoelectron spectroscopy (XPS) results before and after reactive ion etching (RIE) of Pt into Pt0 2 according to an embodiment of the present disclosure. FIGS. 9 and 10 illustrates gas sensing at room temperature by the CMOS compatible gas sensor (100) according to an embodiment of the present disclosure.

The figures depict embodiments of the disclosure for purposes of illustration only. One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles of the disclosure described herein. PAGE LEFT UNINTENTIONALLY BLANK

DETAILED DESCRIPTION

The foregoing has broadly outlined the features and technical advantages of the present disclosure in order that the detailed description of the disclosure that follows may be better understood. Additional features and advantages of the disclosure will be described hereinafter which form the subject of the claims of the disclosure. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the disclosure as set forth in the appended claims. The novel features which are believed to be characteristic of the disclosure, both as to its organization and method of operation, together with further objects and advantages will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present disclosure. It will be readily understood that the aspects of the present disclosure, as generally described herein, and illustrated in the figures, can be arranged, substituted, combined, and designed in a wide variety of different configurations, all of which are explicitly contemplated and make part of this disclosure. Referring now to the drawings wherein the drawings are for the purpose of illustrating an exemplary embodiment of the disclosure only, and not for the purpose of limiting the same.

FIG 1 illustrates different stages of forming gas sensor by various processes. FIG. la illustrates a base substrate layer (1). This could either be a fully processed CMOS chip where the gas sensor has to be put on top of the CMOS chip, using compatible set of processes, so as not to destroy the already constructed CMOS chip. Alternately this layer could also be any other substrate, such as fresh Silicon wafer, glass or plastic substrate. Thickness of the base substrate layer (1) can be based on the specific application requirement. In a particular embodiment of the instant disclosure, the base substrate layer (1) is a fresh silicon (Si) layer and has a thickness ranging from about ΙΟΟμπι to about ΙΟΟΟμπι. FIG. lb an intermediate substrate layer (2) is formed over the base substrate layer (1) by a suitable process, wherein the intermediate substrate layer (2) is formed at desired temperatures depending on the material composition of the intermediate substrate layer (2) and the compatibility requirements of the base substrate layer (1). The intermediate substrate layer (2) should also be chosen to have one essential proerty. In a subsequent process it should be possible to selectively and sacrificially etch this layer (2) in the notch area, to create suspended composite catalyst structure (7).

In one embodiment of the instant disclosure, the intermediate substrate layer (2) is made of silicon dioxide (Si0 2 ) which has a thickness ranging from about 70 nm to about 130 nm. The Silicon dioxide (Si0 2 ) intermediate substrate layer (2) is deposited over the silicon (Si) base substrate layer (1) as a second step in forming the different substrate layers. FIG. lc illustrates the deposition of a catalyst layer (3) once the base substrate layer (1) and the intermediate base substrate layer (2) are built. This step is carried out by a first lithographic process and a catalyst layer (3) having a predetermined thickness is formed over the intermediate substrate layer (2). FIG. Id illustrates at least two contact pads (5, 6), formed using second lithography process, over the intermediate substrate layer (2) wherein the contact pads are in contact with the catalyst layer (3) for electric probing. The two contact pads (5, 6) are spaced apart from each other with the catalyst layer (3) provided in-between them. The contact pads (5, 6) are formed over the intermediate substrate layer (2) by a method selected from a group comprising radio frequency (RF) sputtering and reactive sputtering.

In a particular embodiment of the instant disclosure, at least two contact pads (5, 6) are formed of Platinum (Pt) and are having a thickness ranging from about 70nm to about 130nm. FIG. le illustrates the suspended catalyst layer (3) which is formed with different and continuous cross sectional area on the intermediate substrate layer (2), by a sacrificial plasma etch process that selectively clears intermediate substrate layer (2) in the notch area (4). The selective plasma etch process chemistry is suitably chosen to simultaneously oxidize some part of the catalyst region in the notch area (4). In this particular embodiment, this results in a suspended composite catalyst structure (7), consisting of Platinum core, surrounded by Platinum oxide shell, thus resulting in a suspended metal-semiconductor junction. This junction, with its associated built-in potential, is crucial in enhancing the gas sensing reaction of suspended sensor strucrture, thereby enhancing the sensitivity.

FIG 2 illustrates the top and side view of the CMOS chip compatible gas sensor (100) before plasma etching. At least two contact pads (5, 6) are in contact with the catalyst layer (3) and these two contact pads aid in electric probing of the CMOS chip. The catalyst layer (3) so formed on the intermediate substrate layer (2) is sputter deposited Platinum (Pt), partially converted to Platinum Oxide (Pt0 2 ) and suspended by a subsequent plasma process involving tetraflouromethane (CF 4 ) and Oxygen (0 2 ). When the catalyst layer (3) undergoes a plasma etching, a suspended core-shell, Platinum-Platinum Oxide, metal-semiconductor junction (7) is formed in the notch region (4). This particular suspended composite catalyst structure (7), when exposed to the target gas, acts as a sensor for detecting the gas. The figure further shows the top view of the CMOS chip compatible gas sensor (100) wherein the notch region (4) having a suspended composite catalyst structure (7) is clearly shown which will be formed after the plasma etching. The notch region (4) so formed will be in a width ranging from about Ι μπι to about 8μπι. The cross-sectional area (A) of at least two contact pads (5, 6) is greater than that of the cross sectional area (B) of the catalyst layer (3). The cross sectional area (C) of the suspended composite catalyst structure (7) is smaller than that of the cross sectional areas (A and B). Even though the cross-sectional areas (A, B and C) are having different dimensions, they are still in contact with each other for electric probing. All the processes leading to the creation of suspended composite catalyst structure (7) are essentially done at room temperature, thus making the sensor compatible with the CMOS chip. FIG 3 illustrates view of the CMOS chip compatible gas sensor (100) after plasma etching and top view of the catalyst layer (3) deposition on the Si0 2 layer. After the plasma etching process is completed a notch region (4) is formed below the catalyst layer (3) in the intermediate layer (2). During the plasma etching process, the gas chemistry comprising of tetraflouromethane (CF 4 ) and Oxygen (0 2 ) in equal ratios, is taken for simultaneous oxidization and suspension of the sensor structure by creating the notch region (4). In a particular embodiment of the present disclosure, fluorine helps in isotropic etching of the oxide and silicon and thereby releases the notch region of the sensor device creating a suspended catalyst structure. Simultaneously, 0 2 plasma ensures oxidation of platinum into Pt0 2 thus creating a core-shell Pt-Pt0 2 structure. FIG. 3 shows an enlarged view of the notch region (4) with suspended Pt and PtO/Pt0 2 (8) around the suspended Pt. In one embodiment when the initial Pt thickness is very thin (lOnm and below) then the entire Pt film gets oxidized into Pt0 2 , without a central core Pt region. In one embodiment when the initial Pt thickness is thicker Pt region (20nm - 30nm), Platinum is only partially oxidized, resulting in a core-shell Pt-Pt0 2 structure (8). The suspended Pt-Pt0 2 notch region (4) acts as an electrochemically sensitive film, which changes its resistance on exposure to reducing gas such as Hydrogen (H 2 ). The figure also shows us the catalyst layer (3) formed of different cross-sectional areas on the intermediate substrate layer (2) and a notch region (4) showing the PtO/Pt0 2 structure.

In a particular embodiment of the present disclosure, the CMOS chip compatible gas sensor (100) demonstrates Hydrogen (H 2 ) sensing capabilities with the capacity of sensing gas going below 1 ppm for limit of detection (LOD). The CMOS chip compatible gas sensor (100) also utilizes low power for detecting the hazardous gas, since the structure is capable of sensing at room temperature, which is advantageous over previous sensors. The sensitivity can be tuned by appropriately adjusting the film thickness and the measurement voltage.

In a particular embodiment of the present disclosure, the sensing layer can be modified by doping Pt0 2 films with other metal oxides, preferably n-type metal oxide. The suspended n-p junction consisting of appropriately chosen metals, this senses different gases. In order to get such mixed films, co-sputtering can be carried out simultaneously or sequentially by choosing appropriate targets for sputtering. Reactive sputtering also can be carried out with 0 2 gas to tune the properties of Pt0 2 and other metal oxides.

In one embodiment of the present disclosure, all the process steps such as formation of the base substrate layer, intermediate substrate layer, catalyst layer, suspended composite catalyst structure, and contact pads are formed at a temperature ranging from 20° C to 400° C.

FIG 4 illustrates the catalyst layer (3) and the notch region (4) with the suspended composite catalyst structure (7). The catalyst layer (3), when subjected to selective plasma etch, involving tetraflouromethane (CF 4 ) and Oxygen (0 2 ), partially converts to Platinum Oxide (Pt0 2 ) (8). Simultaneously second substrate layer (2) is selectively etched creating notch region (4). Thus a suspended catalyst structure (7) having a core-shell, Platinum-Platinum Oxide, metal-semiconductor junction is formed in the notch region (4). This acts as an electrochemically sensitive film, which changes its resistance on exposure to reducing gas such as hydrogen (H 2 ). The PtO/Pt0 2 structure (8) is formed as a layer over the catalyst layer (3).

FIG. 5 illustrates semiconducting behavior composite, Pt-Pt02, sensor structure (7), when the initial Pt films are in the thickness range of 20nm-30nm, according to an embodiment of the present disclosure. In a particular embodiment, the thickness of the Pt thin films are in the range of lOnm to 30nm for the CMOS chip compatible gas sensor (100) which does not need an embedded nano heater. FIG. 6 illustrates self-heating of Pt-Pt02, composite films indicating the dominance of Pt layer, when the initial Pt films are in the range of 50nm-100nm. This result re-iterates the importance of tuning the initial Pt film thickness appropriately (lOnm - 30nm) to be able to get the semiconducting behaviour and subsequent sensing properties.

FIGS. 7 and 8 illustrates X-ray photoelectron spectroscopy (XPS) results before and after reactive ion etching (RIE) of Pt into Pt0 2 according to an embodiment of the present disclosure. FIG. 7 illustrates XPS results of the Pt thin films after RIE with CF 4 and 0 2 gases wherein formation of both PtO as shown in region 2 and Pt0 2 as shown in region 4 of FIG. 8. If the initial Pt thickness is very thin (lOnm and below) then the entire Pt film gets oxidized into Pt0 2 , without a central core Pt region. The suspended composite catalyst structure (7) Pt- Pt0 2; at the notch region acts as an electrochemically sensitive film, which changes its resistance on exposure to reducing gas such as H 2 . In a particular embodiment of the present disclosure, the sensing layer can be modified by doping Pt0 2 films with other metal oxides, preferably n-type metal oxide. The suspended n-p junction consisting of appropriately chosen metal oxides can be tailored to sense different gases. In order to get such mixed films, co- sputtering can be carried out simultaneously or sequentially by choosing appropriate targets for sputtering. Reactive sputtering also can be carried out with 0 2 gas to tune the properties of Pt0 2 and other metal oxides.

FIGS. 9 and 10 illustrates hydrogen (H 2 ) sensing at room temperature by the CMOS gas sensor (100) according to an embodiment of the present disclosure. The formed Pt-Pt0 2 metal-semiconductor junction sets up a vertical electric field in the sensor (100) which in-turn enables electric field activation of chemical reaction. Instead of thermal activation, the process enables electrochemical sensing at room temperature. The H 2 sensing results are shown with the capability of going below lppm for LOD. FIG. 10 illustrates sensing with different thickness of sensor films and at different voltages with limit of detection (LOD) in sub parts per million (ppm) ranges according to an embodiment of the present disclosure. The sensitivity of the CMOS chip compatible gas sensor (100) can be tuned by appropriately adjusting the film thickness and the measurement voltage. In an embodiment, the CMOS gas sensor (100) is used for sensing Hydrogen (H 2 ) gas. The CMOS gas sensor (100) is applicable to sense other gases as well by changing the materials used and without deviating from the scope of the present disclosure. While we have illustrated the sensing capability at room temperature, in an alternate embodiment, the sensitivity can be further enhanced by integrating a heater to increase the temperature of suspended composite catalyst structure (7). EQUIVALENTS

With respect to the use of substantially any plural and/or singular terms herein, those having skill in the art can translate from the plural to the singular and/or from the singular to the plural as is appropriate to the context and/or application. The various singular/plural permutations may be expressly set forth herein for sake of clarity.

It will be understood by those within the art that, in general, terms used herein, and especially in the appended claims (e.g., bodies of the appended claims) are generally intended as "open" terms (e.g., the term "including" should be interpreted as "including but not limited to," the term "having" should be interpreted as "having at least," the term "includes" should be interpreted as "includes but is not limited to," etc.). It will be further understood by those within the art that if a specific number of an introduced claim recitation is intended, such an intent will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. For example, as an aid to understanding, the following appended claims may contain usage of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation by the indefinite articles "a" or "an" limits any particular claim containing such introduced claim recitation to inventions containing only one such recitation, even when the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "a" or "an" (e.g., "a" and/or "an" should typically be interpreted to mean "at least one" or "one or more"); the same holds true for the use of definite articles used to introduce claim recitations. In addition, even if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that such recitation should typically be interpreted to mean at least the recited number (e.g., the bare recitation of "two recitations," without other modifiers, typically means at least two recitations, or two or more recitations). Furthermore, in those instances where a convention analogous to "at least one of A, B, and C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B, and C" would include but not be limited to systems that have A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B, and C together, etc.). In those instances where a convention analogous to "at least one of A, B, or C, etc." is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., "a system having at least one of A, B, or C" would include but not be limited to systems that have A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B, and C together, etc.). It will be further understood by those within the art that virtually any disjunctive word and/or phrase presenting two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both terms. For example, the phrase "A or B" will be understood to include the possibilities of "A" or "B" or "A and B."

In addition, where features or aspects of the disclosure are described in terms of Markush groups, those skilled in the art will recognize that the disclosure is also thereby described in terms of any individual member or subgroup of members of the Markush group.

While various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The various aspects and embodiments disclosed herein are for purposes of illustration and are not intended to be limiting, with the true scope and spirit being indicated by the following claims.

REFERRAL NUMERALS