Title:
CMOS GOA CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2018/129786
Kind Code:
A1
Abstract:
A CMOS GOA circuit. A signal processing module (500) of the CMOS GOA circuit comprises a first thin film transistor and a second thin film transistor. A gate of the first thin film transistor (T1) is connected to a first control signal (CK(M+2)), a source of the first thin film transistor (T1) is connected to an output node (P(N)), and a drain of the first thin film transistor (T1) is electrically connected to a third node (K(N)). A gate and a source of the second thin film transistor (T2) are connected to a second control signal (XCK(M+2)), and a drain of the second thin film transistor (T2) is electrically connected to the third node (K(N)). A phase of the first control signal (CK(M+2)) is opposite to a phase of the second control signal (XCK(M+2)). The first thin film transistor (T1) and the second thin film transistor (T2) are alternately turned on under the control of the first control signal (CK(M+2)) and the second control signal (XCK(M+2)), and then, a potential signal of the output node (P(N)) or the second control signal (XCK(M+2)) is inputted to the third node (K(N)). Compared with the NAND gate circuit used in the prior art, the number of transistors in the CMOS GOA circuit can be effectively reduced, the bezel size of a display product is reduced, and a narrow-bezel or bezel-free display product can be implemented.
Inventors:
YI SHIJUAN (CN)
Application Number:
PCT/CN2017/073878
Publication Date:
July 19, 2018
Filing Date:
February 17, 2017
Export Citation:
Assignee:
WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD (CN)
International Classes:
G09G3/36
Foreign References:
| CN105427821A | 2016-03-23 | |||
| CN103915052A | 2014-07-09 | |||
| CN104282287A | 2015-01-14 | |||
| CN105118463A | 2015-12-02 | |||
| US20100231497A1 | 2010-09-16 |
Attorney, Agent or Firm:
COMIPS INTELLECTUAL PROPERTY OFFICE (CN)
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