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Patent Searching and Data


Title:
CO-SIMULATION COMPUTER SYSTEM, VERIFICATION SYSTEM FOR EMBEDDED SYSTEMS, AND VERIFICATION METHOD FOR EMBEDDED SYSTEMS
Document Type and Number:
WIPO Patent Application WO/2014/038030
Kind Code:
A1
Abstract:
This co-simulation computer system has a plurality of simulators that operate in cooperation with each other. The plurality of simulators includes a plurality of simulators having different precisions and speeds, and is provided with: an input buffer and an output buffer that are correspondingly disposed on the input side and output side of a simulator being validated; and a dynamic speed adjustment unit that controls the input and output of data to and from the input buffer and the output buffer. The dynamic speed adjustment unit controls the input change frequency of the data to the simulator being validated, or the output change frequency of the data from the simulator being validated, and adjusts the operating speed of the plurality of simulators that operate in cooperation.

Inventors:
ITO YASUHIRO (JP)
Application Number:
PCT/JP2012/072676
Publication Date:
March 13, 2014
Filing Date:
September 06, 2012
Export Citation:
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Assignee:
HITACHI LTD (JP)
ITO YASUHIRO (JP)
International Classes:
G06F19/00
Foreign References:
JP2005332162A2005-12-02
JP2010134722A2010-06-17
JP2006331269A2006-12-07
JP2011039781A2011-02-24
JP2009295014A2009-12-17
JPH1074184A1998-03-17
JP2009223762A2009-10-01
JP2008065640A2008-03-21
Attorney, Agent or Firm:
POLAIRE I. P. C. (JP)
Polaire Intellectual Property Corporation (JP)
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