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Title:
CODEBOOK TO SUPPORT NON-COHERENT TRANSMISSION IN COMP (COORDINATED MULTI-POINT) AND NR (NEW RADIO)
Document Type and Number:
WIPO Patent Application WO/2017/201414
Kind Code:
A1
Abstract:
Techniques for non-coherent transmission based on a block diagonal codebook structure are discussed. In one example embodiment, a UE (User Equipment) can comprising processing circuitry configured to: process higher layer signaling that indicates one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks; generate one or more codewords based on the one or more codebook configuration parameters; perform channel measurements on a set of reference signals; select a best codeword of the one or more codewords based on the channel measurements; and generate a report comprising an index of the best codeword.

Inventors:
DAVYDOV ALEXEI (RU)
Application Number:
PCT/US2017/033554
Publication Date:
November 23, 2017
Filing Date:
May 19, 2017
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
INTEL CORP (US)
International Classes:
H04B7/04; H04B7/06
Foreign References:
US20150341093A12015-11-26
US20110249637A12011-10-13
Other References:
None
Attorney, Agent or Firm:
ESCHWEILER, Thomas G. (US)
Download PDF:
Claims:
CLAIMS

What is claimed is:

1 . An apparatus configured to be employed in a User Equipment (UE), comprising: a memory interface; and

processing circuitry configured to:

process higher layer signaling that indicates one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks;

generate one or more codewords based on the one or more codebook configuration parameters;

perform channel measurements on a set of reference signals; select a best codeword of the one or more codewords based on the channel measurements;

generate a report comprising an index of the best codeword; and send the one or more codebook configuration parameters to a memory via the memory interface.

2. The apparatus of claim 1 , wherein each diagonal block of the two or more diagonal blocks is associated with a distinct set of antenna ports.

3. The apparatus of any of claims 1 -2, wherein each diagonal block of the two or more diagonal blocks is a product of an associated first matrix with an associated second matrix, wherein the associated first matrix determines a set of beams associated with that diagonal block, and wherein the associated second matrix applies beam selection and polarization co-phasing for the set of beams associated with that diagonal block.

4. The apparatus of claim 3, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a distinct associated second matrix for that diagonal block.

5. The apparatus of claim 3, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a common associated second matrix for each diagonal block of the two or more diagonal blocks.

6. The apparatus of claim 3, wherein, for each diagonal block of the two or more diagonal blocks, each column of the associated first matrix corresponds to an oversampled DFT (Discrete Fourier Transform) vector.

7. The apparatus of any of claims 1 -2, wherein the one or more codebook configuration parameters comprise a number of diagonal blocks of the two or more diagonal blocks.

8. The apparatus of any of claims 1 -2, wherein the one or more codebook configuration parameters comprise a number of antenna ports associated with each block of the two or more diagonal blocks.

9. The apparatus of claim 8, wherein the one or more codebook configuration parameters comprise a DFT (Discrete Fourier Transform) oversampling for each block of the two or more blocks.

10. The apparatus of any of claims 1 -2, wherein the set of reference signals comprises a set of CSI (Channel State lnformation)-RS (Reference Signals).

1 1 . The apparatus of claim 10, wherein the set of CSI-RS comprise two or more subsets of CSI-RS, wherein a number of CSI-RS APs (Antenna Ports) for each subset of the two or more subsets of CSI-RS corresponds to a number of APs of an associated diagonal block of the two or more diagonal blocks.

12. The apparatus of claim 10, wherein the set of CSI-RS comprises two or more distinct CSI-RS resource configurations.

13. The apparatus of claim 12, wherein the CSI-RS APs are non-QCL-ed (Quasi Co- Located) with respect to a timing offset, a delay spread, a frequency offset, and a gain.

14. The apparatus of claim 12, wherein, for each subset of CSI-RS of the two or more subsets of CSI-RS, each CSI-RS AP of that subset of CSI-RS is QCL-ed (Quasi Co-Located) with CSI-RS APs of that subset of CSI-RS and non-QCL-ed with other CSI-RS APs, with respect to a timing offset, a delay spread, a frequency offset, and a gain.

15. An apparatus configured to be employed in an Evolved NodeB (eNB), comprising:

a memory interface; and

processing circuitry configured to:

generate higher layer signaling indicating one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks;

generate a set of reference signals;

process a report based on the set of reference signals, wherein the report indicates an index of a best codeword associated with the block diagonal codebook structure; and

send the one or more codebook configuration parameters to a memory via the memory interface.

16. The apparatus of claim 15, wherein each diagonal block of the two or more diagonal blocks is associated with a distinct set of antenna ports.

17. The apparatus of any of claims 15-16, wherein each diagonal block of the two or more diagonal blocks is a product of an associated W-\ matrix that determines a subset of beams associated with that diagonal block with an associated W2 matrix that applies beam selection and co-phasing for that diagonal block.

18. The apparatus of claim 17, wherein, for each diagonal block of the two or more diagonal blocks, the associated W2 matrix is a common W2 matrix.

19. The apparatus of claim 17, wherein, for each diagonal block of the two or more diagonal blocks, the associated W2 matrix is a distinct associated W2 matrix for that diagonal block.

20. The apparatus of claim 17, wherein, for each diagonal block of the two or more diagonal blocks, the associated W-\ matrix is a Kronecker product of one or more DFT (Discrete Fourier Transform) vectors.

21 . The apparatus of any of claims 15-16, wherein the one or more codebook configuration parameters comprise a number of diagonal blocks of the two or more diagonal blocks.

22. The apparatus of any of claims 15-16, wherein the one or more codebook configuration parameters comprise a number of antenna ports associated with each block of the two or more diagonal blocks.

23. The apparatus of claim 22, wherein the one or more codebook configuration parameters comprise a DFT (Discrete Fourier Transform) oversampling for each block of the two or more blocks.

24 The apparatus of any of claims 15-16, wherein the set of reference signals correspond to at least a subset of a set of CSI (Channel State lnformation)-RS

(Reference Signals).

25. The apparatus of claim 24, wherein the set of CSI-RS comprise two or more subsets of CSI-RS, wherein a number of CSI-RS APs (Antenna Ports) for each subset of the two or more subsets of CSI-RS corresponds to a number of APs of an associated diagonal block of the two or more diagonal blocks.

26. A machine readable medium comprising instructions that, when executed, cause a User Equipment to:

receive higher layer signaling indicating one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks;

generate one or more codewords based on the one or more codebook configuration parameters;

receive a set of reference signals;

perform channel measurements on the set of reference signals;

select a best codeword of the one or more codewords based on the channel measurements;

generate a report comprising an index of the best codeword; and

transmit the report to an eNB (Evolved Node B).

27. The machine readable medium of claim 26, wherein each diagonal block of the two or more diagonal blocks is a product of an associated first matrix with an associated second matrix, wherein the associated first matrix determines a set of beams associated with that diagonal block, and wherein the associated second matrix applies beam selection and polarization co-phasing for the set of beams associated with that diagonal block.

28. The machine readable medium of claim 27, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a distinct associated second matrix for that diagonal block.

29. The machine readable medium of claim 27, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a common associated second matrix for each diagonal block of the two or more diagonal blocks.

Description:
CODEBOOK TO SUPPORT NON-COHERENT TRANSMISSION IN COMP (COORDINATED MULTI-POINT) AND NR (NEW RADIO)

REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application No.

62/339,673 filed May 20, 2016, entitled "CODEBOOK TO SUPPORT NON COHERENT TRANSMISSION FOR FeCoMP AND NR", the contents of which are herein

incorporated by reference in their entirety.

FIELD

[0002] The present disclosure relates to wireless technology, and more specifically to techniques and associated codebook structure(s) that can enable non-coherent transmission, for example, for CoMP (Coordinated Multi-Point) and/or NR (New Radio) antenna arrays.

BACKGROUND

[0003] Elevation Beamforming and FD (Full Dimension)-MIMO (Multiple Input Multiple Output) for downlink data transmission was introduced for LTE (Long Term Evolution) in Rel-1 3 (Release 13). The Rel-13 operation of Elevation Beamforming/FD MIMO is based on two types of CSI feedback schemes: (1 ) non-precoded Channel State Information Reference signal (CSI-RS) (i.e., Class A FD-MIMO or (2) beamformed CSI-RS (i.e., Class B FD-MIMO).

[0004] In Class A, each CSI-RS antenna port of CSI-RS resource is transmitted by the evolved Node B (eNB) without beamforming, while in Class B the beamforming on CSI-RS antenna ports is used. The beamforming on CSI-RS antenna ports provides an additional coverage advantage of Class B over Class A schemes. It is expected that the LTE FD-MIMO principles can be reused in the NR MIMO design.

BRIEF DESCRIPTION OF THE DRAWINGS

[0005] FIG. 1 is a block diagram illustrating an example user equipment (UE) useable in connection with various aspects described herein.

[0006] FIG. 2 is a diagram illustrating example components of a device that can be employed in accordance with various aspects discussed herein.

[0007] FIG. 3 is a diagram illustrating example interfaces of baseband circuitry that can be employed in accordance with various aspects discussed herein. [0008] FIG. 4 is a diagram illustrating two antenna array models, cross-polarized and co-polarized, that can be employed in connection with various aspects discussed herein.

[0009] FIG. 5 is a block diagram illustrating a system employable at a UE (User Equipment) that facilitates reception of non-coherent (e.g., CoMP (co-ordinated multipoint)) and/or NR (New Radio)) transmission via a codebook structure and associated techniques, according to various aspects described herein.

[0010] FIG. 6 is a block diagram illustrating a system employable at a BS (Base Station) that facilitates non-coherent (e.g, CoMP and/or NR) transmission via a codebook structure and associated techniques, according to various aspects described herein.

[0011] FIG. 7 is a diagram illustrating an example scenario involving non-coherent transmission from multiple transmission points to a UE, according to various aspects discussed herein.

[0012] FIG. 8 is a diagram illustrating a diagram of an example NR panel array, which can be employed in connection with various aspects discussed herein.

[0013] FIG. 9 is a flow diagram of an example method employable at a UE that facilitates reception of non-coherent transmissions based on a block diagonal codebook, according to various aspects discussed herein.

[0014] FIG. 10 is a flow diagram of an example method employable at a BS that facilitates generation of non-coherent transmissions based on a block diagonal codebook, according to various aspects discussed herein.

DETAILED DESCRIPTION

[0015] The present disclosure will now be described with reference to the attached drawing figures, wherein like reference numerals are used to refer to like elements throughout, and wherein the illustrated structures and devices are not necessarily drawn to scale. As utilized herein, terms "component," "system," "interface," and the like are intended to refer to a computer-related entity, hardware, software (e.g., in execution), and/or firmware. For example, a component can be a processor (e.g., a microprocessor, a controller, or other processing device), a process running on a processor, a controller, an object, an executable, a program, a storage device, a computer, a tablet PC and/or a user equipment (e.g., mobile phone, etc.) with a processing device. By way of illustration, an application running on a server and the server can also be a component. One or more components can reside within a process, and a component can be localized on one computer and/or distributed between two or more computers. A set of elements or a set of other components can be described herein, in which the term "set" can be interpreted as "one or more."

[0016] Further, these components can execute from various computer readable storage media having various data structures stored thereon such as with a module, for example. The components can communicate via local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network, such as, the Internet, a local area network, a wide area network, or similar network with other systems via the signal).

[0017] As another example, a component can be an apparatus with specific functionality provided by mechanical parts operated by electric or electronic circuitry, in which the electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors. The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, a component can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute software and/or firmware that confer(s), at least in part, the functionality of the electronic components.

[0018] Use of the word exemplary is intended to present concepts in a concrete fashion. As used in this application, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless specified otherwise, or clear from context, "X employs A or B" is intended to mean any of the natural inclusive permutations. That is, if X employs A; X employs B; or X employs both A and B, then "X employs A or B" is satisfied under any of the foregoing instances. In addition, the articles "a" and "an" as used in this application and the appended claims should generally be construed to mean "one or more" unless specified otherwise or clear from context to be directed to a singular form. Furthermore, to the extent that the terms "including", "includes", "having", "has", "with", or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term

"comprising." Additionally, in situations wherein one or more numbered items are discussed (e.g., a "first X", a "second X", etc.), in general the one or more numbered items may be distinct or they may be the same, although in some situations the context may indicate that they are distinct or that they are the same. [0019] As used herein, the term "circuitry" may refer to, be part of, or include an Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality. In some embodiments, the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules. In some embodiments, circuitry may include logic, at least partially operable in hardware.

[0020] Embodiments described herein may be implemented into a system using any suitably configured hardware and/or software. FIG. 1 illustrates an architecture of a system 1 00 of a network in accordance with some embodiments. The system 100 is shown to include a user equipment (UE) 101 and a UE 102. The UEs 101 and 102 are illustrated as smartphones (e.g., handheld touchscreen mobile computing devices connectable to one or more cellular networks), but may also comprise any mobile or non-mobile computing device, such as Personal Data Assistants (PDAs), pagers, laptop computers, desktop computers, wireless handsets, or any computing device including a wireless communications interface.

[0021] In some embodiments, any of the UEs 101 and 102 can comprise an Internet of Things (loT) UE, which can comprise a network access layer designed for low-power loT applications utilizing short-lived UE connections. An loT UE can utilize technologies such as machine-to-machine (M2M) or machine-type communications (MTC) for exchanging data with an MTC server or device via a public land mobile network (PLMN), Proximity-Based Service (ProSe) or device-to-device (D2D) communication, sensor networks, or loT networks. The M2M or MTC exchange of data may be a machine-initiated exchange of data. An loT network describes interconnecting loT UEs, which may include uniquely identifiable embedded computing devices (within the Internet infrastructure), with short-lived connections. The loT UEs may execute background applications (e.g., keep-alive messages, status updates, etc.) to facilitate the connections of the loT network.

[0022] The UEs 101 and 102 may be configured to connect, e.g., communicatively couple, with a radio access network (RAN) 1 10— the RAN 1 10 may be, for example, an Evolved Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (E-UTRAN), a NextGen RAN (NG RAN), or some other type of RAN. The UEs 101 and 102 utilize connections 103 and 104, respectively, each of which comprises a physical communications interface or layer (discussed in further detail below); in this example, the connections 103 and 104 are illustrated as an air interface to enable communicative coupling, and can be consistent with cellular communications protocols, such as a Global System for Mobile Communications (GSM) protocol, a code-division multiple access (CDMA) network protocol, a Push-to-Talk (PTT) protocol, a PTT over Cellular (POC) protocol, a Universal Mobile Telecommunications System (UMTS) protocol, a 3GPP Long Term Evolution (LTE) protocol, a fifth generation (5G) protocol, a New Radio (NR) protocol, and the like.

[0023] In this embodiment, the UEs 101 and 1 02 may further directly exchange communication data via a ProSe interface 105. The ProSe interface 105 may

alternatively be referred to as a sidelink interface comprising one or more logical channels, including but not limited to a Physical Sidelink Control Channel (PSCCH), a Physical Sidelink Shared Channel (PSSCH), a Physical Sidelink Discovery Channel (PSDCH), and a Physical Sidelink Broadcast Channel (PSBCH).

[0024] The UE 102 is shown to be configured to access an access point (AP) 106 via connection 107. The connection 107 can comprise a local wireless connection, such as a connection consistent with any IEEE 802.1 1 protocol, wherein the AP 106 would comprise a wireless fidelity (WiFi®) router. In this example, the AP 1 06 is shown to be connected to the Internet without connecting to the core network of the wireless system (described in further detail below).

[0025] The RAN 1 1 0 can include one or more access nodes that enable the connections 1 03 and 104. These access nodes (ANs) can be referred to as base stations (BSs), NodeBs, evolved NodeBs (eNBs), next Generation NodeBs (gNB), RAN nodes, and so forth, and can comprise ground stations (e.g., terrestrial access points) or satellite stations providing coverage within a geographic area (e.g., a cell). The RAN 1 1 0 may include one or more RAN nodes for providing macrocells, e.g., macro RAN node 1 1 1 , and one or more RAN nodes for providing femtocells or picocells (e.g., cells having smaller coverage areas, smaller user capacity, or higher bandwidth compared to macrocells), e.g., low power (LP) RAN node 1 12.

[0026] Any of the RAN nodes 1 1 1 and 1 12 can terminate the air interface protocol and can be the first point of contact for the UEs 101 and 102. In some embodiments, any of the RAN nodes 1 1 1 and 1 12 can fulfill various logical functions for the RAN 1 1 0 including, but not limited to, radio network controller (RNC) functions such as radio bearer management, uplink and downlink dynamic radio resource management and data packet scheduling, and mobility management. [0027] In accordance with some embodiments, the UEs 101 and 102 can be configured to communicate using Orthogonal Frequency-Division Multiplexing (OFDM) communication signals with each other or with any of the RAN nodes 1 1 1 and 1 1 2 over a multicarrier communication channel in accordance various communication techniques, such as, but not limited to, an Orthogonal Frequency-Division Multiple Access (OFDMA) communication technique (e.g., for downlink communications) or a Single Carrier Frequency Division Multiple Access (SC-FDMA) communication technique (e.g., for uplink and ProSe or sidelink communications), although the scope of the embodiments is not limited in this respect. The OFDM signals can comprise a plurality of orthogonal subcarriers.

[0028] In some embodiments, a downlink resource grid can be used for downlink transmissions from any of the RAN nodes 1 1 1 and 1 12 to the UEs 101 and 1 02, while uplink transmissions can utilize similar techniques. The grid can be a time-frequency grid, called a resource grid or time-frequency resource grid, which is the physical resource in the downlink in each slot. Such a time-frequency plane representation is a common practice for OFDM systems, which makes it intuitive for radio resource allocation. Each column and each row of the resource grid corresponds to one OFDM symbol and one OFDM subcarrier, respectively. The duration of the resource grid in the time domain corresponds to one slot in a radio frame. The smallest time-frequency unit in a resource grid is denoted as a resource element. Each resource grid comprises a number of resource blocks, which describe the mapping of certain physical channels to resource elements. Each resource block comprises a collection of resource elements; in the frequency domain, this may represent the smallest quantity of resources that currently can be allocated. There are several different physical downlink channels that are conveyed using such resource blocks.

[0029] The physical downlink shared channel (PDSCH) may carry user data and higher-layer signaling to the UEs 101 and 102. The physical downlink control channel (PDCCH) may carry information about the transport format and resource allocations related to the PDSCH channel, among other things. It may also inform the UEs 101 and 102 about the transport format, resource allocation, and H-ARQ (Hybrid Automatic Repeat Request) information related to the uplink shared channel. Typically, downlink scheduling (assigning control and shared channel resource blocks to the UE 102 within a cell) may be performed at any of the RAN nodes 1 1 1 and 1 12 based on channel quality information fed back from any of the UEs 101 and 102. The downlink resource assignment information may be sent on the PDCCH used for (e.g., assigned to) each of the UEs 101 and 1 02.

[0030] The PDCCH may use control channel elements (CCEs) to convey the control information. Before being mapped to resource elements, the PDCCH complex-valued symbols may first be organized into quadruplets, which may then be permuted using a sub-block interleaver for rate matching. Each PDCCH may be transmitted using one or more of these CCEs, where each CCE may correspond to nine sets of four physical resource elements known as resource element groups (REGs). Four Quadrature Phase Shift Keying (QPSK) symbols may be mapped to each REG. The PDCCH can be transmitted using one or more CCEs, depending on the size of the downlink control information (DCI) and the channel condition. There can be four or more different PDCCH formats defined in LTE with different numbers of CCEs (e.g., aggregation level, L=1 , 2, 4, or 8).

[0031] Some embodiments may use concepts for resource allocation for control channel information that are an extension of the above-described concepts. For example, some embodiments may utilize an enhanced physical downlink control channel (EPDCCH) that uses PDSCH resources for control information transmission. The EPDCCH may be transmitted using one or more enhanced the control channel elements (ECCEs). Similar to above, each ECCE may correspond to nine sets of four physical resource elements known as an enhanced resource element groups (EREGs). An ECCE may have other numbers of EREGs in some situations.

[0032] The RAN 1 1 0 is shown to be communicatively coupled to a core network (CN) 1 20— via an S1 interface 1 1 3. In embodiments, the CN 120 may be an evolved packet core (EPC) network, a NextGen Packet Core (NPC) network, or some other type of CN. In this embodiment the S1 interface 1 13 is split into two parts: the S1 -U interface 1 14, which carries traffic data between the RAN nodes 1 1 1 and 1 12 and the serving gateway (S-GW) 122, and the S1 -mobility management entity (MME) interface 1 15, which is a signaling interface between the RAN nodes 1 1 1 and 1 12 and MMEs 121 .

[0033] In this embodiment, the CN 1 20 comprises the MMEs 121 , the S-GW 122, the Packet Data Network (PDN) Gateway (P-GW) 123, and a home subscriber server (HSS) 124. The MMEs 121 may be similar in function to the control plane of legacy Serving General Packet Radio Service (GPRS) Support Nodes (SGSN). The MMEs 121 may manage mobility aspects in access such as gateway selection and tracking area list management. The HSS 124 may comprise a database for network users, including subscription-related information to support the network entities' handling of communication sessions. The CN 120 may comprise one or several HSSs 124, depending on the number of mobile subscribers, on the capacity of the equipment, on the organization of the network, etc. For example, the HSS 124 can provide support for routing/roaming, authentication, authorization, naming/addressing resolution, location dependencies, etc.

[0034] The S-GW 122 may terminate the S1 interface 1 13 towards the RAN 1 10, and routes data packets between the RAN 1 10 and the CN 120. In addition, the S-GW 122 may be a local mobility anchor point for inter-RAN node handovers and also may provide an anchor for inter-3GPP mobility. Other responsibilities may include lawful intercept, charging, and some policy enforcement.

[0035] The P-GW 123 may terminate an SGi interface toward a PDN. The P-GW 123 may route data packets between the EPC network 123 and external networks such as a network including the application server 130 (alternatively referred to as application function (AF)) via an Internet Protocol (IP) interface 125. Generally, the application server 130 may be an element offering applications that use IP bearer resources with the core network (e.g., UMTS Packet Services (PS) domain, LTE PS data services, etc.). In this embodiment, the P-GW 123 is shown to be communicatively coupled to an application server 130 via an IP communications interface 125. The application server 130 can also be configured to support one or more communication services (e.g., Voice-over-Internet Protocol (VoIP) sessions, PTT sessions, group communication sessions, social networking services, etc.) for the UEs 101 and 102 via the CN 120.

[0036] The P-GW 123 may further be a node for policy enforcement and charging data collection. Policy and Charging Enforcement Function (PCRF) 126 is the policy and charging control element of the CN 120. In a non-roaming scenario, there may be a single PCRF in the Home Public Land Mobile Network (HPLMN) associated with a UE's Internet Protocol Connectivity Access Network (IP-CAN) session. In a roaming scenario with local breakout of traffic, there may be two PCRFs associated with a UE's IP-CAN session: a Home PCRF (H-PCRF) within a HPLMN and a Visited PCRF (V-PCRF) within a Visited Public Land Mobile Network (VPLMN). The PCRF 126 may be communicatively coupled to the application server 130 via the P-GW 123. The application server 130 may signal the PCRF 126 to indicate a new service flow and select the appropriate Quality of Service (QoS) and charging parameters. The PCRF 126 may provision this rule into a Policy and Charging Enforcement Function (PCEF) (not shown) with the appropriate traffic flow template (TFT) and QoS class of identifier (QCI), which commences the QoS and charging as specified by the application server 130.

[0037] FIG. 2 illustrates example components of a device 200 in accordance with some embodiments. In some embodiments, the device 200 may include application circuitry 202, baseband circuitry 204, Radio Frequency (RF) circuitry 206, front-end module (FEM) circuitry 208, one or more antennas 21 0, and power management circuitry (PMC) 21 2 coupled together at least as shown. The components of the illustrated device 200 may be included in a UE or a RAN node. In some embodiments, the device 200 may include less elements (e.g., a RAN node may not utilize application circuitry 202, and instead include a processor/controller to process IP data received from an EPC). In some embodiments, the device 200 may include additional elements such as, for example, memory/storage, display, camera, sensor, or input/output (I/O) interface. In other embodiments, the components described below may be included in more than one device (e.g., said circuitries may be separately included in more than one device for Cloud-RAN (C-RAN) implementations).

[0038] The application circuitry 202 may include one or more application processors. For example, the application circuitry 202 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and dedicated processors (e.g., graphics processors, application processors, etc.). The processors may be coupled with or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications or operating systems to run on the device 200. In some embodiments, processors of application circuitry 202 may process IP data packets received from an EPC.

[0039] The baseband circuitry 204 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The baseband circuitry 204 may include one or more baseband processors or control logic to process baseband signals received from a receive signal path of the RF circuitry 206 and to generate baseband signals for a transmit signal path of the RF circuitry 206. Baseband processing circuity 204 may interface with the application circuitry 202 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 206. For example, in some embodiments, the baseband circuitry 204 may include a third generation (3G) baseband processor 204A, a fourth generation (4G) baseband processor 204B, a fifth generation (5G) baseband processor 204C, or other baseband processor(s) 204D for other existing generations, generations in development or to be developed in the future (e.g., second generation (2G), sixth generation (6G), etc.). The baseband circuitry 204 (e.g., one or more of baseband processors 204A-D) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry 206. In other embodiments, some or all of the functionality of baseband processors 204A-D may be included in modules stored in the memory 204G and executed via a Central Processing Unit (CPU) 204E. The radio control functions may include, but are not limited to, signal modulation/demodulation, encoding/decoding, radio frequency shifting, etc. In some embodiments, modulation/demodulation circuitry of the baseband circuitry 204 may include Fast-Fourier Transform (FFT), precoding, or constellation mapping/demapping functionality. In some embodiments,

encoding/decoding circuitry of the baseband circuitry 204 may include convolution, tail- biting convolution, turbo, Viterbi, or Low Density Parity Check (LDPC) encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functionality are not limited to these examples and may include other suitable functionality in other embodiments.

[0040] In some embodiments, the baseband circuitry 204 may include one or more audio digital signal processor(s) (DSP) 204F. The audio DSP(s) 204F may be include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments. Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry 204 and the application circuitry 202 may be implemented together such as, for example, on a system on a chip (SOC).

[0041] In some embodiments, the baseband circuitry 204 may provide for communication compatible with one or more radio technologies. For example, in some embodiments, the baseband circuitry 204 may support communication with an evolved universal terrestrial radio access network (EUTRAN) or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), a wireless personal area network (WPAN). Embodiments in which the baseband circuitry 204 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.

[0042] RF circuitry 206 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuitry 206 may include switches, filters, amplifiers, etc. to facilitate the communication with the wireless network. RF circuitry 206 may include a receive signal path which may include circuitry to down-convert RF signals received from the FEM circuitry 208 and provide baseband signals to the baseband circuitry 204. RF circuitry 206 may also include a transmit signal path which may include circuitry to up-convert baseband signals provided by the baseband circuitry 204 and provide RF output signals to the FEM circuitry 208 for transmission.

[0043] In some embodiments, the receive signal path of the RF circuitry 206 may include mixer circuitry 206a, amplifier circuitry 206b and filter circuitry 206c. In some embodiments, the transmit signal path of the RF circuitry 206 may include filter circuitry 206c and mixer circuitry 206a. RF circuitry 206 may also include synthesizer circuitry 206d for synthesizing a frequency for use by the mixer circuitry 206a of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 206a of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 208 based on the synthesized frequency provided by synthesizer circuitry 206d. The amplifier circuitry 206b may be configured to amplify the down- converted signals and the filter circuitry 206c may be a low-pass filter (LPF) or bandpass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry 204 for further processing. In some embodiments, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 206a of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.

[0044] In some embodiments, the mixer circuitry 206a of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 206d to generate RF output signals for the FEM circuitry 208. The baseband signals may be provided by the baseband circuitry 204 and may be filtered by filter circuitry 206c.

[0045] In some embodiments, the mixer circuitry 206a of the receive signal path and the mixer circuitry 206a of the transmit signal path may include two or more mixers and may be arranged for quadrature downconversion and upconversion, respectively. In some embodiments, the mixer circuitry 206a of the receive signal path and the mixer circuitry 206a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 206a of the receive signal path and the mixer circuitry 206a may be arranged for direct downconversion and direct upconversion, respectively. In some embodiments, the mixer circuitry 206a of the receive signal path and the mixer circuitry 206a of the transmit signal path may be configured for super-heterodyne operation.

[0046] In some embodiments, the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternate embodiments, the output baseband signals and the input baseband signals may be digital baseband signals. In these alternate embodiments, the RF circuitry 206 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry and the baseband circuitry 204 may include a digital baseband interface to communicate with the RF circuitry 206.

[0047] In some dual-mode embodiments, a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the

embodiments is not limited in this respect.

[0048] In some embodiments, the synthesizer circuitry 206d may be a fractional-N synthesizer or a fractional N/N+1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 206d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.

[0049] The synthesizer circuitry 206d may be configured to synthesize an output frequency for use by the mixer circuitry 206a of the RF circuitry 206 based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 206d may be a fractional N/N+1 synthesizer.

[0050] In some embodiments, frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a requirement. Divider control input may be provided by either the baseband circuitry 204 or the applications processor 202 depending on the desired output frequency. In some embodiments, a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the applications processor 202.

[0051] Synthesizer circuitry 206d of the RF circuitry 206 may include a divider, a delay-locked loop (DLL), a multiplexer and a phase accumulator. In some embodiments, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump and a D-type flip- flop. In these embodiments, the delay elements may be configured to break a VCO period up into Nd equal packets of phase, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[0052] In some embodiments, synthesizer circuitry 206d may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (fLO). In some embodiments, the RF circuitry 206 may include an IQ/polar converter.

[0053] FEM circuitry 208 may include a receive signal path which may include circuitry configured to operate on RF signals received from one or more antennas 210, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 206 for further processing. FEM circuitry 208 may also include a transmit signal path which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 206 for transmission by one or more of the one or more antennas 21 0. In various embodiments, the amplification through the transmit or receive signal paths may be done solely in the RF circuitry 206, solely in the FEM 208, or in both the RF circuitry 206 and the FEM 208.

[0054] In some embodiments, the FEM circuitry 208 may include a TX/RX switch to switch between transmit mode and receive mode operation. The FEM circuitry may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry may include an LNA to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 206). The transmit signal path of the FEM circuitry 208 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 206), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 210).

[0055] In some embodiments, the PMC 212 may manage power provided to the baseband circuitry 204. In particular, the PMC 21 2 may control power-source selection, voltage scaling, battery charging, or DC-to-DC conversion. The PMC 212 may often be included when the device 200 is capable of being powered by a battery, for example, when the device is included in a UE. The PMC 21 2 may increase the power conversion efficiency while providing desirable implementation size and heat dissipation

characteristics.

[0056] While FIG. 2 shows the PMC 212 coupled only with the baseband circuitry 204. However, in other embodiments, the PMC 2 12 may be additionally or alternatively coupled with, and perform similar power management operations for, other components such as, but not limited to, application circuitry 202, RF circuitry 206, or FEM 208.

[0057] In some embodiments, the PMC 212 may control, or otherwise be part of, various power saving mechanisms of the device 200. For example, if the device 200 is in an RRC_Connected state, where it is still connected to the RAN node as it expects to receive traffic shortly, then it may enter a state known as Discontinuous Reception Mode (DRX) after a period of inactivity. During this state, the device 200 may power down for brief intervals of time and thus save power.

[0058] If there is no data traffic activity for an extended period of time, then the device 200 may transition off to an RRCJdle state, where it disconnects from the network and does not perform operations such as channel quality feedback, handover, etc. The device 200 goes into a very low power state and it performs paging where again it periodically wakes up to listen to the network and then powers down again. The device 200 may not receive data in this state, in order to receive data, it must transition back to RRC_Connected state.

[0059] An additional power saving mode may allow a device to be unavailable to the network for periods longer than a paging interval (ranging from seconds to a few hours). During this time, the device is totally unreachable to the network and may power down completely. Any data sent during this time incurs a large delay and it is assumed the delay is acceptable.

[0060] Processors of the application circuitry 202 and processors of the baseband circuitry 204 may be used to execute elements of one or more instances of a protocol stack. For example, processors of the baseband circuitry 204, alone or in combination, may be used execute Layer 3, Layer 2, or Layer 1 functionality, while processors of the application circuitry 204 may utilize data (e.g., packet data) received from these layers and further execute Layer 4 functionality (e.g., transmission communication protocol (TCP) and user datagram protocol (UDP) layers). As referred to herein, Layer 3 may comprise a radio resource control (RRC) layer, described in further detail below. As referred to herein, Layer 2 may comprise a medium access control (MAC) layer, a radio link control (RLC) layer, and a packet data convergence protocol (PDCP) layer, described in further detail below. As referred to herein, Layer 1 may comprise a physical (PHY) layer of a UE/RAN node, described in further detail below.

[0061] FIG. 3 illustrates example interfaces of baseband circuitry in accordance with some embodiments. As discussed above, the baseband circuitry 204 of FIG. 2 may comprise processors 204A-204E and a memory 204G utilized by said processors. Each of the processors 204A-204E may include a memory interface, 304A-304E,

respectively, to send/receive data to/from the memory 204G.

[0062] The baseband circuitry 204 may further include one or more interfaces to communicatively couple to other circuitries/devices, such as a memory interface 312 (e.g., an interface to send/receive data to/from memory external to the baseband circuitry 204), an application circuitry interface 314 (e.g., an interface to send/receive data to/from the application circuitry 202 of FIG. 2), an RF circuitry interface 316 (e.g., an interface to send/receive data to/from RF circuitry 206 of FIG. 2), a wireless hardware connectivity interface 31 8 (e.g., an interface to send/receive data to/from Near Field Communication (NFC) components, Bluetooth® components (e.g., Bluetooth® Low Energy), Wi-Fi® components, and other communication components), and a power management interface 320 (e.g., an interface to send/receive power or control signals to/from the PMC 212).

[0063] Referring to FIG. 4, illustrated is a diagram showing two antenna array models, cross-polarized and co-polarized, that can be employed in connection with various aspects discussed herein. The antenna array discussed in 3GPP (Third

Generation Partnership Project) TR (Technical Report) 36.897 for MIMO design is a 2D (Two Dimensional) planar antenna array, where antenna elements can be placed in the vertical and horizontal direction as illustrated in FIG. 4, where N is the number of columns, M is the number of antenna elements with the same polarization in each column. Antenna elements can be uniformly spaced in the horizontal direction with a spacing of dH and in the vertical direction with a spacing of dV.

[0064] Referring to FIG. 5, illustrated is a block diagram of a system 500 employable at a UE (User Equipment) that facilitates reception of non-coherent (e.g., CoMP (coordinated multi-point)) and/or NR (New Radio)) transmission via a codebook structure and associated techniques, according to various aspects described herein. System 500 can include one or more processors 510 (e.g., one or more baseband processors such as one or more of the baseband processors discussed in connection with FIG. 2 and/or FIG. 3) comprising processing circuitry and associated memory interface(s) (e.g., memory interface(s) discussed in connection with FIG. 3), transceiver circuitry 520 (e.g., comprising one or more of transmitter circuitry or receiver circuitry, which can employ common circuit elements, distinct circuit elements, or a combination thereof), and a memory 530 (which can comprise any of a variety of storage mediums and can store instructions and/or data associated with one or more of processor(s) 510 or transceiver circuitry 520). In various aspects, system 500 can be included within a user equipment (UE). As described in greater detail below, system 500 can facilitate reception of noncoherent transmission(s) at a UE based on a block diagonal codebook and associated techniques discussed herein.

[0065] Referring to FIG. 6, illustrated is a block diagram of a system 600 employable at a BS (Base Station) that facilitates non-coherent (e.g, CoMP and/or NR) transmission via a codebook structure and associated techniques, according to various aspects described herein. System 600 can include one or more processors 61 0 (e.g., one or more baseband processors such as one or more of the baseband processors discussed in connection with FIG. 2 and/or FIG. 3) comprising processing circuitry and associated memory interface(s) (e.g., memory interface(s) discussed in connection with FIG. 3), communication circuitry 620 (e.g., which can comprise circuitry for one or more wired (e.g., X2, etc.) connections and/or transceiver circuitry that can comprise one or more of transmitter circuitry (e.g., associated with one or more transmit chains) or receiver circuitry (e.g., associated with one or more receive chains), wherein the transmitter circuitry and receiver circuitry can employ common circuit elements, distinct circuit elements, or a combination thereof), and memory 630 (which can comprise any of a variety of storage mediums and can store instructions and/or data associated with one or more of processor(s) 610 or communication circuitry 620). In various aspects, system 600 can be included within an Evolved Universal Terrestrial Radio Access Network (E- UTRAN) Node B (Evolved Node B, eNodeB, or eNB) or other base station in a wireless communications network. In some aspects, the processor(s) 610, communication circuitry 620, and the memory 630 can be included in a single device, while in other aspects, they can be included in different devices, such as part of a distributed architecture. As described in greater detail below, system 600 can facilitate noncoherent transmission (e.g., CoMP and/or NR) by a BS based on a block diagonal codebook and associated techniques discussed herein.

[0066] In various aspects discussed herein, signals and/or messages can be generated and output for transmission, and/or transmitted messages can be received and processed. Depending on the type of signal or message generated, outputting for transmission (e.g., by processor(s) 510, processor(s) 610, etc.) can comprise one or more of the following: generating a set of associated bits that indicate the content of the signal or message, coding (e.g., which can include adding a cyclic redundancy check (CRC) and/or coding via one or more of turbo code, low density parity-check (LDPC) code, tailbiting convolution code (TBCC), etc.), scrambling (e.g., based on a scrambling seed), modulating (e.g., via one of binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), or some form of quadrature amplitude modulation (QAM), etc.), and/or resource mapping (e.g., to a scheduled set of resources, to a set of time and frequency resources granted for uplink transmission, etc.). Depending on the type of received signal or message, processing (e.g., by processor(s) 510, processor(s) 61 0, etc.) can comprise one or more of: identifying physical resources associated with the signal/message, detecting the signal/message, resource element group deinterleaving, demodulation, descrambling, and/or decoding.

[0067] The Class A codebook for a uniform antenna array has W ! W 2 , where the \Ν code word can be composed from two DFT (Discrete Fourier Transform) vectors and follow a KP (Kronecker Product) structure, for example, (a) X t is Oi oversampled DFT

vector of length Λ ι : i7j = [ 1 and (b) X 2 is 0 2 oversampled

DFT vector of length A/ 2 : v l = e J2 ^o ~1); ] , where Ή is as in equation

(1 ): where Ni and N 2 correspond to the number of APs (Antenna Ports) in the first and second dimension (e.g., m 1 is horizontal and m 2 is vertical, or vice versa), and 0 1 and 0 2 correspond to the DFT (beam) oversampling.

[0068] In various aspects discussed herein, non-coherent transmission can be employed as a MIMO (Multiple Input Multiple Output) scheme between one or more BSs employing a system 600 and one or more UEs employing a system 500, where the MIMO layer (e.g., generated by processor(s) 610) can be sent (e.g., via communication circuitry 620) with the precoding using a subset of antenna ports (e.g., which can be a proper subset wherein not all antenna ports are used to send the MIMO layer with that precoding), which can be received via transceiver circuitry 520 and processed (e.g., in a manner that can depend on the type of signal/message) by processor(s) 510. Referring to FIG. 7, illustrated is a diagram of an example scenario involving non-coherent transmission from multiple transmission points (71 OA and 71 OB, each of which can comprise an embodiment of system 600) to a UE (720, which can comprise an embodiment of system 500), according to various aspects discussed herein.

[0069] In conventional Ml MO systems, only coherent transmission has been employed, where the Ml MO layer can be transmitted only using all antenna ports. In practice, however, in many scenarios such coherent transmission of the MIMO layer with precoding across all antenna ports is not always possible. For example, in multipoint scenarios, due to time and frequency synchronization errors, the antenna ports for antennas on different transmission points are no calibrated. In single point scenarios, it is also possible that different antenna sets (e.g., antenna panels in NR aspects, antenna panels and/or antenna arrays in CoMP aspects) may not be calibrated or synchronized, making precoding across all antenna ports less feasible.

[0070] In various aspects, techniques discussed herein can be employed to facilitate transmissions from TPs comprising one or more NR panel arrays. The antenna model for NR can be a generalized version of the antenna array of 3GPP (Third Generation Partnership Project TR 36.897, which can allow for more freedom in the placement of antennas as follows. The 1 D/2D antenna array as in TR 36.897 (e.g., as illustrated in FIG. 4) can be considered an antenna panel, which can comprise (Μ,Ν,Ρ) antenna elements (e.g., M (# of columns) χ N (# of rows) χ P (# of polarizations)), as described in connection with FD-MIMO aspects of TR 36.897. Referring to FIG. 8, illustrated is a diagram of an example NR panel array, which can be employed in connection with various aspects discussed herein. A uniform 1 D/2D rectangular panel array can comprise (Mg,Ng) antenna panels per column and row respectively, and can have uniform (d g, H, d g, v) panel spacing in the horizontal and vertical directions, respectively.

[0071] In general, the panels in the NR antenna model may not be calibrated and even may not be synchronized. In such scenarios, precoding across antenna ports corresponding to all antenna arrays may not be feasible.

[0072] In various aspects, a block diagonal codebook structure discussed herein can be employed in a variety of scenarios involving non-coherent transmissions, such as CoMP and/or transmissions via a NR antenna array.

[0073] Various embodiments can employ a block diagonal codebook structure to support non coherent transmission from different antenna arrays (e.g., via

communication circuitry 620 of signaling generated by processor(s) 61 0, which can be received via transceiver circuitry 520 and processed via processor(s) 51 0 to reconstruct the signal(s) based on the block diagonal codebook structure). In various aspects, each block of the precoder can have a Kronecker product structure to support beamforming on an associated subset of antenna ports. Equation (2), below, provides an example of a block diagonal precoder structure for an embodiment involving two groups of antenna ports:

W ^wfw o

(2) o w 1 (2) w 2) w( i ) w (2)

where 1 and 1 are the matrices determining the subset of the beams for antenna groups 1 and 2 (e.g., which can correspond to disjoint (e.g. non-overlapping) sets of

w( i ) w (2)

antenna ports), respectively, and 2 and 2 are the beam selection and polarization co-phasing matrices for antenna groups 1 and 2, respectively. In some embodiments, a common beam selection and polarization co-phasing matrix j can be employed for

w( i ) w (2)

both 2 and 2 , as shown in the example of equation (3):

[0074] Aspects employing a common beam selection and polarization co-phasing matrix can have reduced overhead, but can potentially have reduced performance.

w( i ) w (2)

[0075] In various aspects, the structure of 1 and 1 in can follow the Kronecker product structure of a conventional Class A codebook, where each column in the matrix can correspond to the DFT vectors, such that: (a) X t is an Oi oversampled DFT vector of length N^. v l = e J27 ^o ~1); ] and (b) X 2 is an 0 2 oversampled DFT vector of length N 2 : v l = [ 1 e 2≤ ¾f§ ^] i , with Ή as in equation (4):

w(') W

[0076] Additionally, in various aspects, the structure of 2 and 2 or 2 can also follow the structure of a conventional Class A codebook and can comprise the selection vectors (e.g., vectors comprising "0"s and/or "1 "s) multiplied by complex co- phasing elements exp{ja} responsible for beam co-phasing(s) corresponding to different antenna element polarization(s).

[0077] In some aspects, the CSI-RS APs (antenna ports) for CSI feedback transmitted by the antenna array of the serving TP(s) can be non-QCL-ed (non-Quasi Co-Located) with each other with respect to timing offset, delay spread, frequency offset and gain (e.g., wherein processor(s) 510 can separately measure and/or determine characteristics/parameters for antenna ports which are non-QCL-ed). In other aspects, however, two or more groups of antenna ports can be quasi co-located (e.g., wherein processor(s) 510 can assume that characteristics/parameters for which antenna ports are QCL-ed have identical values for the QCL-ed APs) but not necessarily quasi co- located with another antenna port group. In various aspects, whether groups of antenna ports are QCL-ed can be indicated via higher layer (e.g., RRC (Radio Resource

Control), etc.) signaling (e.g., generated by processor(s) 610, transmitted by

communication circuitry 620, received by transceiver circuitry 520, and processed by processor(s) 510).

[0078] In various aspects, block diagonal codebooks and associated techniques discussed herein can be employed to facilitate non-coherent transmissions.

[0079] For the purposes of illustration, various examples are provided herein for two antenna groups (e.g., antenna arrays and/or antenna panels), wherein the block diagonal codebook structure comprises two diagonal blocks, indicated by superscript (e.g., (1) and (2) ). However, in various aspects, techniques discussed herein can be employed in connection with two or more (e.g., N for N>2) antenna groups (e.g., antenna arrays and/or antenna panels), wherein the block diagonal codebook structure can comprise two or more diagonal (e.g., N for N>2) blocks that can be indicated by superscript (e.g., (1) to (N) ).

[0080] In a first example technique, one or more codebook configuration parameters

(e.g., generated by processor(s) 61 0, for example, in higher layer (e.g., RRC) signaling) can be signaled from an eNB (or other TP or BS, e.g., transmitted via communication circuitry 620) to a UE (e.g., which can receive the codebook configuration parameter(s) via transceiver circuitry 520, process the codebook configuration parameter(s) via processor(s) 510, which can also send the codebook configuration parameter(s) to a memory 530 via a memory interface of processor(s) 510). In various aspects, the codebook configuration parameter(s) can correspond to a codebook with a block diagonal structure associated with two or more subsets (e.g., disjoint subsets) of antenna ports, as described in greater detail herein. The UE can generate (e.g., via processor(s) 510) codewords based at least in part on the indicated codebook configuration parameter(s). The eNB can generate (e.g., via processor(s) 610) and transmit (e.g., via communication circuitry 620) reference signals (e.g., CSI (Channel State lnformation)-RS (Reference Signals), etc.) in connection with at least one of the subsets of antenna ports. The UE can receive (e.g., via transceiver circuitry 520) the reference signals and can perform channel measurements (e.g., via processor(s) 510) on the reference signals. Based on the performed channel measurements, the UE can generate (e.g., via processor(s) 51 0) one or more CSI parameters such as CQI (Channel Quality Indicator), PMI (Precoding Matrix Indicator), Rl (Rank Indicator), PTI (Precoding Type Indicator), and/or CRI (CSI Resource Indicator). The UE can select (e.g., via processor(s) 510) a best codeword of the generated codewords from the codebook based on the channel measurements. The UE can report the index of the selected best codeword to the eNB along with other information determined based on the reference signals (e.g., along with other CSI information (e.g., one or more CSI parameters, as part of a CSI report) generated by processor(s) 510 and transmitted via transceiver circuitry 520 (e.g., which can be received via communication circuitry 620 and processed by processor(s) 620).

[0081] In various aspects of the first example technique, the block diagonal codebook can comprise precoding matrices containing two or more sets of vectors that apply precoding to the two or more subsets of antenna ports. In various such aspects, each vector of the two or more sets of vectors can comprise a concatenation of a zero vector and a non-zero vector in a different order. In various such aspects, each vector comprising one or more non-zero elements can correspond to a Kronecker product of one or more DFT vectors.

[0082] Additionally, in various aspects of the first example technique, the codebook configuration parameter(s) can comprise a number of blocks in the block diagonal matrix.

[0083] Additionally, in various aspects of the first example technique, the codebook configuration parameter(s) can comprise an associated number of antenna ports for each block (e.g., which can determine the number of rows in the block) in the block diagonal matrix. In various such aspects, the codebook configuration parameter(s) comprise the associated number of antenna ports in the block and an associated DFT oversampling for each block.

[0084] Additionally, in various aspects of the first example technique, the reference signals generated by the eNB (e.g., via processor(s) 61 ) can comprise Channel State Information reference signals (CSI-RS). In various such aspects, the number of antenna ports for CSI-RS can correspond to the number of antenna ports in each block of the block diagonal matrix. In various such aspects, the CSI-RS can comprise two or more CSI-RS resource configurations. In various such aspects, the CSI-RS antenna ports can be non-quasi co-located with each other with respect to timing offset, delay spread, frequency offset and gain. In other such aspects, the CSI-RS antenna ports can be non- quasi co-located between CSI-RS resource configurations and can be quasi co-located within each CSI-RS resource configuration.

[0085] Referring to FIG. 9, illustrated is a flow diagram of an example method 900 employable at a UE that facilitates reception of non-coherent transmissions based on a block diagonal codebook, according to various aspects discussed herein. In other aspects, a machine readable medium can store instructions associated with method 900 that, when executed, can cause a UE to perform the acts of method 900.

[0086] At 910, one or more codebook configuration parameters corresponding to a block diagonal structure can be received from an eNB.

[0087] At 920, one or more codewords can be generated based on the codebook configuration parameters.

[0088] At 930, receive reference signals transmitted by an eNB.

[0089] At 940, channel measurements can be performed based on the received reference signals.

[0090] At 950, a best codeword of the one or more codewords can be selected based at least in part on the channel measurements.

[0091] At 960, an index of the best codeword can be reported to the eNB along with other CSI information.

[0092] Additionally or alternatively, method 900 can include one or more other acts described herein in connection with system 500.

[0093] Referring to FIG. 10, illustrated is a flow diagram of an example method 1 000 employable at a BS that facilitates generation of non-coherent transmissions based on a block diagonal codebook, according to various aspects discussed herein. In other aspects, a machine readable medium can store instructions associated with method 1000 that, when executed, can cause a BS to perform the acts of method 1000. [0094] At 1010, one or more codebook configuration parameters corresponding to a block diagonal structure can be transmitted to a UE.

[0095] At 1020, a set of reference signals (e.g., CSI-RS) can be transmitted to the UE.

[0096] At 1030, a report can be received from the UE indicating CSI information and a best codeword of a codebook based on the codebook configuration parameters.

[0097] Additionally or alternatively, method 1000 can include one or more other acts described herein in connection with system 600.

[0098] Examples herein can include subject matter such as a method, means for performing acts or blocks of the method, at least one machine-readable medium including executable instructions that, when performed by a machine (e.g., a processor with memory, an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or the like) cause the machine to perform acts of the method or of an apparatus or system for concurrent communication using multiple communication technologies according to embodiments and examples described.

[0099] Example 1 is an apparatus configured to be employed in a User Equipment (UE), comprising: a memory interface; and processing circuitry configured to: process higher layer signaling that indicates one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks; generate one or more codewords based on the one or more codebook configuration parameters; perform channel measurements on a set of reference signals; select a best codeword of the one or more codewords based on the channel

measurements; generate a report comprising an index of the best codeword; and send the one or more codebook configuration parameters to a memory via the memory interface.

[00100] Example 2 comprises the subject matter of any variation of any of example(s) 1 , wherein each diagonal block of the two or more diagonal blocks is associated with a distinct set of antenna ports.

[00101 ] Example 3 comprises the subject matter of any variation of any of example(s) 1 -2, wherein each diagonal block of the two or more diagonal blocks is a product of an associated first matrix with an associated second matrix, wherein the associated first matrix determines a set of beams associated with that diagonal block, and wherein the associated second matrix applies beam selection and polarization co-phasing for the set of beams associated with that diagonal block. [00102] Example 4 comprises the subject matter of any variation of any of example(s) 3, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a distinct associated second matrix for that diagonal block.

[00103] Example 5 comprises the subject matter of any variation of any of example(s) 3, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a common associated second matrix for each diagonal block of the two or more diagonal blocks.

[00104] Example 6 comprises the subject matter of any variation of any of example(s) 3, wherein, for each diagonal block of the two or more diagonal blocks, each column of the associated first matrix corresponds to an oversampled DFT (Discrete Fourier Transform) vector.

[00105] Example 7 comprises the subject matter of any variation of any of example(s) 1 -2, wherein the one or more codebook configuration parameters comprise a number of diagonal blocks of the two or more diagonal blocks.

[00106] Example 8 comprises the subject matter of any variation of any of example(s) 1 -2, wherein the one or more codebook configuration parameters comprise a number of antenna ports associated with each block of the two or more diagonal blocks.

[00107] Example 9 comprises the subject matter of any variation of any of example(s) 8, wherein the one or more codebook configuration parameters comprise a DFT (Discrete Fourier Transform) oversampling for each block of the two or more blocks.

[00108] Example 10 comprises the subject matter of any variation of any of example(s) 1 -2, wherein the set of reference signals comprises a set of CSI (Channel State lnformation)-RS (Reference Signals).

[00109] Example 1 1 comprises the subject matter of any variation of any of example(s) 10, wherein the set of CSI-RS comprise two or more subsets of CSI-RS, wherein a number of CSI-RS APs (Antenna Ports) for each subset of the two or more subsets of CSI-RS corresponds to a number of APs of an associated diagonal block of the two or more diagonal blocks.

[001 10] Example 12 comprises the subject matter of any variation of any of example(s) 10, wherein the set of CSI-RS comprises two or more distinct CSI-RS resource configurations.

[001 11 ] Example 13 comprises the subject matter of any variation of any of example(s) 12, wherein the CSI-RS APs are non-QCL-ed (Quasi Co-Located) with respect to a timing offset, a delay spread, a frequency offset, and a gain. [001 12] Example 14 comprises the subject matter of any variation of any of example(s) 12, wherein, for each subset of CSI-RS of the two or more subsets of CSI- RS, each CSI-RS AP of that subset of CSI-RS is QCL-ed (Quasi Co-Located) with CSI- RS APs of that subset of CSI-RS and non-QCL-ed with other CSI-RS APs, with respect to a timing offset, a delay spread, a frequency offset, and a gain.

[001 13] Example 15 comprises the subject matter of any variation of any of example(s) 3-5, wherein, for each diagonal block of the two or more diagonal blocks, each column of the associated first matrix corresponds to an oversampled DFT

(Discrete Fourier Transform) vector.

[001 14] Example 16 comprises the subject matter of any variation of any of example(s) 1 -6, wherein the one or more codebook configuration parameters comprise a number of diagonal blocks of the two or more diagonal blocks.

[001 15] Example 17 comprises the subject matter of any variation of any of example(s) 1 -7, wherein the one or more codebook configuration parameters comprise a number of antenna ports associated with each block of the two or more diagonal blocks.

[001 16] Example 18 comprises the subject matter of any variation of any of example(s) 1 -9, wherein the set of reference signals comprises a set of CSI (Channel State lnformation)-RS (Reference Signals).

[001 17] Example 19 comprises the subject matter of any variation of any of example(s) 10-1 1 , wherein the set of CSI-RS comprises two or more distinct CSI-RS resource configurations.

[001 18] Example 20 is an apparatus configured to be employed in an Evolved NodeB (eNB), comprising: a memory interface; and processing circuitry configured to: generate higher layer signaling indicating one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks; generate a set of reference signals; process a report based on the set of reference signals, wherein the report indicates an index of a best codeword associated with the block diagonal codebook structure; and send the one or more codebook configuration parameters to a memory via the memory interface.

[001 19] Example 21 comprises the subject matter of any variation of any of example(s) 20, wherein each diagonal block of the two or more diagonal blocks is associated with a distinct set of antenna ports.

[00120] Example 22 comprises the subject matter of any variation of any of example(s) 20-21 , wherein each diagonal block of the two or more diagonal blocks is a product of an associated W1 matrix that determines a subset of beams associated with that diagonal block with an associated W2 matrix that applies beam selection and co- phasing for that diagonal block.

[00121 ] Example 23 comprises the subject matter of any variation of any of example(s) 22, wherein, for each diagonal block of the two or more diagonal blocks, the associated W2 matrix is a common W2 matrix.

[00122] Example 24 comprises the subject matter of any variation of any of example(s) 22, wherein, for each diagonal block of the two or more diagonal blocks, the associated W2 matrix is a distinct associated W2 matrix for that diagonal block.

[00123] Example 25 comprises the subject matter of any variation of any of example(s) 22, wherein, for each diagonal block of the two or more diagonal blocks, the associated W1 matrix is a Kronecker product of one or more DFT (Discrete Fourier Transform) vectors.

[00124] Example 26 comprises the subject matter of any variation of any of example(s) 20-21 , wherein the one or more codebook configuration parameters comprise a number of diagonal blocks of the two or more diagonal blocks.

[00125] Example 27 comprises the subject matter of any variation of any of example(s) 20-21 , wherein the one or more codebook configuration parameters comprise a number of antenna ports associated with each block of the two or more diagonal blocks.

[00126] Example 28 comprises the subject matter of any variation of any of example(s) 27, wherein the one or more codebook configuration parameters comprise a DFT (Discrete Fourier Transform) oversampling for each block of the two or more blocks.

[00127] Example 29 comprises the subject matter of any variation of any of example(s) 20-21 , wherein the set of reference signals correspond to at least a subset of a set of CSI (Channel State lnformation)-RS (Reference Signals).

[00128] Example 30 comprises the subject matter of any variation of any of example(s) 29, wherein the set of CSI-RS comprise two or more subsets of CSI-RS, wherein a number of CSI-RS APs (Antenna Ports) for each subset of the two or more subsets of CSI-RS corresponds to a number of APs of an associated diagonal block of the two or more diagonal blocks.

[00129] Example 31 is a machine readable medium comprising instructions that, when executed, cause a User Equipment to: receive higher layer signaling indicating one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks; generate one or more codewords based on the one or more codebook configuration parameters; receive a set of reference signals; perform channel measurements on the set of reference signals; select a best codeword of the one or more codewords based on the channel measurements; generate a report comprising an index of the best codeword; and transmit the report to an eNB (Evolved Node B).

[00130] Example 32 comprises the subject matter of any variation of any of example(s) 31 , wherein each diagonal block of the two or more diagonal blocks is a product of an associated first matrix with an associated second matrix, wherein the associated first matrix determines a set of beams associated with that diagonal block, and wherein the associated second matrix applies beam selection and polarization co- phasing for the set of beams associated with that diagonal block.

[00131 ] Example 33 comprises the subject matter of any variation of any of example(s) 32, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a distinct associated second matrix for that diagonal block.

[00132] Example 34 comprises the subject matter of any variation of any of example(s) 32, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a common associated second matrix for each diagonal block of the two or more diagonal blocks.

[00133] Example 35 is an apparatus configured to be employed in a User Equipment (UE), comprising: means for receiving higher layer signaling indicating one or more codebook configuration parameters associated with a block diagonal codebook structure comprising two or more diagonal blocks; means for generating one or more codewords based on the one or more codebook configuration parameters; means for receiving a set of reference signals; means for performing channel measurements on the set of reference signals; means for selecting a best codeword of the one or more codewords based on the channel measurements; means for generating a report comprising an index of the best codeword; and means for transmitting the report to an eNB (Evolved Node B).

[00134] Example 36 comprises the subject matter of any variation of any of example(s) 35, wherein each diagonal block of the two or more diagonal blocks is a product of an associated first matrix with an associated second matrix, wherein the associated first matrix determines a set of beams associated with that diagonal block, and wherein the associated second matrix applies beam selection and polarization co- phasing for the set of beams associated with that diagonal block. [00135] Example 37 comprises the subject matter of any variation of any of example(s) 36, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a distinct associated second matrix for that diagonal block.

[00136] Example 38 comprises the subject matter of any variation of any of example(s) 36, wherein the associated second matrix for each diagonal block of the two or more diagonal blocks is a common associated second matrix for each diagonal block of the two or more diagonal blocks.

[00137] Example 39 comprises an apparatus comprising means for executing any of the described operations of examples 1 -38.

[00138] Example 40 comprises a machine readable medium that stores instructions for execution by a processor to perform any of the described operations of examples 1 - 38.

[00139] Example 41 comprises an apparatus comprising: a memory interface; and processing circuitry configured to: performing any of the described operations of examples 1 -38.

[00140] The above description of illustrated embodiments of the subject disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the disclosed embodiments to the precise forms disclosed. While specific embodiments and examples are described herein for illustrative purposes, various modifications are possible that are considered within the scope of such embodiments and examples, as those skilled in the relevant art can recognize.

[00141 ] In this regard, while the disclosed subject matter has been described in connection with various embodiments and corresponding Figures, where applicable, it is to be understood that other similar embodiments can be used or modifications and additions can be made to the described embodiments for performing the same, similar, alternative, or substitute function of the disclosed subject matter without deviating therefrom. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, but rather should be construed in breadth and scope in accordance with the appended claims below.

[00142] In particular regard to the various functions performed by the above described components or structures (assemblies, devices, circuits, systems, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations. In addition, while a particular feature may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application.