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Title:
COHERENT DETECTION FOR QPSK MODULATION
Document Type and Number:
WIPO Patent Application WO/1992/011721
Kind Code:
A1
Abstract:
The pi/4-QPSK coherent detector (100) of the present invention has a vector input (101) and an output (105) comprising recovered data in bit pair form. The pi/4-QPSK coherent detector (100) recovers data that has been encoded in an amplitude modulated vector's phase angle (107). The pi/4-QPSK coherent detector (100) detects the pi/4-QPSK constellation of the incoming modulated signal and outputs (105) the recovered data stream.

Inventors:
KAZECKI HENRY L (US)
DENNIS DONALD W (US)
GOODE STEVEN H (US)
ZIOLKO ERIC F (US)
Application Number:
PCT/US1991/009473
Publication Date:
July 09, 1992
Filing Date:
December 16, 1991
Export Citation:
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Assignee:
MOTOROLA INC (US)
International Classes:
H04L27/227; (IPC1-7): H04L27/22
Foreign References:
US3818347A1974-06-18
US4361894A1982-11-30
US4843616A1989-06-27
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Claims:
Claims
1. A coherent detector apparatus having a vector input that has been data modulated and a recovered data output, the apparatus comprising: a) multiplying means having an output and a first and a second input, the vector input coupled to the first input; b) vector limiting means, coupled to the output of the multiplying means, for limiting the vector input to unity; c) signal vector quantizing means, coupled to the output of the vector limiting means, for generating a quantized received signal vector; d) phase error detection means, coupled to the vector limiting means and the signal vector quantizing means, for generating a phase error signal; e) controllable oscillator means, having an input coupled to the phase error detection means and an output coupled to the second input of the multiplying means, the controllable oscillator means generating a variable frequency signal in response to the phase error signal; and f) decoding means, having an input coupled to the signal vector quantizing means and an output coupled to the recovered data output, for decoding the quantized received signal vector into data bits.
2. The apparatus of claim 1 and further induding filtering means coupling the controllable oscillator means to the phase error detection means.
3. The apparatus of daim 1 wherein the controllable osάllator means is a numerically controlled osάllator.
4. The apparatus of daim 1 wherein the coherent detector ap¬ paratus is a π/4QPSK coherent detection apparatus.
5. A coherent detector apparatus having a vector input that has been data modulated and a recovered data output, the apparatus comprising: a) mixing means, having an output and an input of the means coupled to the vector input, for mixing a plurality of signals; b) vector limiting means, coupled to the output of the mixing means, for limiting the vector input to unity; c) signal vector quantizing means, coupled to the vector limiting means, for generating a quantized received signal vector; d) phase error detection means, coupled to the vector limiting means and the signal vector quantizing means, for generating a phase error signal; e) filtering means coupled to the phase error detection means, for produdng a filtered phase error signal; f) controllable oscillator means, having an input cou¬ pled to the filtering means and an output coupled to the mix¬ ing means, the controllable osάllator means generating a variable frequency signal in response to the filtered phase error signal; and g) decoding means, having an input coupled to the signal vector quantizing means and an output coupled to the recovered data output, for decoding the quantized received signal vector into data bits.
6. The apparatus of claim 5 wherein the controllable osάllator means is a numerically controlled osάllator.
7. The apparatus of daim 5 wherein the coherent detector ap¬ paratus is a π/4QPSK coherent detection apparatus.
8. A method of coherent detection for detecting a data modulated input vector, the input vector having a variable length, and converting the input vector to a bit stream of data, the method comprising the steps of: a) multiplying an osάllating signal with the input vec¬ tor to form a mixed input vector; b) limiting the length of the mixed input vector to unit length; c) generating a phase error signal and a vector quantized signal from the unit length mixed input vector; d) filtering the phase error signal to generate a filtered phase error signal; e) controlling osάllating means with the filtered phase error signal to form the osάllating signal, the oscillating signal changing frequency in response to the phase error signal; and f) decoding the vector quantized signal to form the bit stream of data.
9. A coherent detector apparatus having a vector input that has been data modulated and a recovered data output, the apparatus comprising: a) multiplying means having an output and a first and a second input; b) vector limiting means, coupled to the output of the multiplying means, for limiting the vector input to unity; c) signal vector quantizing means, coupled to the output of the vector limiting means, for generating a quantized received signal vector; d) phase error detection means, coupled to the vector limiting means and the signal vector quantizing means, for generating a phase error signal; e) controllable oscillator means, having an input coupled to the phase error detection means and an output coupled to the second input of the multiplying means, the controllable oscillator means generating a variable frequency signal in response to the phase error signal; and f) decoding means, having an input coupled to the multiplying means and an output coupled to the recovered data output, for decoding the phase data signal into data bits.
10. The apparatus of claim 9 and further including filtering means coupling the controllable osάllator means to the phase detection means.
Description:
COHERENT DETECTION FOR PSK MODULATION

Field of the Invention

The present invention relates generally to the field of communications and particularly to coherent detection in a digital communication environment.

Background of the Invention

Any modulation method can be represented by a con¬ stellation. An example of this is the eight point constellation illustrated in Fig. 3. This constellation is generated from dif¬ ferentially encoded QPSK (DEQPSK or π/4 QPSK) which is a subset of the four state QPSK constellation. Each state is characterized by a vector having the same magnitude, but a different phase angle. Due to the differential encoding of the QPSK signal to generate the π/4-QPSK signal, data recovery may be accomplished with either a coherent or non-coherent detector. Coherent detection exhibits better performance in some situations as compared to non-coherent detection tech¬ niques.

In coherent detection, however, the carrier phase must be recovered from the received signal. Also, with π/4-QPSK a known initial 0/45° rotation phase is required as a start-up condition. This is required to determine the initial constella¬ tion point of the QPSK constellation. Additionally, environ¬ mental fading can rotate the constellation points causing ran¬ dom phase modulation. There is a resulting need for a coher- ent detector that can determine the initial constellation point rapidly and track the rotating constellation.

Summary of the Invention

The π/4-QPSK coherent detector of the present invention has a vector input and an output comprising recovered data in

bit pair form. The coherent detector comprises the input vec¬ tor coupled to an input of a mixer. The output of the mixer is coupled to an input of a unit vector limiter. The output of the limiter is coupled to a phase detector for generating a phase error signal and determining the phase angle of the input vec¬ tor. The phase detector has an output coupled to a loop filter, for limiting noise on the phase error signal. The output of the loop filter drives a numerically controlled oscillator that in turn outputs an oscillator signal that is mixed with the input vector. The differential decoder uses the angle from the phase detector to determine the bit pair corresponding to the angle. The bit pair is the output of the present invention.

Brief Description of the Drawings

Fig. 1 shows the preferred embodiment of the present invention.

Fig. 2 shows a block diagram of the decision directed phase detector of the present invention. Fig. 3 shows the π/4-QPSK constellation of the present invention.

Fig. 4 shows the 5-level eye produced by the π/4-QPSK coherent detector of the present invention.

Detailed Description of the Preferred Embodiment

The π/4-QPSK coherent detector of the present invention enables recovery of data that has been encoded in an ampli¬ tude and phase modulated vector. The π/4-QPSK coherent detector detects the π/4-QPSK constellation, illustrated in Fig.

3, of an incoming signal and outputs the recovered data stream.

The received modulated signal is input to the π/4-QPSK coherent detector (100) of the present invention, illustrated in Fig. 1, where it is first multiplied (101) with a signal from a numerically controlled oscillator (NCO) (102). The vector out-

put from this mixer is next limited in length to unity (103). Since the data to be recovered is encoded in the vector's angle, the length of the vector is not important. For generalized vec¬ tor modulated signals, for example QAM, the unit vector lim- iter (UVL) (103) is used in the coherent carrier recovery block to remove the amplitude modulation. The signal before the UVL (103) is applied to a data recovery block where both the amplitude and phase information is preserved for proper data recovery operation. If the vector is not limited to unity, an undesirable term representing the AM component will appear later in the coherent detector. The limiter operation is accomplished using the following equation:

v Unit vector = ι 2 + Q ~2

where V is the vector with AM and I and Q are the ordinate and abscissa components of V. Also, other techniques can be used to perform the unit vector limiter. For example, the arc¬ tangent function can be used to generate a UVL signal. The unit vector is next input to a phase error detector

(106), illustrated in Fig. 1, for generating a phase error signal, θ β and a signal vector quantizer (107) for determining the phase angle of the input vector. FIG. 2 illustrates an expanded view of the phase error detector (106) and the signal vector quantizer (107). θ is the difference between the received input vector angle and the closest point on the π/4-QPSK con¬ stellation. θ β is derived from the eight point π/4-QPSK signal con¬ stellation. This derivation, in conjunction with Fig. 2, is as follows:

s.

S 3 s 8 ι χ s ; = e s 4 = I e 8 '] = sinΔΘ.

s 4 = Δθ β if Δθ β « 1 radian since sinθ = θ for θ « 1 radian.

The phase error detector (106) mixes the Q component from the signal vector quantizer (107) output with the I component from the phase error detector (106) input and subtracts the result from the product of the I component from the signal vector quantizer (107) and the Q component of the phase error detector (106) input.

The signal vector quantizer is derived by observing the possible states of the π/4-QPSK waveform, it is seen that there is an alternating pattern between the axis states and the π/4 off-axis states. The axis states are represented by a vector of modulus 1 with possible angels of 0, π/2, π, and -π/2 degrees and the off-axis states are represented by a vector of modulus 1 with possible angels of ±π/4 and ±3π/4. A 5-level eye, illustrated in Fig. 4, is produced by projecting the vector to the I and Q axis.

The desired data is recovered from this 5-level signal by performing a slice operation and differential decoding to translate the 5-levels into the appropriate binary data. This mapping is commonly referred to as Gray encoding the non- return to zero (NRZ) binary data to the I & Q signal space con¬ stellation. Other methods of mapping can also be used for this purpose. A simple 5-level slicing operation will have poor per¬ formance due to small differences between decision levels in the data slicer. An optimal signal vector quantizing operation is derived by noting that the 5-level baseband eyes alternate be¬ tween 3 and 2 levels at every other symbol time. This is the re¬ sult of differential encoding which is performed on the QPSK constellation to generate the π/4-QPSK signal. At every symbol time the new constellation point is generated by a phase shift of ±π 4 or ±3π/4 from the previous 8-point constellation point.

Due to differential encoding, once an initial start-up phase point is known, the 3 and 2-level flip-flop pattern is defined. Also, the 3-level eye can be mapped to a 2-level eye by perform¬ ing a 45° complex phase shift at the receiver. The 3-level eye is produced by the on-axis constellation points. The noise im¬ munity improvement is due to doing a 2-level slicer operation at the 3-level points of the eye. This is accomplished by rotat¬ ing the received vector 45°, thus generating a 2-level eye to slice without SNR penalty. The difficulty in terms of implementation is in deter¬ mining the initial constellation point of the baseband recov¬ ered constellation. Finding the initial phase for optimal co¬ herent operation implies extra processing for a DSP based de¬ tector. The initial phase is a function of phase offsets between the transmitter and the receiver local oscillator frequency.

Random phase modulation due to environmental fading also rotates the constellation points.

A start-up problem can occur if the initial point chosen is off by 45°. This problem is solved by the data directed phase detector. When a wrong 0/45° rotation decision is made, the phase error term will be large. This large phase error will cause the digital phase locked loop (DPLL) to shift the NCO phase which will shift the output such that the signal into the phase detector will have the proper phase for the chosen ini- tial 0 45° rotation phase. The phase detector of the present invention, therefore, enables self-recovery of initial errors.

The coherent carrier tracking is accomplished with the DPLL approach. The NCO (102) generates the coherent car¬ rier driven by an error signal derived from the QPSK signal constellation. This error signal is related to phase drift caused by channel Doppler fading distortion and local oscilla¬ tor frequency differences. Random phase modulation due to environmental fading rotates these constellation points. The coherent detector, therefore, must track the phase drift caused by the fading.

The phase error is filtered by a second order loop filter (104) having a bandwidth of 500 Hz. The filter limits the noise on this signal. The filtered phase error output drives the NCO (102).

The coherently recovered signal vector is input to a dif¬ ferential decoder (105) to determine the corresponding bit pair associated with the angle. This is accomplished by finding the angle in the look-up table and determining the corresponding bit pair for output from the present invention:

Data £

00 3π/4

01 π/4

10 -π/4

11 -3π/4

While the coherent detector (100) of the present inven¬ tion has been described as a π 4-QPSK detector, it will also work for any QPSK scheme. A continuous stream of symbols, however, is required for proper operation. These symbols do not have to be intended for a particular receiver, they can be data intended for another receiver but picked up by all re¬ ceivers.